[llvm] r188215 - R600: Set scheduling preference to Sched::Source
Tom Stellard
thomas.stellard at amd.com
Mon Aug 12 15:33:22 PDT 2013
Author: tstellar
Date: Mon Aug 12 17:33:21 2013
New Revision: 188215
URL: http://llvm.org/viewvc/llvm-project?rev=188215&view=rev
Log:
R600: Set scheduling preference to Sched::Source
R600 doesn't need to do any scheduling on the SelectionDAG now that it
has a very good MachineScheduler. Also, using the VLIW SelectionDAG
scheduler was having a major impact on compile times. For example with
the phatk kernel here are the LLVM IR to machine code compile times:
With Sched::VLIW
Total Compile Time: 1.4890 Seconds (User + System)
SelectionDAG Instruction Scheduling: 1.1670 Seconds (User + System)
With Sched::Source
Total Compile Time: 0.3330 Seconds (User + System)
SelectionDAG Instruction Scheduling: 0.0070 Seconds (User + System)
The code ouput was identical with both schedulers. This may not be true
for all programs, but it gives me confidence that there won't be much
reduction, if any, in code quality by using Sched::Source.
Modified:
llvm/trunk/lib/Target/R600/R600ISelLowering.cpp
llvm/trunk/test/CodeGen/R600/and.ll
llvm/trunk/test/CodeGen/R600/fadd.ll
llvm/trunk/test/CodeGen/R600/fmul.ll
llvm/trunk/test/CodeGen/R600/fmul.v4f32.ll
llvm/trunk/test/CodeGen/R600/fsub.ll
llvm/trunk/test/CodeGen/R600/kcache-fold.ll
llvm/trunk/test/CodeGen/R600/setcc.ll
llvm/trunk/test/CodeGen/R600/sub.ll
Modified: llvm/trunk/lib/Target/R600/R600ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/R600ISelLowering.cpp?rev=188215&r1=188214&r2=188215&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/R600ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/R600/R600ISelLowering.cpp Mon Aug 12 17:33:21 2013
@@ -99,7 +99,7 @@ R600TargetLowering::R600TargetLowering(T
setBooleanContents(ZeroOrNegativeOneBooleanContent);
setBooleanVectorContents(ZeroOrNegativeOneBooleanContent);
- setSchedulingPreference(Sched::VLIW);
+ setSchedulingPreference(Sched::Source);
}
MachineBasicBlock * R600TargetLowering::EmitInstrWithCustomInserter(
Modified: llvm/trunk/test/CodeGen/R600/and.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/and.ll?rev=188215&r1=188214&r2=188215&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/and.ll (original)
+++ llvm/trunk/test/CodeGen/R600/and.ll Mon Aug 12 17:33:21 2013
@@ -19,7 +19,7 @@ define void @test2(<2 x i32> addrspace(1
}
;EG-CHECK: @test4
-;EG-CHECK: AND_INT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
+;EG-CHECK: AND_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
;EG-CHECK: AND_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
;EG-CHECK: AND_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
;EG-CHECK: AND_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
Modified: llvm/trunk/test/CodeGen/R600/fadd.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fadd.ll?rev=188215&r1=188214&r2=188215&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fadd.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fadd.ll Mon Aug 12 17:33:21 2013
@@ -26,7 +26,7 @@ entry:
}
; CHECK: @fadd_v4f32
-; CHECK: ADD T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
+; CHECK: ADD * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
; CHECK: ADD * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
; CHECK: ADD * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
; CHECK: ADD * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
Modified: llvm/trunk/test/CodeGen/R600/fmul.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fmul.ll?rev=188215&r1=188214&r2=188215&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fmul.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fmul.ll Mon Aug 12 17:33:21 2013
@@ -26,7 +26,7 @@ entry:
}
; CHECK: @fmul_v4f32
-; CHECK: MUL_IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
+; CHECK: MUL_IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
; CHECK: MUL_IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
; CHECK: MUL_IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
; CHECK: MUL_IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
Modified: llvm/trunk/test/CodeGen/R600/fmul.v4f32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fmul.v4f32.ll?rev=188215&r1=188214&r2=188215&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fmul.v4f32.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fmul.v4f32.ll Mon Aug 12 17:33:21 2013
@@ -1,6 +1,6 @@
;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
-;CHECK: MUL_IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
+;CHECK: MUL_IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
;CHECK: MUL_IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
;CHECK: MUL_IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
;CHECK: MUL_IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
Modified: llvm/trunk/test/CodeGen/R600/fsub.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fsub.ll?rev=188215&r1=188214&r2=188215&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fsub.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fsub.ll Mon Aug 12 17:33:21 2013
@@ -26,7 +26,7 @@ entry:
}
; CHECK: @fsub_v4f32
-; CHECK: ADD T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], -T[0-9]+\.[XYZW]}}
+; CHECK: ADD * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], -T[0-9]+\.[XYZW]}}
; CHECK: ADD * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], -T[0-9]+\.[XYZW]}}
; CHECK: ADD * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], -T[0-9]+\.[XYZW]}}
; CHECK: ADD * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], -T[0-9]+\.[XYZW]}}
Modified: llvm/trunk/test/CodeGen/R600/kcache-fold.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/kcache-fold.ll?rev=188215&r1=188214&r2=188215&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/kcache-fold.ll (original)
+++ llvm/trunk/test/CodeGen/R600/kcache-fold.ll Mon Aug 12 17:33:21 2013
@@ -1,7 +1,7 @@
;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
; CHECK: @main1
-; CHECK: MOV T{{[0-9]+\.[XYZW], KC0}}
+; CHECK: MOV * T{{[0-9]+\.[XYZW], KC0}}
define void @main1() {
main_body:
%0 = load <4 x float> addrspace(8)* null
Modified: llvm/trunk/test/CodeGen/R600/setcc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/setcc.ll?rev=188215&r1=188214&r2=188215&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/setcc.ll (original)
+++ llvm/trunk/test/CodeGen/R600/setcc.ll Mon Aug 12 17:33:21 2013
@@ -12,7 +12,7 @@ define void @setcc_v2i32(<2 x i32> addrs
}
; CHECK: @setcc_v4i32
-; EG-CHECK-DAG: SETE_INT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
+; EG-CHECK-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
; EG-CHECK-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
; EG-CHECK-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
; EG-CHECK-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
Modified: llvm/trunk/test/CodeGen/R600/sub.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/sub.ll?rev=188215&r1=188214&r2=188215&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/sub.ll (original)
+++ llvm/trunk/test/CodeGen/R600/sub.ll Mon Aug 12 17:33:21 2013
@@ -19,7 +19,7 @@ define void @test2(<2 x i32> addrspace(1
}
;EG-CHECK: @test4
-;EG-CHECK: SUB_INT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
+;EG-CHECK: SUB_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
;EG-CHECK: SUB_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
;EG-CHECK: SUB_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
;EG-CHECK: SUB_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
More information about the llvm-commits
mailing list