[llvm] r188024 - Mips ELF: MicroMips direct object Little endian support.
Jack Carter
jack.carter at imgtec.com
Thu Aug 8 16:30:40 PDT 2013
Author: jacksprat
Date: Thu Aug 8 18:30:40 2013
New Revision: 188024
URL: http://llvm.org/viewvc/llvm-project?rev=188024&view=rev
Log:
Mips ELF: MicroMips direct object Little endian support.
Test included.
Patch by Zoran Jovanovich
Modified:
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
llvm/trunk/test/MC/Mips/micromips-alu-instructions.s
llvm/trunk/test/MC/Mips/micromips-loadstore-instructions.s
llvm/trunk/test/MC/Mips/micromips-shift-instructions.s
Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp?rev=188024&r1=188023&r2=188024&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp Thu Aug 8 18:30:40 2013
@@ -39,11 +39,14 @@ class MipsMCCodeEmitter : public MCCodeE
MCContext &Ctx;
const MCSubtargetInfo &STI;
bool IsLittleEndian;
+ bool IsMicroMips;
public:
MipsMCCodeEmitter(const MCInstrInfo &mcii, MCContext &Ctx_,
const MCSubtargetInfo &sti, bool IsLittle) :
- MCII(mcii), Ctx(Ctx_), STI (sti), IsLittleEndian(IsLittle) {}
+ MCII(mcii), Ctx(Ctx_), STI (sti), IsLittleEndian(IsLittle) {
+ IsMicroMips = STI.getFeatureBits() & Mips::FeatureMicroMips;
+ }
~MipsMCCodeEmitter() {}
@@ -53,9 +56,17 @@ public:
void EmitInstruction(uint64_t Val, unsigned Size, raw_ostream &OS) const {
// Output the instruction encoding in little endian byte order.
- for (unsigned i = 0; i < Size; ++i) {
- unsigned Shift = IsLittleEndian ? i * 8 : (Size - 1 - i) * 8;
- EmitByte((Val >> Shift) & 0xff, OS);
+ // Little-endian byte ordering:
+ // mips32r2: 4 | 3 | 2 | 1
+ // microMIPS: 2 | 1 | 4 | 3
+ if (IsLittleEndian && Size == 4 && IsMicroMips) {
+ EmitInstruction(Val>>16, 2, OS);
+ EmitInstruction(Val, 2, OS);
+ } else {
+ for (unsigned i = 0; i < Size; ++i) {
+ unsigned Shift = IsLittleEndian ? i * 8 : (Size - 1 - i) * 8;
+ EmitByte((Val >> Shift) & 0xff, OS);
+ }
}
}
Modified: llvm/trunk/test/MC/Mips/micromips-alu-instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/micromips-alu-instructions.s?rev=188024&r1=188023&r2=188024&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/micromips-alu-instructions.s (original)
+++ llvm/trunk/test/MC/Mips/micromips-alu-instructions.s Thu Aug 8 18:30:40 2013
@@ -1,38 +1,73 @@
-# RUN: llvm-mc %s -triple=mipsel -show-encoding -mattr=micromips | FileCheck %s
+# RUN: llvm-mc %s -triple=mipsel -show-encoding -mattr=micromips | FileCheck -check-prefix=CHECK-EL %s
+# RUN: llvm-mc %s -triple=mips -show-encoding -mattr=micromips | FileCheck -check-prefix=CHECK-EB %s
# Check that the assembler can handle the documented syntax
# for arithmetic and logical instructions.
#------------------------------------------------------------------------------
# Arithmetic and Logical Instructions
#------------------------------------------------------------------------------
-# CHECK: add $9, $6, $7 # encoding: [0x10,0x49,0xe6,0x00]
-# CHECK: addi $9, $6, 17767 # encoding: [0x67,0x45,0x26,0x11]
-# CHECK: addiu $9, $6, -15001 # encoding: [0x67,0xc5,0x26,0x31]
-# CHECK: addi $9, $6, 17767 # encoding: [0x67,0x45,0x26,0x11]
-# CHECK: addiu $9, $6, -15001 # encoding: [0x67,0xc5,0x26,0x31]
-# CHECK: addu $9, $6, $7 # encoding: [0x50,0x49,0xe6,0x00]
-# CHECK: sub $9, $6, $7 # encoding: [0x90,0x49,0xe6,0x00]
-# CHECK: subu $4, $3, $5 # encoding: [0xd0,0x21,0xa3,0x00]
-# CHECK: neg $6, $7 # encoding: [0x90,0x31,0xe0,0x00]
-# CHECK: negu $6, $7 # encoding: [0xd0,0x31,0xe0,0x00]
-# CHECK: move $7, $8 # encoding: [0x50,0x39,0x08,0x00]
-# CHECK: slt $3, $3, $5 # encoding: [0x50,0x1b,0xa3,0x00]
-# CHECK: slti $3, $3, 103 # encoding: [0x67,0x00,0x63,0x90]
-# CHECK: slti $3, $3, 103 # encoding: [0x67,0x00,0x63,0x90]
-# CHECK: sltiu $3, $3, 103 # encoding: [0x67,0x00,0x63,0xb0]
-# CHECK: sltu $3, $3, $5 # encoding: [0x90,0x1b,0xa3,0x00]
-# CHECK: and $9, $6, $7 # encoding: [0x50,0x4a,0xe6,0x00]
-# CHECK: andi $9, $6, 17767 # encoding: [0x67,0x45,0x26,0xd1]
-# CHECK: andi $9, $6, 17767 # encoding: [0x67,0x45,0x26,0xd1]
-# CHECK: or $3, $4, $5 # encoding: [0x90,0x1a,0xa4,0x00]
-# CHECK: ori $9, $6, 17767 # encoding: [0x67,0x45,0x26,0x51]
-# CHECK: xor $3, $3, $5 # encoding: [0x10,0x1b,0xa3,0x00]
-# CHECK: xori $9, $6, 17767 # encoding: [0x67,0x45,0x26,0x71]
-# CHECK: xori $9, $6, 17767 # encoding: [0x67,0x45,0x26,0x71]
-# CHECK: nor $9, $6, $7 # encoding: [0xd0,0x4a,0xe6,0x00]
-# CHECK: not $7, $8 # encoding: [0xd0,0x3a,0x08,0x00]
-# CHECK: mul $9, $6, $7 # encoding: [0x10,0x4a,0xe6,0x00]
-# CHECK: mult $9, $7 # encoding: [0x3c,0x8b,0xe9,0x00]
-# CHECK: multu $9, $7 # encoding: [0x3c,0x9b,0xe9,0x00]
+# Little endian
+#------------------------------------------------------------------------------
+# CHECK-EL: add $9, $6, $7 # encoding: [0xe6,0x00,0x10,0x49]
+# CHECK-EL: addi $9, $6, 17767 # encoding: [0x26,0x11,0x67,0x45]
+# CHECK-EL: addiu $9, $6, -15001 # encoding: [0x26,0x31,0x67,0xc5]
+# CHECK-EL: addi $9, $6, 17767 # encoding: [0x26,0x11,0x67,0x45]
+# CHECK-EL: addiu $9, $6, -15001 # encoding: [0x26,0x31,0x67,0xc5]
+# CHECK-EL: addu $9, $6, $7 # encoding: [0xe6,0x00,0x50,0x49]
+# CHECK-EL: sub $9, $6, $7 # encoding: [0xe6,0x00,0x90,0x49]
+# CHECK-EL: subu $4, $3, $5 # encoding: [0xa3,0x00,0xd0,0x21]
+# CHECK-EL: neg $6, $7 # encoding: [0xe0,0x00,0x90,0x31]
+# CHECK-EL: negu $6, $7 # encoding: [0xe0,0x00,0xd0,0x31]
+# CHECK-EL: move $7, $8 # encoding: [0x08,0x00,0x50,0x39]
+# CHECK-EL: slt $3, $3, $5 # encoding: [0xa3,0x00,0x50,0x1b]
+# CHECK-EL: slti $3, $3, 103 # encoding: [0x63,0x90,0x67,0x00]
+# CHECK-EL: slti $3, $3, 103 # encoding: [0x63,0x90,0x67,0x00]
+# CHECK-EL: sltiu $3, $3, 103 # encoding: [0x63,0xb0,0x67,0x00]
+# CHECK-EL: sltu $3, $3, $5 # encoding: [0xa3,0x00,0x90,0x1b]
+# CHECK-EL: and $9, $6, $7 # encoding: [0xe6,0x00,0x50,0x4a]
+# CHECK-EL: andi $9, $6, 17767 # encoding: [0x26,0xd1,0x67,0x45]
+# CHECK-EL: andi $9, $6, 17767 # encoding: [0x26,0xd1,0x67,0x45]
+# CHECK-EL: or $3, $4, $5 # encoding: [0xa4,0x00,0x90,0x1a]
+# CHECK-EL: ori $9, $6, 17767 # encoding: [0x26,0x51,0x67,0x45]
+# CHECK-EL: xor $3, $3, $5 # encoding: [0xa3,0x00,0x10,0x1b]
+# CHECK-EL: xori $9, $6, 17767 # encoding: [0x26,0x71,0x67,0x45]
+# CHECK-EL: xori $9, $6, 17767 # encoding: [0x26,0x71,0x67,0x45]
+# CHECK-EL: nor $9, $6, $7 # encoding: [0xe6,0x00,0xd0,0x4a]
+# CHECK-EL: not $7, $8 # encoding: [0x08,0x00,0xd0,0x3a]
+# CHECK-EL: mul $9, $6, $7 # encoding: [0xe6,0x00,0x10,0x4a]
+# CHECK-EL: mult $9, $7 # encoding: [0xe9,0x00,0x3c,0x8b]
+# CHECK-EL: multu $9, $7 # encoding: [0xe9,0x00,0x3c,0x9b]
+#------------------------------------------------------------------------------
+# Big endian
+#------------------------------------------------------------------------------
+# CHECK-EB: add $9, $6, $7 # encoding: [0x00,0xe6,0x49,0x10]
+# CHECK-EB: addi $9, $6, 17767 # encoding: [0x11,0x26,0x45,0x67]
+# CHECK-EB: addiu $9, $6, -15001 # encoding: [0x31,0x26,0xc5,0x67]
+# CHECK-EB: addi $9, $6, 17767 # encoding: [0x11,0x26,0x45,0x67]
+# CHECK-EB: addiu $9, $6, -15001 # encoding: [0x31,0x26,0xc5,0x67]
+# CHECK-EB: addu $9, $6, $7 # encoding: [0x00,0xe6,0x49,0x50]
+# CHECK-EB: sub $9, $6, $7 # encoding: [0x00,0xe6,0x49,0x90]
+# CHECK-EB: subu $4, $3, $5 # encoding: [0x00,0xa3,0x21,0xd0]
+# CHECK-EB: neg $6, $7 # encoding: [0x00,0xe0,0x31,0x90]
+# CHECK-EB: negu $6, $7 # encoding: [0x00,0xe0,0x31,0xd0]
+# CHECK-EB: move $7, $8 # encoding: [0x00,0x08,0x39,0x50]
+# CHECK-EB: slt $3, $3, $5 # encoding: [0x00,0xa3,0x1b,0x50]
+# CHECK-EB: slti $3, $3, 103 # encoding: [0x90,0x63,0x00,0x67]
+# CHECK-EB: slti $3, $3, 103 # encoding: [0x90,0x63,0x00,0x67]
+# CHECK-EB: sltiu $3, $3, 103 # encoding: [0xb0,0x63,0x00,0x67]
+# CHECK-EB: sltu $3, $3, $5 # encoding: [0x00,0xa3,0x1b,0x90]
+# CHECK-EB: and $9, $6, $7 # encoding: [0x00,0xe6,0x4a,0x50]
+# CHECK-EB: andi $9, $6, 17767 # encoding: [0xd1,0x26,0x45,0x67]
+# CHECK-EB: andi $9, $6, 17767 # encoding: [0xd1,0x26,0x45,0x67]
+# CHECK-EB: or $3, $4, $5 # encoding: [0x00,0xa4,0x1a,0x90]
+# CHECK-EB: ori $9, $6, 17767 # encoding: [0x51,0x26,0x45,0x67]
+# CHECK-EB: xor $3, $3, $5 # encoding: [0x00,0xa3,0x1b,0x10]
+# CHECK-EB: xori $9, $6, 17767 # encoding: [0x71,0x26,0x45,0x67]
+# CHECK-EB: xori $9, $6, 17767 # encoding: [0x71,0x26,0x45,0x67]
+# CHECK-EB: nor $9, $6, $7 # encoding: [0x00,0xe6,0x4a,0xd0]
+# CHECK-EB: not $7, $8 # encoding: [0x00,0x08,0x3a,0xd0]
+# CHECK-EB: mul $9, $6, $7 # encoding: [0x00,0xe6,0x4a,0x10]
+# CHECK-EB: mult $9, $7 # encoding: [0x00,0xe9,0x8b,0x3c]
+# CHECK-EB: multu $9, $7 # encoding: [0x00,0xe9,0x9b,0x3c]
add $9, $6, $7
add $9, $6, 17767
addu $9, $6, -15001
Modified: llvm/trunk/test/MC/Mips/micromips-loadstore-instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/micromips-loadstore-instructions.s?rev=188024&r1=188023&r2=188024&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/micromips-loadstore-instructions.s (original)
+++ llvm/trunk/test/MC/Mips/micromips-loadstore-instructions.s Thu Aug 8 18:30:40 2013
@@ -1,17 +1,31 @@
-# RUN: llvm-mc %s -triple=mipsel -show-encoding -mattr=micromips | FileCheck %s
+# RUN: llvm-mc %s -triple=mipsel -show-encoding -mattr=micromips | FileCheck -check-prefix=CHECK-EL %s
+# RUN: llvm-mc %s -triple=mips -show-encoding -mattr=micromips | FileCheck -check-prefix=CHECK-EB %s
# Check that the assembler can handle the documented syntax
# for load and store instructions.
#------------------------------------------------------------------------------
# Load and Store Instructions
#------------------------------------------------------------------------------
-# CHECK: lb $5, 8($4) # encoding: [0x08,0x00,0xa4,0x1c]
-# CHECK: lbu $6, 8($4) # encoding: [0x08,0x00,0xc4,0x14]
-# CHECK: lh $2, 8($4) # encoding: [0x08,0x00,0x44,0x3c]
-# CHECK: lhu $4, 8($2) # encoding: [0x08,0x00,0x82,0x34]
-# CHECK: lw $6, 4($5) # encoding: [0x04,0x00,0xc5,0xfc]
-# CHECK: sb $5, 8($4) # encoding: [0x08,0x00,0xa4,0x18]
-# CHECK: sh $2, 8($4) # encoding: [0x08,0x00,0x44,0x38]
-# CHECK: sw $5, 4($6) # encoding: [0x04,0x00,0xa6,0xf8]
+# Little endian
+#------------------------------------------------------------------------------
+# CHECK-EL: lb $5, 8($4) # encoding: [0xa4,0x1c,0x08,0x00]
+# CHECK-EL: lbu $6, 8($4) # encoding: [0xc4,0x14,0x08,0x00]
+# CHECK-EL: lh $2, 8($4) # encoding: [0x44,0x3c,0x08,0x00]
+# CHECK-EL: lhu $4, 8($2) # encoding: [0x82,0x34,0x08,0x00]
+# CHECK-EL: lw $6, 4($5) # encoding: [0xc5,0xfc,0x04,0x00]
+# CHECK-EL: sb $5, 8($4) # encoding: [0xa4,0x18,0x08,0x00]
+# CHECK-EL: sh $2, 8($4) # encoding: [0x44,0x38,0x08,0x00]
+# CHECK-EL: sw $5, 4($6) # encoding: [0xa6,0xf8,0x04,0x00]
+#------------------------------------------------------------------------------
+# Big endian
+#------------------------------------------------------------------------------
+# CHECK-EB: lb $5, 8($4) # encoding: [0x1c,0xa4,0x00,0x08]
+# CHECK-EB: lbu $6, 8($4) # encoding: [0x14,0xc4,0x00,0x08]
+# CHECK-EB: lh $2, 8($4) # encoding: [0x3c,0x44,0x00,0x08]
+# CHECK-EB: lhu $4, 8($2) # encoding: [0x34,0x82,0x00,0x08]
+# CHECK-EB: lw $6, 4($5) # encoding: [0xfc,0xc5,0x00,0x04]
+# CHECK-EB: sb $5, 8($4) # encoding: [0x18,0xa4,0x00,0x08]
+# CHECK-EB: sh $2, 8($4) # encoding: [0x38,0x44,0x00,0x08]
+# CHECK-EB: sw $5, 4($6) # encoding: [0xf8,0xa6,0x00,0x04]
lb $5, 8($4)
lbu $6, 8($4)
lh $2, 8($4)
Modified: llvm/trunk/test/MC/Mips/micromips-shift-instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/micromips-shift-instructions.s?rev=188024&r1=188023&r2=188024&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/micromips-shift-instructions.s (original)
+++ llvm/trunk/test/MC/Mips/micromips-shift-instructions.s Thu Aug 8 18:30:40 2013
@@ -1,17 +1,31 @@
-# RUN: llvm-mc %s -triple=mipsel -show-encoding -mcpu=mips32r2 -mattr=micromips | FileCheck %s
+# RUN: llvm-mc %s -triple=mipsel -show-encoding -mcpu=mips32r2 -mattr=micromips | FileCheck -check-prefix=CHECK-EL %s
+# RUN: llvm-mc %s -triple=mips -show-encoding -mcpu=mips32r2 -mattr=micromips | FileCheck -check-prefix=CHECK-EB %s
# Check that the assembler can handle the documented syntax
# for shift instructions.
#------------------------------------------------------------------------------
# Shift Instructions
#------------------------------------------------------------------------------
-# CHECK: sll $4, $3, 7 # encoding: [0x00,0x38,0x83,0x00]
-# CHECK: sllv $2, $3, $5 # encoding: [0x10,0x10,0x65,0x00]
-# CHECK: sra $4, $3, 7 # encoding: [0x80,0x38,0x83,0x00]
-# CHECK: srav $2, $3, $5 # encoding: [0x90,0x10,0x65,0x00]
-# CHECK: srl $4, $3, 7 # encoding: [0x40,0x38,0x83,0x00]
-# CHECK: srlv $2, $3, $5 # encoding: [0x50,0x10,0x65,0x00]
-# CHECK: rotr $9, $6, 7 # encoding: [0xc0,0x38,0x26,0x01]
-# CHECK: rotrv $9, $6, $7 # encoding: [0xd0,0x48,0xc7,0x00]
+# Little endian
+#------------------------------------------------------------------------------
+# CHECK-EL: sll $4, $3, 7 # encoding: [0x83,0x00,0x00,0x38]
+# CHECK-EL: sllv $2, $3, $5 # encoding: [0x65,0x00,0x10,0x10]
+# CHECK-EL: sra $4, $3, 7 # encoding: [0x83,0x00,0x80,0x38]
+# CHECK-EL: srav $2, $3, $5 # encoding: [0x65,0x00,0x90,0x10]
+# CHECK-EL: srl $4, $3, 7 # encoding: [0x83,0x00,0x40,0x38]
+# CHECK-EL: srlv $2, $3, $5 # encoding: [0x65,0x00,0x50,0x10]
+# CHECK-EL: rotr $9, $6, 7 # encoding: [0x26,0x01,0xc0,0x38]
+# CHECK-EL: rotrv $9, $6, $7 # encoding: [0xc7,0x00,0xd0,0x48]
+#------------------------------------------------------------------------------
+# Big endian
+#------------------------------------------------------------------------------
+# CHECK-EB: sll $4, $3, 7 # encoding: [0x00,0x83,0x38,0x00]
+# CHECK-EB: sllv $2, $3, $5 # encoding: [0x00,0x65,0x10,0x10]
+# CHECK-EB: sra $4, $3, 7 # encoding: [0x00,0x83,0x38,0x80]
+# CHECK-EB: srav $2, $3, $5 # encoding: [0x00,0x65,0x10,0x90]
+# CHECK-EB: srl $4, $3, 7 # encoding: [0x00,0x83,0x38,0x40]
+# CHECK-EB: srlv $2, $3, $5 # encoding: [0x00,0x65,0x10,0x50]
+# CHECK-EB: rotr $9, $6, 7 # encoding: [0x01,0x26,0x38,0xc0]
+# CHECK-EB: rotrv $9, $6, $7 # encoding: [0x00,0xc7,0x48,0xd0]
sll $4, $3, 7
sllv $2, $3, $5
sra $4, $3, 7
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