[llvm] r187798 - [NVPTX] Start conversion to MC infrastructure
Aaron Ballman
aaron at aaronballman.com
Tue Aug 6 16:34:22 PDT 2013
Thanks!
~Aaron
On Tue, Aug 6, 2013 at 7:09 PM, Justin Holewinski
<justin.holewinski at gmail.com> wrote:
> Should be fixed in r187829. Thanks for the report!
>
>
> On Tue, Aug 6, 2013 at 5:10 PM, Aaron Ballman <aaron at aaronballman.com>
> wrote:
>>
>> On Tue, Aug 6, 2013 at 10:13 AM, Justin Holewinski
>> <jholewinski at nvidia.com> wrote:
>> > Author: jholewinski
>> > Date: Tue Aug 6 09:13:27 2013
>> > New Revision: 187798
>> >
>> > URL: http://llvm.org/viewvc/llvm-project?rev=187798&view=rev
>> > Log:
>> > [NVPTX] Start conversion to MC infrastructure
>> >
>> > This change converts the NVPTX target to use the MC infrastructure
>> > instead of directly emitting MachineInstr instances. This brings
>> > the target more up-to-date with LLVM TOT, and should fix PR15175
>> > and PR15958 (libNVPTXInstPrinter is empty) as a side-effect.
>> >
>> > Added:
>> > llvm/trunk/lib/Target/NVPTX/InstPrinter/NVPTXInstPrinter.h
>> > llvm/trunk/lib/Target/NVPTX/NVPTXMCExpr.cpp
>> > llvm/trunk/lib/Target/NVPTX/NVPTXMCExpr.h
>> > llvm/trunk/test/CodeGen/NVPTX/fp-literals.ll
>> > Modified:
>> > llvm/trunk/lib/Target/NVPTX/CMakeLists.txt
>> > llvm/trunk/lib/Target/NVPTX/InstPrinter/NVPTXInstPrinter.cpp
>> > llvm/trunk/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp
>> > llvm/trunk/lib/Target/NVPTX/NVPTX.td
>> > llvm/trunk/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
>> > llvm/trunk/lib/Target/NVPTX/NVPTXAsmPrinter.h
>> > llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp
>> >
>> > Modified: llvm/trunk/lib/Target/NVPTX/CMakeLists.txt
>> > URL:
>> > http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/CMakeLists.txt?rev=187798&r1=187797&r2=187798&view=diff
>> >
>> > ==============================================================================
>> > --- llvm/trunk/lib/Target/NVPTX/CMakeLists.txt (original)
>> > +++ llvm/trunk/lib/Target/NVPTX/CMakeLists.txt Tue Aug 6 09:13:27 2013
>> > @@ -25,6 +25,7 @@ set(NVPTXCodeGen_sources
>> > NVVMReflect.cpp
>> > NVPTXGenericToNVVM.cpp
>> > NVPTXPrologEpilogPass.cpp
>> > + NVPTXMCExpr.cpp
>> > )
>> >
>> > add_llvm_target(NVPTXCodeGen ${NVPTXCodeGen_sources})
>> >
>> > Modified: llvm/trunk/lib/Target/NVPTX/InstPrinter/NVPTXInstPrinter.cpp
>> > URL:
>> > http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/InstPrinter/NVPTXInstPrinter.cpp?rev=187798&r1=187797&r2=187798&view=diff
>> >
>> > ==============================================================================
>> > --- llvm/trunk/lib/Target/NVPTX/InstPrinter/NVPTXInstPrinter.cpp
>> > (original)
>> > +++ llvm/trunk/lib/Target/NVPTX/InstPrinter/NVPTXInstPrinter.cpp Tue Aug
>> > 6 09:13:27 2013
>> > @@ -1 +1,274 @@
>> > -// Placeholder
>> > +//===-- NVPTXInstPrinter.cpp - PTX assembly instruction printing
>> > ----------===//
>> > +//
>> > +// The LLVM Compiler Infrastructure
>> > +//
>> > +// This file is distributed under the University of Illinois Open
>> > Source
>> > +// License. See LICENSE.TXT for details.
>> > +//
>> >
>> > +//===----------------------------------------------------------------------===//
>> > +//
>> > +// Print MCInst instructions to .ptx format.
>> > +//
>> >
>> > +//===----------------------------------------------------------------------===//
>> > +
>> > +#define DEBUG_TYPE "asm-printer"
>> > +#include "InstPrinter/NVPTXInstPrinter.h"
>> > +#include "NVPTX.h"
>> > +#include "MCTargetDesc/NVPTXBaseInfo.h"
>> > +#include "llvm/MC/MCExpr.h"
>> > +#include "llvm/MC/MCInst.h"
>> > +#include "llvm/MC/MCInstrInfo.h"
>> > +#include "llvm/MC/MCSubtargetInfo.h"
>> > +#include "llvm/Support/ErrorHandling.h"
>> > +#include "llvm/Support/FormattedStream.h"
>> > +#include <cctype>
>> > +using namespace llvm;
>> > +
>> > +#include "NVPTXGenAsmWriter.inc"
>> > +
>> > +
>> > +NVPTXInstPrinter::NVPTXInstPrinter(const MCAsmInfo &MAI, const
>> > MCInstrInfo &MII,
>> > + const MCRegisterInfo &MRI,
>> > + const MCSubtargetInfo &STI)
>> > + : MCInstPrinter(MAI, MII, MRI) {
>> > + setAvailableFeatures(STI.getFeatureBits());
>> > +}
>> > +
>> > +void NVPTXInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo)
>> > const {
>> > + // Decode the virtual register
>> > + // Must be kept in sync with NVPTXAsmPrinter::encodeVirtualRegister
>> > + unsigned RCId = (RegNo >> 28);
>> > + switch (RCId) {
>> > + default: report_fatal_error("Bad virtual register encoding");
>> > + case 0:
>> > + OS << "%p";
>> > + break;
>> > + case 1:
>> > + OS << "%rs";
>> > + break;
>> > + case 2:
>> > + OS << "%r";
>> > + break;
>> > + case 3:
>> > + OS << "%rl";
>> > + break;
>> > + case 4:
>> > + OS << "%f";
>> > + break;
>> > + case 5:
>> > + OS << "%fl";
>> > + break;
>> > + }
>> > +
>> > + unsigned VReg = RegNo & 0x0FFFFFFF;
>> > + OS << VReg;
>> > +}
>> > +
>> > +void NVPTXInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
>> > + StringRef Annot) {
>> > + printInstruction(MI, OS);
>> > +
>> > + // Next always print the annotation.
>> > + printAnnotation(OS, Annot);
>> > +}
>> > +
>> > +void NVPTXInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
>> > + raw_ostream &O) {
>> > + const MCOperand &Op = MI->getOperand(OpNo);
>> > + if (Op.isReg()) {
>> > + unsigned Reg = Op.getReg();
>> > + printRegName(O, Reg);
>> > + } else if (Op.isImm()) {
>> > + O << markup("<imm:") << formatImm(Op.getImm()) << markup(">");
>> > + } else {
>> > + assert(Op.isExpr() && "Unknown operand kind in printOperand");
>> > + O << *Op.getExpr();
>> > + }
>> > +}
>> > +
>> > +void NVPTXInstPrinter::printCvtMode(const MCInst *MI, int OpNum,
>> > raw_ostream &O,
>> > + const char *Modifier) {
>> > + const MCOperand &MO = MI->getOperand(OpNum);
>> > + int64_t Imm = MO.getImm();
>> > +
>> > + if (strcmp(Modifier, "ftz") == 0) {
>> > + // FTZ flag
>> > + if (Imm & NVPTX::PTXCvtMode::FTZ_FLAG)
>> > + O << ".ftz";
>> > + } else if (strcmp(Modifier, "sat") == 0) {
>> > + // SAT flag
>> > + if (Imm & NVPTX::PTXCvtMode::SAT_FLAG)
>> > + O << ".sat";
>> > + } else if (strcmp(Modifier, "base") == 0) {
>> > + // Default operand
>> > + switch (Imm & NVPTX::PTXCvtMode::BASE_MASK) {
>> > + default:
>> > + return;
>> > + case NVPTX::PTXCvtMode::NONE:
>> > + break;
>> > + case NVPTX::PTXCvtMode::RNI:
>> > + O << ".rni";
>> > + break;
>> > + case NVPTX::PTXCvtMode::RZI:
>> > + O << ".rzi";
>> > + break;
>> > + case NVPTX::PTXCvtMode::RMI:
>> > + O << ".rmi";
>> > + break;
>> > + case NVPTX::PTXCvtMode::RPI:
>> > + O << ".rpi";
>> > + break;
>> > + case NVPTX::PTXCvtMode::RN:
>> > + O << ".rn";
>> > + break;
>> > + case NVPTX::PTXCvtMode::RZ:
>> > + O << ".rz";
>> > + break;
>> > + case NVPTX::PTXCvtMode::RM:
>> > + O << ".rm";
>> > + break;
>> > + case NVPTX::PTXCvtMode::RP:
>> > + O << ".rp";
>> > + break;
>> > + }
>> > + } else {
>> > + llvm_unreachable("Invalid conversion modifier");
>> > + }
>> > +}
>> > +
>> > +void NVPTXInstPrinter::printCmpMode(const MCInst *MI, int OpNum,
>> > raw_ostream &O,
>> > + const char *Modifier) {
>> > + const MCOperand &MO = MI->getOperand(OpNum);
>> > + int64_t Imm = MO.getImm();
>> > +
>> > + if (strcmp(Modifier, "ftz") == 0) {
>> > + // FTZ flag
>> > + if (Imm & NVPTX::PTXCmpMode::FTZ_FLAG)
>> > + O << ".ftz";
>> > + } else if (strcmp(Modifier, "base") == 0) {
>> > + switch (Imm & NVPTX::PTXCmpMode::BASE_MASK) {
>> > + default:
>> > + return;
>> > + case NVPTX::PTXCmpMode::EQ:
>> > + O << ".eq";
>> > + break;
>> > + case NVPTX::PTXCmpMode::NE:
>> > + O << ".ne";
>> > + break;
>> > + case NVPTX::PTXCmpMode::LT:
>> > + O << ".lt";
>> > + break;
>> > + case NVPTX::PTXCmpMode::LE:
>> > + O << ".le";
>> > + break;
>> > + case NVPTX::PTXCmpMode::GT:
>> > + O << ".gt";
>> > + break;
>> > + case NVPTX::PTXCmpMode::GE:
>> > + O << ".ge";
>> > + break;
>> > + case NVPTX::PTXCmpMode::LO:
>> > + O << ".lo";
>> > + break;
>> > + case NVPTX::PTXCmpMode::LS:
>> > + O << ".ls";
>> > + break;
>> > + case NVPTX::PTXCmpMode::HI:
>> > + O << ".hi";
>> > + break;
>> > + case NVPTX::PTXCmpMode::HS:
>> > + O << ".hs";
>> > + break;
>> > + case NVPTX::PTXCmpMode::EQU:
>> > + O << ".equ";
>> > + break;
>> > + case NVPTX::PTXCmpMode::NEU:
>> > + O << ".neu";
>> > + break;
>> > + case NVPTX::PTXCmpMode::LTU:
>> > + O << ".ltu";
>> > + break;
>> > + case NVPTX::PTXCmpMode::LEU:
>> > + O << ".leu";
>> > + break;
>> > + case NVPTX::PTXCmpMode::GTU:
>> > + O << ".gtu";
>> > + break;
>> > + case NVPTX::PTXCmpMode::GEU:
>> > + O << ".geu";
>> > + break;
>> > + case NVPTX::PTXCmpMode::NUM:
>> > + O << ".num";
>> > + break;
>> > + case NVPTX::PTXCmpMode::NotANumber:
>> > + O << ".nan";
>> > + break;
>> > + }
>> > + } else {
>> > + llvm_unreachable("Empty Modifier");
>> > + }
>> > +}
>> > +
>> > +void NVPTXInstPrinter::printLdStCode(const MCInst *MI, int OpNum,
>> > + raw_ostream &O, const char
>> > *Modifier) {
>> > + if (Modifier) {
>> > + const MCOperand &MO = MI->getOperand(OpNum);
>> > + int Imm = (int) MO.getImm();
>> > + if (!strcmp(Modifier, "volatile")) {
>> > + if (Imm)
>> > + O << ".volatile";
>> > + } else if (!strcmp(Modifier, "addsp")) {
>> > + switch (Imm) {
>> > + case NVPTX::PTXLdStInstCode::GLOBAL:
>> > + O << ".global";
>> > + break;
>> > + case NVPTX::PTXLdStInstCode::SHARED:
>> > + O << ".shared";
>> > + break;
>> > + case NVPTX::PTXLdStInstCode::LOCAL:
>> > + O << ".local";
>> > + break;
>> > + case NVPTX::PTXLdStInstCode::PARAM:
>> > + O << ".param";
>> > + break;
>> > + case NVPTX::PTXLdStInstCode::CONSTANT:
>> > + O << ".const";
>> > + break;
>> > + case NVPTX::PTXLdStInstCode::GENERIC:
>> > + break;
>> > + default:
>> > + llvm_unreachable("Wrong Address Space");
>> > + }
>> > + } else if (!strcmp(Modifier, "sign")) {
>> > + if (Imm == NVPTX::PTXLdStInstCode::Signed)
>> > + O << "s";
>> > + else if (Imm == NVPTX::PTXLdStInstCode::Unsigned)
>> > + O << "u";
>> > + else
>> > + O << "f";
>> > + } else if (!strcmp(Modifier, "vec")) {
>> > + if (Imm == NVPTX::PTXLdStInstCode::V2)
>> > + O << ".v2";
>> > + else if (Imm == NVPTX::PTXLdStInstCode::V4)
>> > + O << ".v4";
>> > + } else
>> > + llvm_unreachable("Unknown Modifier");
>> > + } else
>> > + llvm_unreachable("Empty Modifier");
>> > +}
>> > +
>> > +void NVPTXInstPrinter::printMemOperand(const MCInst *MI, int OpNum,
>> > + raw_ostream &O, const char
>> > *Modifier) {
>> > + printOperand(MI, OpNum, O);
>> > +
>> > + if (Modifier && !strcmp(Modifier, "add")) {
>> > + O << ", ";
>> > + printOperand(MI, OpNum + 1, O);
>> > + } else {
>> > + if (MI->getOperand(OpNum + 1).isImm() &&
>> > + MI->getOperand(OpNum + 1).getImm() == 0)
>> > + return; // don't print ',0' or '+0'
>> > + O << "+";
>> > + printOperand(MI, OpNum + 1, O);
>> > + }
>> > +}
>> >
>> > Added: llvm/trunk/lib/Target/NVPTX/InstPrinter/NVPTXInstPrinter.h
>> > URL:
>> > http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/InstPrinter/NVPTXInstPrinter.h?rev=187798&view=auto
>> >
>> > ==============================================================================
>> > --- llvm/trunk/lib/Target/NVPTX/InstPrinter/NVPTXInstPrinter.h (added)
>> > +++ llvm/trunk/lib/Target/NVPTX/InstPrinter/NVPTXInstPrinter.h Tue Aug
>> > 6 09:13:27 2013
>> > @@ -0,0 +1,52 @@
>> > +//= NVPTXInstPrinter.h - Convert NVPTX MCInst to assembly syntax --*-
>> > C++ -*-=//
>> > +//
>> > +// The LLVM Compiler Infrastructure
>> > +//
>> > +// This file is distributed under the University of Illinois Open
>> > Source
>> > +// License. See LICENSE.TXT for details.
>> > +//
>> >
>> > +//===----------------------------------------------------------------------===//
>> > +//
>> > +// This class prints an NVPTX MCInst to .ptx file syntax.
>> > +//
>> >
>> > +//===----------------------------------------------------------------------===//
>> > +
>> > +#ifndef NVPTX_INST_PRINTER_H
>> > +#define NVPTX_INST_PRINTER_H
>> > +
>> > +#include "llvm/MC/MCInstPrinter.h"
>> > +#include "llvm/Support/raw_ostream.h"
>> > +
>> > +namespace llvm {
>> > +
>> > +class MCOperand;
>> > +class MCSubtargetInfo;
>> > +
>> > +class NVPTXInstPrinter : public MCInstPrinter {
>> > +public:
>> > + NVPTXInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
>> > + const MCRegisterInfo &MRI, const MCSubtargetInfo
>> > &STI);
>> > +
>> > + virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
>> > + virtual void printInst(const MCInst *MI, raw_ostream &OS, StringRef
>> > Annot);
>> > +
>> > + // Autogenerated by tblgen.
>> > + void printInstruction(const MCInst *MI, raw_ostream &O);
>> > + static const char *getRegisterName(unsigned RegNo);
>> > + // End
>> > +
>> > + void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
>> > + void printCvtMode(const MCInst *MI, int OpNum, raw_ostream &O,
>> > + const char *Modifier = 0);
>> > + void printCmpMode(const MCInst *MI, int OpNum, raw_ostream &O,
>> > + const char *Modifier = 0);
>> > + void printLdStCode(const MCInst *MI, int OpNum,
>> > + raw_ostream &O, const char *Modifier = 0);
>> > + void printMemOperand(const MCInst *MI, int OpNum,
>> > + raw_ostream &O, const char *Modifier = 0);
>> > +
>> > +};
>> > +
>> > +}
>> > +
>> > +#endif
>> >
>> > Modified: llvm/trunk/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp
>> > URL:
>> > http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp?rev=187798&r1=187797&r2=187798&view=diff
>> >
>> > ==============================================================================
>> > --- llvm/trunk/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp
>> > (original)
>> > +++ llvm/trunk/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp Tue
>> > Aug 6 09:13:27 2013
>> > @@ -13,6 +13,7 @@
>> >
>> > #include "NVPTXMCTargetDesc.h"
>> > #include "NVPTXMCAsmInfo.h"
>> > +#include "InstPrinter/NVPTXInstPrinter.h"
>> > #include "llvm/MC/MCCodeGenInfo.h"
>> > #include "llvm/MC/MCInstrInfo.h"
>> > #include "llvm/MC/MCRegisterInfo.h"
>> > @@ -57,6 +58,17 @@ static MCCodeGenInfo *createNVPTXMCCodeG
>> > return X;
>> > }
>> >
>> > +static MCInstPrinter *createNVPTXMCInstPrinter(const Target &T,
>> > + unsigned SyntaxVariant,
>> > + const MCAsmInfo &MAI,
>> > + const MCInstrInfo &MII,
>> > + const MCRegisterInfo
>> > &MRI,
>> > + const MCSubtargetInfo
>> > &STI) {
>> > + if (SyntaxVariant == 0)
>> > + return new NVPTXInstPrinter(MAI, MII, MRI, STI);
>> > + return 0;
>> > +}
>> > +
>> > // Force static initialization.
>> > extern "C" void LLVMInitializeNVPTXTargetMC() {
>> > // Register the MC asm info.
>> > @@ -85,4 +97,9 @@ extern "C" void LLVMInitializeNVPTXTarge
>> > TargetRegistry::RegisterMCSubtargetInfo(TheNVPTXTarget64,
>> > createNVPTXMCSubtargetInfo);
>> >
>> > + // Register the MCInstPrinter.
>> > + TargetRegistry::RegisterMCInstPrinter(TheNVPTXTarget32,
>> > + createNVPTXMCInstPrinter);
>> > + TargetRegistry::RegisterMCInstPrinter(TheNVPTXTarget64,
>> > + createNVPTXMCInstPrinter);
>> > }
>> >
>> > Modified: llvm/trunk/lib/Target/NVPTX/NVPTX.td
>> > URL:
>> > http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTX.td?rev=187798&r1=187797&r2=187798&view=diff
>> >
>> > ==============================================================================
>> > --- llvm/trunk/lib/Target/NVPTX/NVPTX.td (original)
>> > +++ llvm/trunk/lib/Target/NVPTX/NVPTX.td Tue Aug 6 09:13:27 2013
>> > @@ -57,6 +57,12 @@ def : Proc<"sm_35", [SM35]>;
>> > def NVPTXInstrInfo : InstrInfo {
>> > }
>> >
>> > +def NVPTXAsmWriter : AsmWriter {
>> > + bit isMCAsmWriter = 1;
>> > + string AsmWriterClassName = "InstPrinter";
>> > +}
>> > +
>> > def NVPTX : Target {
>> > let InstructionSet = NVPTXInstrInfo;
>> > + let AssemblyWriters = [NVPTXAsmWriter];
>> > }
>> >
>> > Modified: llvm/trunk/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
>> > URL:
>> > http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXAsmPrinter.cpp?rev=187798&r1=187797&r2=187798&view=diff
>> >
>> > ==============================================================================
>> > --- llvm/trunk/lib/Target/NVPTX/NVPTXAsmPrinter.cpp (original)
>> > +++ llvm/trunk/lib/Target/NVPTX/NVPTXAsmPrinter.cpp Tue Aug 6 09:13:27
>> > 2013
>> > @@ -16,6 +16,7 @@
>> > #include "MCTargetDesc/NVPTXMCAsmInfo.h"
>> > #include "NVPTX.h"
>> > #include "NVPTXInstrInfo.h"
>> > +#include "NVPTXMCExpr.h"
>> > #include "NVPTXRegisterInfo.h"
>> > #include "NVPTXTargetMachine.h"
>> > #include "NVPTXUtilities.h"
>> > @@ -46,8 +47,6 @@
>> > #include <sstream>
>> > using namespace llvm;
>> >
>> > -#include "NVPTXGenAsmWriter.inc"
>> > -
>> > bool RegAllocNilUsed = true;
>> >
>> > #define DEPOTNAME "__local_depot"
>> > @@ -309,8 +308,106 @@ void NVPTXAsmPrinter::EmitInstruction(co
>> > raw_svector_ostream OS(Str);
>> > if (nvptxSubtarget.getDrvInterface() == NVPTX::CUDA)
>> > emitLineNumberAsDotLoc(*MI);
>> > - printInstruction(MI, OS);
>> > - OutStreamer.EmitRawText(OS.str());
>> > +
>> > + MCInst Inst;
>> > + lowerToMCInst(MI, Inst);
>> > + OutStreamer.EmitInstruction(Inst);
>> > +}
>> > +
>> > +void NVPTXAsmPrinter::lowerToMCInst(const MachineInstr *MI, MCInst
>> > &OutMI) {
>> > + OutMI.setOpcode(MI->getOpcode());
>> > +
>> > + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
>> > + const MachineOperand &MO = MI->getOperand(i);
>> > +
>> > + MCOperand MCOp;
>> > + if (lowerOperand(MO, MCOp))
>> > + OutMI.addOperand(MCOp);
>> > + }
>> > +}
>> > +
>> > +bool NVPTXAsmPrinter::lowerOperand(const MachineOperand &MO,
>> > + MCOperand &MCOp) {
>> > + switch (MO.getType()) {
>> > + default: llvm_unreachable("unknown operand type");
>> > + case MachineOperand::MO_Register:
>> > + MCOp = MCOperand::CreateReg(encodeVirtualRegister(MO.getReg()));
>> > + break;
>> > + case MachineOperand::MO_Immediate:
>> > + MCOp = MCOperand::CreateImm(MO.getImm());
>> > + break;
>> > + case MachineOperand::MO_MachineBasicBlock:
>> > + MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create(
>> > + MO.getMBB()->getSymbol(), OutContext));
>> > + break;
>> > + case MachineOperand::MO_ExternalSymbol:
>> > + MCOp = GetSymbolRef(MO,
>> > GetExternalSymbolSymbol(MO.getSymbolName()));
>> > + break;
>> > + case MachineOperand::MO_GlobalAddress:
>> > + MCOp = GetSymbolRef(MO, Mang->getSymbol(MO.getGlobal()));
>> > + break;
>> > + case MachineOperand::MO_FPImmediate: {
>> > + const ConstantFP *Cnt = MO.getFPImm();
>> > + APFloat Val = Cnt->getValueAPF();
>> > +
>> > + switch (Cnt->getType()->getTypeID()) {
>> > + default: report_fatal_error("Unsupported FP type"); break;
>> > + case Type::FloatTyID:
>> > + MCOp = MCOperand::CreateExpr(
>> > + NVPTXFloatMCExpr::CreateConstantFPSingle(Val, OutContext));
>> > + break;
>> > + case Type::DoubleTyID:
>> > + MCOp = MCOperand::CreateExpr(
>> > + NVPTXFloatMCExpr::CreateConstantFPDouble(Val, OutContext));
>> > + break;
>> > + }
>> > + break;
>> > + }
>> > + }
>> > + return true;
>> > +}
>> > +
>> > +unsigned NVPTXAsmPrinter::encodeVirtualRegister(unsigned Reg) {
>> > + const TargetRegisterClass *RC = MRI->getRegClass(Reg);
>> > +
>> > + DenseMap<unsigned, unsigned> &RegMap = VRegMapping[RC];
>> > + unsigned RegNum = RegMap[Reg];
>> > +
>> > + // Encode the register class in the upper 4 bits
>> > + // Must be kept in sync with NVPTXInstPrinter::printRegName
>> > + unsigned Ret = 0;
>> > + if (RC == &NVPTX::Int1RegsRegClass) {
>> > + Ret = 0;
>> > + } else if (RC == &NVPTX::Int16RegsRegClass) {
>> > + Ret = (1 << 28);
>> > + } else if (RC == &NVPTX::Int32RegsRegClass) {
>> > + Ret = (2 << 28);
>> > + } else if (RC == &NVPTX::Int64RegsRegClass) {
>> > + Ret = (3 << 28);
>> > + } else if (RC == &NVPTX::Float32RegsRegClass) {
>> > + Ret = (4 << 28);
>> > + } else if (RC == &NVPTX::Float64RegsRegClass) {
>> > + Ret = (5 << 28);
>> > + } else {
>> > + report_fatal_error("Bad register class");
>> > + }
>> > +
>> > + // Insert the vreg number
>> > + Ret |= (RegNum & 0x0FFFFFFF);
>> > + return Ret;
>> > +}
>> > +
>> > +MCOperand NVPTXAsmPrinter::GetSymbolRef(const MachineOperand &MO,
>> > + const MCSymbol *Symbol) {
>> > + const MCExpr *Expr;
>> > + switch (MO.getTargetFlags()) {
>> > + default: {
>> > + Expr = MCSymbolRefExpr::Create(Symbol, MCSymbolRefExpr::VK_None,
>> > + OutContext);
>> > + break;
>> > + }
>>
>> This has introduced a new warning in MSVC:
>>
>>
>> E:\bb-win7\ninja-clang-i686-msc17-R\llvm-project\llvm\lib\Target\NVPTX\NVPTXAsmPrinter.cpp(415)
>> : warning C4065: switch statement contains 'default' but no 'case'
>> labels
>>
>> Can you please rectify?
>>
>> Thanks!
>>
>> ~Aaron
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
>
>
>
> --
>
> Thanks,
>
> Justin Holewinski
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