[llvm] r187516 - R600: Do not mergevector after a vector reg is used

Vincent Lejeune vljn at ovi.com
Wed Jul 31 12:32:12 PDT 2013


Author: vljn
Date: Wed Jul 31 14:32:12 2013
New Revision: 187516

URL: http://llvm.org/viewvc/llvm-project?rev=187516&view=rev
Log:
R600: Do not mergevector after a vector reg is used

If we merge vector when a vector is used, it will generate an artificial
antidependency that can prevent 2 tex/vtx instructions to use the same
clause and thus generate extra clauses that reduce performance.

There is no test case as such situation is really hard to predict.

Modified:
    llvm/trunk/lib/Target/R600/R600OptimizeVectorRegisters.cpp

Modified: llvm/trunk/lib/Target/R600/R600OptimizeVectorRegisters.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/R600OptimizeVectorRegisters.cpp?rev=187516&r1=187515&r2=187516&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/R600OptimizeVectorRegisters.cpp (original)
+++ llvm/trunk/lib/Target/R600/R600OptimizeVectorRegisters.cpp Wed Jul 31 14:32:12 2013
@@ -322,8 +322,17 @@ bool R600VectorRegMerger::runOnMachineFu
     for (MachineBasicBlock::iterator MII = MB->begin(), MIIE = MB->end();
          MII != MIIE; ++MII) {
       MachineInstr *MI = MII;
-      if (MI->getOpcode() != AMDGPU::REG_SEQUENCE)
+      if (MI->getOpcode() != AMDGPU::REG_SEQUENCE) {
+        if (TII->get(MI->getOpcode()).TSFlags & R600_InstFlag::TEX_INST) {
+          unsigned Reg = MI->getOperand(1).getReg();
+          for (MachineRegisterInfo::def_iterator It = MRI->def_begin(Reg),
+              E = MRI->def_end(); It != E; ++It) {
+            RemoveMI(&(*It));
+          }
+        }
         continue;
+      }
+
 
       RegSeqInfo RSI(*MRI, MI);
 





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