[llvm] r187510 - R600: Remove predicated_break inst

Vincent Lejeune vljn at ovi.com
Wed Jul 31 12:31:15 PDT 2013


Author: vljn
Date: Wed Jul 31 14:31:14 2013
New Revision: 187510

URL: http://llvm.org/viewvc/llvm-project?rev=187510&view=rev
Log:
R600: Remove predicated_break inst

We were using two instructions for similar purpose : break and
predicated break. Only predicated_break was emitted and it was
lowered at R600ControlFlowFinalizer to JUMP;CF_BREAK;POP.
This commit simplify the situation by making AMDILCFGStructurizer
emit IF_PREDICATE;BREAK;ENDIF; instead of predicated_break (which
is now removed).

There is no functionality change.

Modified:
    llvm/trunk/lib/Target/R600/AMDILCFGStructurizer.cpp
    llvm/trunk/lib/Target/R600/R600ControlFlowFinalizer.cpp
    llvm/trunk/lib/Target/R600/R600ExpandSpecialInstrs.cpp
    llvm/trunk/lib/Target/R600/R600Instructions.td

Modified: llvm/trunk/lib/Target/R600/AMDILCFGStructurizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDILCFGStructurizer.cpp?rev=187510&r1=187509&r2=187510&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/AMDILCFGStructurizer.cpp (original)
+++ llvm/trunk/lib/Target/R600/AMDILCFGStructurizer.cpp Wed Jul 31 14:31:14 2013
@@ -251,7 +251,6 @@ protected:
   MachineInstr *getLoopendBlockBranchInstr(MachineBasicBlock *MBB);
   static MachineInstr *getReturnInstr(MachineBasicBlock *MBB);
   static MachineInstr *getContinueInstr(MachineBasicBlock *MBB);
-  static MachineInstr *getLoopBreakInstr(MachineBasicBlock *MBB);
   static bool isReturnBlock(MachineBasicBlock *MBB);
   static void cloneSuccessorList(MachineBasicBlock *DstMBB,
       MachineBasicBlock *SrcMBB) ;
@@ -668,16 +667,6 @@ MachineInstr *AMDGPUCFGStructurizer::get
   return NULL;
 }
 
-MachineInstr *AMDGPUCFGStructurizer::getLoopBreakInstr(MachineBasicBlock *MBB) {
-  for (MachineBasicBlock::iterator It = MBB->begin(); (It != MBB->end());
-      ++It) {
-    MachineInstr *MI = &(*It);
-    if (MI->getOpcode() == AMDGPU::PREDICATED_BREAK)
-      return MI;
-  }
-  return NULL;
-}
-
 bool AMDGPUCFGStructurizer::isReturnBlock(MachineBasicBlock *MBB) {
   MachineInstr *MI = getReturnInstr(MBB);
   bool IsReturn = (MBB->succ_size() == 0);
@@ -1529,26 +1518,8 @@ void AMDGPUCFGStructurizer::mergeLooplan
   DEBUG(dbgs() << "loopPattern header = BB" << DstBlk->getNumber()
                << " land = BB" << LandMBB->getNumber() << "\n";);
 
-  /* we last inserterd the DebugLoc in the
-   * BREAK_LOGICALZ_i32 or AMDGPU::BREAK_LOGICALNZ statement in the current
-   * dstBlk.
-   * search for the DebugLoc in the that statement.
-   * if not found, we have to insert the empty/default DebugLoc */
-  MachineInstr *LoopBreakInstr = getLoopBreakInstr(DstBlk);
-  DebugLoc DLBreak = (LoopBreakInstr) ? LoopBreakInstr->getDebugLoc() :
-      DebugLoc();
-
-  insertInstrBefore(DstBlk, AMDGPU::WHILELOOP, DLBreak);
-
-  /* we last inserterd the DebugLoc in the continue statement in the current
-   * dstBlk.
-   * search for the DebugLoc in the continue statement.
-   * if not found, we have to insert the empty/default DebugLoc */
-  MachineInstr *ContinueInstr = getContinueInstr(DstBlk);
-  DebugLoc DLContinue = (ContinueInstr) ? ContinueInstr->getDebugLoc() :
-      DebugLoc();
-
-  insertInstrEnd(DstBlk, AMDGPU::ENDLOOP, DLContinue);
+  insertInstrBefore(DstBlk, AMDGPU::WHILELOOP, DebugLoc());
+  insertInstrEnd(DstBlk, AMDGPU::ENDLOOP, DebugLoc());
   DstBlk->addSuccessor(LandMBB);
   DstBlk->removeSuccessor(DstBlk);
 }
@@ -1565,7 +1536,9 @@ void AMDGPUCFGStructurizer::mergeLoopbre
   MachineBasicBlock::iterator I = BranchMI;
   if (TrueBranch != LandMBB)
     reversePredicateSetter(I);
-  insertCondBranchBefore(I, AMDGPU::PREDICATED_BREAK, DL);
+  insertCondBranchBefore(ExitingMBB, I, AMDGPU::IF_PREDICATE_SET, AMDGPU::PREDICATE_BIT, DL);
+  insertInstrBefore(I, AMDGPU::BREAK);
+  insertInstrBefore(I, AMDGPU::ENDIF);
   //now branchInst can be erase safely
   BranchMI->eraseFromParent();
   //now take care of successors, retire blocks

Modified: llvm/trunk/lib/Target/R600/R600ControlFlowFinalizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/R600ControlFlowFinalizer.cpp?rev=187510&r1=187509&r2=187510&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/R600ControlFlowFinalizer.cpp (original)
+++ llvm/trunk/lib/Target/R600/R600ControlFlowFinalizer.cpp Wed Jul 31 14:31:14 2013
@@ -457,18 +457,11 @@ public:
           MI->eraseFromParent();
           break;
         }
-        case AMDGPU::PREDICATED_BREAK: {
-          CurrentStack--;
-          CfCount += 3;
-          BuildMI(MBB, MI, MBB.findDebugLoc(MI), getHWInstrDesc(CF_JUMP))
-              .addImm(CfCount)
-              .addImm(1);
+        case AMDGPU::BREAK: {
+          CfCount ++;
           MachineInstr *MIb = BuildMI(MBB, MI, MBB.findDebugLoc(MI),
               getHWInstrDesc(CF_LOOP_BREAK))
               .addImm(0);
-          BuildMI(MBB, MI, MBB.findDebugLoc(MI), getHWInstrDesc(CF_POP))
-              .addImm(CfCount)
-              .addImm(1);
           LoopStack.back().second.insert(MIb);
           MI->eraseFromParent();
           break;

Modified: llvm/trunk/lib/Target/R600/R600ExpandSpecialInstrs.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/R600ExpandSpecialInstrs.cpp?rev=187510&r1=187509&r2=187510&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/R600ExpandSpecialInstrs.cpp (original)
+++ llvm/trunk/lib/Target/R600/R600ExpandSpecialInstrs.cpp Wed Jul 31 14:31:14 2013
@@ -89,21 +89,6 @@ bool R600ExpandSpecialInstrsPass::runOnM
         MI.eraseFromParent();
         continue;
         }
-      case AMDGPU::BREAK: {
-        MachineInstr *PredSet = TII->buildDefaultInstruction(MBB, I,
-                                          AMDGPU::PRED_SETE_INT,
-                                          AMDGPU::PREDICATE_BIT,
-                                          AMDGPU::ZERO,
-                                          AMDGPU::ZERO);
-        TII->addFlag(PredSet, 0, MO_FLAG_MASK);
-        TII->setImmOperand(PredSet, AMDGPU::OpName::update_exec_mask, 1);
-
-        BuildMI(MBB, I, MBB.findDebugLoc(I),
-                TII->get(AMDGPU::PREDICATED_BREAK))
-                .addReg(AMDGPU::PREDICATE_BIT);
-        MI.eraseFromParent();
-        continue;
-        }
 
       case AMDGPU::INTERP_PAIR_XY: {
         MachineInstr *BMI;

Modified: llvm/trunk/lib/Target/R600/R600Instructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/R600Instructions.td?rev=187510&r1=187509&r2=187510&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/R600Instructions.td (original)
+++ llvm/trunk/lib/Target/R600/R600Instructions.td Wed Jul 31 14:31:14 2013
@@ -1883,9 +1883,6 @@ def VTX_READ_GLOBAL_128_cm : VTX_READ_12
 def IF_PREDICATE_SET  : ILFormat<(outs), (ins GPRI32:$src),
   "IF_PREDICATE_SET $src", []>;
 
-def PREDICATED_BREAK : ILFormat<(outs), (ins GPRI32:$src),
-  "PREDICATED_BREAK $src", []>;
-
 //===----------------------------------------------------------------------===//
 // Pseudo instructions
 //===----------------------------------------------------------------------===//





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