[llvm] r187433 - [Sparc] Rewrite MBB's live-in registers for leaf functions. Also, add

[Venkatraman Govindaraju]

Author: venkatra
Date: Tue Jul 30 14:53:10 2013
New Revision: 187433

URL: http://llvm.org/viewvc/llvm-project?rev=187433&view=rev
Log:
[Sparc] Rewrite MBB's live-in registers for leaf functions. Also, add
register i7 as a live-in if current function's return address is taken.

This revision fixes PR16269.


Modified:
    llvm/trunk/lib/Target/Sparc/SparcFrameLowering.cpp
    llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp

Modified: llvm/trunk/lib/Target/Sparc/SparcFrameLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcFrameLowering.cpp?rev=187433&r1=187432&r2=187433&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcFrameLowering.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcFrameLowering.cpp Tue Jul 30 14:53:10 2013
@@ -188,6 +188,17 @@ void SparcFrameLowering::remapRegsForLea
     MRI.setPhysRegUnused(reg);
   }
 
+  // Rewrite MBB's Live-ins.
+  for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
+       MBB != E; ++MBB) {
+    for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) {
+      if (!MBB->isLiveIn(reg))
+        continue;
+      MBB->removeLiveIn(reg);
+      MBB->addLiveIn(reg - SP::I0 + SP::O0);
+    }
+  }
+
   assert(verifyLeafProcRegUse(&MRI));
 #ifdef XDEBUG
   MF.verify(0, "After LeafProc Remapping");

Modified: llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp?rev=187433&r1=187432&r2=187433&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp Tue Jul 30 14:53:10 2013
@@ -1722,20 +1722,22 @@ static SDValue LowerFRAMEADDR(SDValue Op
   return FrameAddr;
 }
 
-static SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) {
-  MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
+static SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG,
+                               const SparcTargetLowering &TLI) {
+  MachineFunction &MF = DAG.getMachineFunction();
+  MachineFrameInfo *MFI = MF.getFrameInfo();
   MFI->setReturnAddressIsTaken(true);
 
   EVT VT = Op.getValueType();
   SDLoc dl(Op);
-  unsigned RetReg = SP::I7;
-
   uint64_t depth = Op.getConstantOperandVal(0);
 
   SDValue RetAddr;
-  if (depth == 0)
+  if (depth == 0) {
+    unsigned RetReg = MF.addLiveIn(SP::I7,
+                                   TLI.getRegClassFor(TLI.getPointerTy()));
     RetAddr = DAG.getCopyFromReg(DAG.getEntryNode(), dl, RetReg, VT);
-  else {
+  } else {
     // Need frame address to find return address of the caller.
     MFI->setFrameAddressIsTaken(true);
 
@@ -1793,7 +1795,7 @@ LowerOperation(SDValue Op, SelectionDAG
   case ISD::FNEG:
   case ISD::FABS:               return LowerF64Op(Op, DAG);
 
-  case ISD::RETURNADDR:         return LowerRETURNADDR(Op, DAG);
+  case ISD::RETURNADDR:         return LowerRETURNADDR(Op, DAG, *this);
   case ISD::FRAMEADDR:          return LowerFRAMEADDR(Op, DAG);
   case ISD::GlobalTLSAddress:
     llvm_unreachable("TLS not implemented for Sparc.");