[llvm] r187350 - Some Intel Penryn CPUs come with SSE4 disabled. Detect them as core 2.

[Jay Foad]

On 29 July 2013 12:02, Benjamin Kramer <benny.kra at googlemail.com> wrote:
> Author: d0k
> Date: Mon Jul 29 06:02:08 2013
> New Revision: 187350
>
> URL: http://llvm.org/viewvc/llvm-project?rev=187350&view=rev
> Log:
> Some Intel Penryn CPUs come with SSE4 disabled.

... so wouldn't it be better (or at least less confusing) to change
this bit of X86.td so that Penryn doesn't imply SSE4?

def : ProcessorModel<"penryn", SandyBridgeModel,
                     [FeatureSSE41, FeatureCMPXCHG16B, FeatureSlowBTMem]>;

Jay.