[llvm] r187120 - AArch64: don't mask off shift bits when processing JIT relocations.

[Tim Northover]

Author: tnorthover
Date: Thu Jul 25 07:42:52 2013
New Revision: 187120

URL: http://llvm.org/viewvc/llvm-project?rev=187120&view=rev
Log:
AArch64: don't mask off shift bits when processing JIT relocations.

This should actually make the MCJIT tests pass again on AArch64. I don't know
how I missed their failure before.

Modified:
    llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp

Modified: llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp?rev=187120&r1=187119&r2=187120&view=diff
==============================================================================
--- llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp Thu Jul 25 07:42:52 2013
@@ -331,7 +331,7 @@ void RuntimeDyldELF::resolveAArch64Reloc
 
     // AArch64 code is emitted with .rela relocations. The data already in any
     // bits affected by the relocation on entry is garbage.
-    *TargetPtr &= 0xff80001fU;
+    *TargetPtr &= 0xffe0001fU;
     // Immediate goes in bits 20:5 of MOVZ/MOVK instruction
     *TargetPtr |= Result >> (48 - 5);
     // Shift must be "lsl #48", in bits 22:21
@@ -344,7 +344,7 @@ void RuntimeDyldELF::resolveAArch64Reloc
 
     // AArch64 code is emitted with .rela relocations. The data already in any
     // bits affected by the relocation on entry is garbage.
-    *TargetPtr &= 0xff80001fU;
+    *TargetPtr &= 0xffe0001fU;
     // Immediate goes in bits 20:5 of MOVZ/MOVK instruction
     *TargetPtr |= ((Result & 0xffff00000000ULL) >> (32 - 5));
     // Shift must be "lsl #32", in bits 22:21
@@ -356,7 +356,7 @@ void RuntimeDyldELF::resolveAArch64Reloc
 
     // AArch64 code is emitted with .rela relocations. The data already in any
     // bits affected by the relocation on entry is garbage.
-    *TargetPtr &= 0xff80001fU;
+    *TargetPtr &= 0xffe0001fU;
     // Immediate goes in bits 20:5 of MOVZ/MOVK instruction
     *TargetPtr |= ((Result & 0xffff0000U) >> (16 - 5));
     // Shift must be "lsl #16", in bits 22:2
@@ -368,7 +368,7 @@ void RuntimeDyldELF::resolveAArch64Reloc
 
     // AArch64 code is emitted with .rela relocations. The data already in any
     // bits affected by the relocation on entry is garbage.
-    *TargetPtr &= 0xff80001fU;
+    *TargetPtr &= 0xffe0001fU;
     // Immediate goes in bits 20:5 of MOVZ/MOVK instruction
     *TargetPtr |= ((Result & 0xffffU) << 5);
     // Shift must be "lsl #0", in bits 22:21.