[PATCH] Add a target legalize hook for SplitVectorOperand
Eli Friedman
eli.friedman at gmail.com
Wed Jul 24 16:56:31 PDT 2013
Missing testcase for the x86 change.
On Tue, Jul 23, 2013 at 5:10 AM, Justin Holewinski
<justin.holewinski at gmail.com> wrote:
> Updated with X86 legalization patch by Eli Friedman
>
> http://llvm-reviews.chandlerc.com/D1195
>
> CHANGE SINCE LAST DIFF
> http://llvm-reviews.chandlerc.com/D1195?vs=2942&id=2965#toc
>
> Files:
> lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
> lib/Target/X86/X86ISelLowering.cpp
> test/CodeGen/NVPTX/vector-stores.ll
>
> Index: lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
> ===================================================================
> --- lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
> +++ lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
> @@ -1031,6 +1031,10 @@
> dbgs() << "\n");
> SDValue Res = SDValue();
>
> + // See if the target wants to custom split this node.
> + if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false))
> + return false;
> +
> if (Res.getNode() == 0) {
> switch (N->getOpcode()) {
> default:
> Index: lib/Target/X86/X86ISelLowering.cpp
> ===================================================================
> --- lib/Target/X86/X86ISelLowering.cpp
> +++ lib/Target/X86/X86ISelLowering.cpp
> @@ -996,7 +996,7 @@
> setLoadExtAction(ISD::EXTLOAD, MVT::v2f32, Legal);
> }
>
> - if (Subtarget->hasSSE41()) {
> + if (!TM.Options.UseSoftFloat && Subtarget->hasSSE41()) {
> setOperationAction(ISD::FFLOOR, MVT::f32, Legal);
> setOperationAction(ISD::FCEIL, MVT::f32, Legal);
> setOperationAction(ISD::FTRUNC, MVT::f32, Legal);
> Index: test/CodeGen/NVPTX/vector-stores.ll
> ===================================================================
> --- /dev/null
> +++ test/CodeGen/NVPTX/vector-stores.ll
> @@ -0,0 +1,30 @@
> +; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
> +
> +; CHECK: .visible .func foo1
> +; CHECK: st.v2.f32
> +define void @foo1(<2 x float> %val, <2 x float>* %ptr) {
> + store <2 x float> %val, <2 x float>* %ptr
> + ret void
> +}
> +
> +; CHECK: .visible .func foo2
> +; CHECK: st.v4.f32
> +define void @foo2(<4 x float> %val, <4 x float>* %ptr) {
> + store <4 x float> %val, <4 x float>* %ptr
> + ret void
> +}
> +
> +; CHECK: .visible .func foo3
> +; CHECK: st.v2.u32
> +define void @foo3(<2 x i32> %val, <2 x i32>* %ptr) {
> + store <2 x i32> %val, <2 x i32>* %ptr
> + ret void
> +}
> +
> +; CHECK: .visible .func foo4
> +; CHECK: st.v4.u32
> +define void @foo4(<4 x i32> %val, <4 x i32>* %ptr) {
> + store <4 x i32> %val, <4 x i32>* %ptr
> + ret void
> +}
> +
>
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