[llvm] r186913 - R600: Expand vector FNEG

[Tom Stellard]

Author: tstellar
Date: Mon Jul 22 20:47:46 2013
New Revision: 186913

URL: http://llvm.org/viewvc/llvm-project?rev=186913&view=rev
Log:
R600: Expand vector FNEG

Added:
    llvm/trunk/test/CodeGen/R600/fneg.ll
Modified:
    llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp

Modified: llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp?rev=186913&r1=186912&r2=186913&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp Mon Jul 22 20:47:46 2013
@@ -78,6 +78,9 @@ AMDGPUTargetLowering::AMDGPUTargetLoweri
   setOperationAction(ISD::LOAD, MVT::f64, Promote);
   AddPromotedToType(ISD::LOAD, MVT::f64, MVT::i64);
 
+  setOperationAction(ISD::FNEG, MVT::v2f32, Expand);
+  setOperationAction(ISD::FNEG, MVT::v4f32, Expand);
+
   setOperationAction(ISD::MUL, MVT::i64, Expand);
 
   setOperationAction(ISD::UDIV, MVT::i32, Expand);

Added: llvm/trunk/test/CodeGen/R600/fneg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fneg.ll?rev=186913&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fneg.ll (added)
+++ llvm/trunk/test/CodeGen/R600/fneg.ll Mon Jul 22 20:47:46 2013
@@ -0,0 +1,26 @@
+; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
+
+; XXX: There is a bug in the DAGCombiner that lowers fneg to XOR, this test
+; will need to be changed once it is fixed.
+
+; CHECK: @fneg_v2
+; CHECK: XOR_INT
+; CHECK: XOR_INT
+define void @fneg_v2(<2 x float> addrspace(1)* nocapture %out, <2 x float> %in) {
+entry:
+  %0 = fsub <2 x float> <float -0.000000e+00, float -0.000000e+00>, %in
+  store <2 x float> %0, <2 x float> addrspace(1)* %out
+  ret void
+}
+
+; CHECK: @fneg_v4
+; CHECK: XOR_INT
+; CHECK: XOR_INT
+; CHECK: XOR_INT
+; CHECK: XOR_INT
+define void @fneg_v4(<4 x float> addrspace(1)* nocapture %out, <4 x float> %in) {
+entry:
+  %0 = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %in
+  store <4 x float> %0, <4 x float> addrspace(1)* %out
+  ret void
+}