[llvm] r186915 - R600: Use correct LoadExtType when lowering kernel arguments

[Tom Stellard]

Author: tstellar
Date: Mon Jul 22 20:47:58 2013
New Revision: 186915

URL: http://llvm.org/viewvc/llvm-project?rev=186915&view=rev
Log:
R600: Use correct LoadExtType when lowering kernel arguments

Reviewed-by: Vincent Lejeune <vljn at ovi.com>

Modified:
    llvm/trunk/lib/Target/R600/R600ISelLowering.cpp
    llvm/trunk/test/CodeGen/R600/short-args.ll

Modified: llvm/trunk/lib/Target/R600/R600ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/R600ISelLowering.cpp?rev=186915&r1=186914&r2=186915&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/R600ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/R600/R600ISelLowering.cpp Mon Jul 22 20:47:58 2013
@@ -1229,9 +1229,17 @@ SDValue R600TargetLowering::LowerFormalA
     } else {
       ArgVT = VT;
     }
+
+    ISD::LoadExtType LoadType = ISD::EXTLOAD;
+    if (Ins[i].Flags.isZExt()) {
+      LoadType = ISD::ZEXTLOAD;
+    } else if (Ins[i].Flags.isSExt()) {
+      LoadType = ISD::SEXTLOAD;
+    }
+
     PointerType *PtrTy = PointerType::get(VT.getTypeForEVT(*DAG.getContext()),
                                                     AMDGPUAS::PARAM_I_ADDRESS);
-    SDValue Arg = DAG.getExtLoad(ISD::ZEXTLOAD, DL, VT, DAG.getRoot(),
+    SDValue Arg = DAG.getExtLoad(LoadType, DL, VT, DAG.getRoot(),
                                 DAG.getConstant(ParamOffsetBytes, MVT::i32),
                                        MachinePointerInfo(UndefValue::get(PtrTy)),
                                        ArgVT, false, false, ArgBytes);

Modified: llvm/trunk/test/CodeGen/R600/short-args.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/short-args.ll?rev=186915&r1=186914&r2=186915&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/short-args.ll (original)
+++ llvm/trunk/test/CodeGen/R600/short-args.ll Mon Jul 22 20:47:58 2013
@@ -21,6 +21,15 @@ entry:
   ret void
 }
 
+; CHECK: @i8_sext_arg
+; CHECK: VTX_READ_8 T{{[0-9]+\.X, T[0-9]+\.X}}
+define void @i8_sext_arg(i32 addrspace(1)* nocapture %out, i8 signext %in) nounwind {
+entry:
+  %0 = sext i8 %in to i32
+  store i32 %0, i32 addrspace(1)* %out, align 4
+  ret void
+}
+
 ; CHECK: @i16_arg
 ; CHECK: VTX_READ_16 T{{[0-9]+\.X, T[0-9]+\.X}}
 
@@ -40,3 +49,13 @@ entry:
   store i32 %0, i32 addrspace(1)* %out, align 4
   ret void
 }
+
+; CHECK: @i16_sext_arg
+; CHECK: VTX_READ_16 T{{[0-9]+\.X, T[0-9]+\.X}}
+
+define void @i16_sext_arg(i32 addrspace(1)* nocapture %out, i16 signext %in) nounwind {
+entry:
+  %0 = sext i16 %in to i32
+  store i32 %0, i32 addrspace(1)* %out, align 4
+  ret void
+}