[PATCH] Add a target legalize hook for SplitVectorOperand

[Eli Friedman]

On Mon, Jul 22, 2013 at 6:23 PM, Eli Friedman <eli.friedman at gmail.com> wrote:
> On Mon, Jul 22, 2013 at 6:20 PM, Eli Friedman <eli.friedman at gmail.com> wrote:
>> On Mon, Jul 22, 2013 at 6:03 PM, Justin Holewinski
>> <justin.holewinski at gmail.com> wrote:
>>> To be more specific, the X86 target declares that v2i64 extract_vector_elt
>>> needs to be custom lowered:
>>>
>>>     if (Subtarget->is64Bit()) {
>>>       setOperationAction(ISD::INSERT_VECTOR_ELT,  MVT::v2i64, Custom);
>>>       setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2i64, Custom);
>>>     }
>>>
>>> But if the element type is i64 and the index is constant, then its lowered
>>> to itself:
>>>
>>>   if (VT == MVT::i32 || VT == MVT::i64) {
>>>     // ExtractPS/pextrq works with constant index.
>>>     if (isa<ConstantSDNode>(Op.getOperand(1)))
>>>       return Op;
>>>   }
>>
>> If you don't mind fixing it, the condition should be "VT == MVT::i32
>> || (Subtarget->is64Bit() && VT == MVT::i64))".  Same idea applies to
>> LowerINSERT_VECTOR_ELT_SSE4.
>
> Err, wait, what am I thinking. Nevermind, I'll have to think about it
> a bit more.

Ah, I see what's happening.  Try the following patch:

diff --git a/lib/Target/X86/X86ISelLowering.cpp
b/lib/Target/X86/X86ISelLowering.cpp
index 8f80243..46ebc76 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -996,7 +996,7 @@ void X86TargetLowering::resetOperationActions() {
     setLoadExtAction(ISD::EXTLOAD,              MVT::v2f32, Legal);
   }

-  if (Subtarget->hasSSE41()) {
+  if (!TM.Options.UseSoftFloat && Subtarget->hasSSE41()) {
     setOperationAction(ISD::FFLOOR,             MVT::f32,   Legal);
     setOperationAction(ISD::FCEIL,              MVT::f32,   Legal);
     setOperationAction(ISD::FTRUNC,             MVT::f32,   Legal);

-Eli