[PATCH] Improve llvm-mc disassembly mode for testing

[Tim Northover]

  After Kristof's comments, I've improved the naming of the test files to be more consistent.

  I still think it's worthwhile having the (current) v8 tests in a different file. An encoding that's never valid is rather different from one that just isn't valid on some particular CPU.

http://llvm-reviews.chandlerc.com/D1177

CHANGE SINCE LAST DIFF
  http://llvm-reviews.chandlerc.com/D1177?vs=2886&id=2903#toc

Files:
  test/MC/Disassembler/ARM/invalid-BFI-arm.txt
  test/MC/Disassembler/ARM/invalid-CDP2-arm.txt
  test/MC/Disassembler/ARM/invalid-CPS-arm.txt
  test/MC/Disassembler/ARM/invalid-CPS2p-arm.txt
  test/MC/Disassembler/ARM/invalid-CPS3p-arm.txt
  test/MC/Disassembler/ARM/invalid-IT-CBNZ-thumb.txt
  test/MC/Disassembler/ARM/invalid-IT-thumb.txt
  test/MC/Disassembler/ARM/invalid-LDC-form-arm.txt
  test/MC/Disassembler/ARM/invalid-LDM-thumb.txt
  test/MC/Disassembler/ARM/invalid-LDR-thumb.txt
  test/MC/Disassembler/ARM/invalid-LDRB_POST-arm.txt
  test/MC/Disassembler/ARM/invalid-LDRD_PRE-thumb.txt
  test/MC/Disassembler/ARM/invalid-LDR_POST-arm.txt
  test/MC/Disassembler/ARM/invalid-LDR_PRE-arm.txt
  test/MC/Disassembler/ARM/invalid-LDRrs-arm.txt
  test/MC/Disassembler/ARM/invalid-MCR-arm.txt
  test/MC/Disassembler/ARM/invalid-MOVTi16-arm.txt
  test/MC/Disassembler/ARM/invalid-MOVr-arm.txt
  test/MC/Disassembler/ARM/invalid-MOVs-arm.txt
  test/MC/Disassembler/ARM/invalid-MRRC2-arm.txt
  test/MC/Disassembler/ARM/invalid-MSRi-arm.txt
  test/MC/Disassembler/ARM/invalid-NEON-thumb.txt
  test/MC/Disassembler/ARM/invalid-RFEorLDMIA-arm.txt
  test/MC/Disassembler/ARM/invalid-SBFX-arm.txt
  test/MC/Disassembler/ARM/invalid-SMLAD-arm.txt
  test/MC/Disassembler/ARM/invalid-SRS-arm.txt
  test/MC/Disassembler/ARM/invalid-STMIA_UPD-thumb.txt
  test/MC/Disassembler/ARM/invalid-STR-thumb.txt
  test/MC/Disassembler/ARM/invalid-SXTB-arm.txt
  test/MC/Disassembler/ARM/invalid-UMAAL-arm.txt
  test/MC/Disassembler/ARM/invalid-VCVT-arm.txt
  test/MC/Disassembler/ARM/invalid-VEXTd-arm.txt
  test/MC/Disassembler/ARM/invalid-VFP-thumb.txt
  test/MC/Disassembler/ARM/invalid-VLD1DUPq8_UPD-arm.txt
  test/MC/Disassembler/ARM/invalid-VLD1LNd32_UPD-thumb.txt
  test/MC/Disassembler/ARM/invalid-VLD3DUPd32_UPD-thumb.txt
  test/MC/Disassembler/ARM/invalid-VLD4DUPd32_UPD-thumb.txt
  test/MC/Disassembler/ARM/invalid-VLD4LNd32_UPD-thumb.txt
  test/MC/Disassembler/ARM/invalid-VLDMSDB_UPD-arm.txt
  test/MC/Disassembler/ARM/invalid-VLDST-arm.txt
  test/MC/Disassembler/ARM/invalid-VMOV-arm.txt
  test/MC/Disassembler/ARM/invalid-VQADD-arm.txt
  test/MC/Disassembler/ARM/invalid-VST1LNd32_UPD-thumb.txt
  test/MC/Disassembler/ARM/invalid-VST1d8Twb_register-thumb.txt
  test/MC/Disassembler/ARM/invalid-VST2b32_UPD-arm.txt
  test/MC/Disassembler/ARM/invalid-VST4LNd32_UPD-thumb.txt
  test/MC/Disassembler/ARM/invalid-armv7.txt
  test/MC/Disassembler/ARM/invalid-because-armv7.txt
  test/MC/Disassembler/ARM/invalid-hint-arm.txt
  test/MC/Disassembler/ARM/invalid-hint-thumb.txt
  test/MC/Disassembler/ARM/invalid-t2Bcc-thumb.txt
  test/MC/Disassembler/ARM/invalid-t2LDRBT-thumb.txt
  test/MC/Disassembler/ARM/invalid-t2LDREXD-thumb.txt
  test/MC/Disassembler/ARM/invalid-t2LDRSHi12-thumb.txt
  test/MC/Disassembler/ARM/invalid-t2LDRSHi8-thumb.txt
  test/MC/Disassembler/ARM/invalid-t2PUSH-thumb.txt
  test/MC/Disassembler/ARM/invalid-t2STRD_PRE-thumb.txt
  test/MC/Disassembler/ARM/invalid-t2STREXB-thumb.txt
  test/MC/Disassembler/ARM/invalid-t2STREXD-thumb.txt
  test/MC/Disassembler/ARM/invalid-t2STR_POST-thumb.txt
  test/MC/Disassembler/ARM/invalid-thumbv7-xfail.txt
  test/MC/Disassembler/ARM/invalid-thumbv7.txt
  test/MC/Disassembler/ARM/invalid-v8fp.txt
  tools/llvm-mc/Disassembler.cpp
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