[llvm] r186529 - Silencing an MSVC warning about signed vs unsigned comparison mismatches.

[Aaron Ballman]

Author: aaronballman
Date: Wed Jul 17 14:43:13 2013
New Revision: 186529

URL: http://llvm.org/viewvc/llvm-project?rev=186529&view=rev
Log:
Silencing an MSVC warning about signed vs unsigned comparison mismatches.

Modified:
    llvm/trunk/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp

Modified: llvm/trunk/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp?rev=186529&r1=186528&r2=186529&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp Wed Jul 17 14:43:13 2013
@@ -781,7 +781,7 @@ SDNode *SystemZDAGToDAGISel::tryRISBGZer
   // all cases and are sometimes shorter.  Prefer to use RISBG for ANDs though,
   // since it is effectively a three-operand instruction in this case,
   // and since it can handle some masks that AND IMMEDIATE can't.
-  if (Count < (N->getOpcode() == ISD::AND ? 1 : 2))
+  if (Count < (N->getOpcode() == ISD::AND ? 1U : 2U))
     return 0;
 
   // Prefer register extensions like LLC over RISBG.