[RFC, PowerPC] Initial fast-isel support for PPC64

[Jakob Stoklund Olesen]

On Jul 16, 2013, at 7:19 PM, Bill Schmidt <wschmidt at linux.vnet.ibm.com> wrote:

> I don't think there's much we can do to make the no-r0 stuff a lot
> better (item f), at least without disturbing the common machinery for
> all targets.  There are a number of places where generic fast-isel
> assumes a single register class for a given type, even when the target
> has multiple classes that can work.  It seems the DAG-isel code is able
> to unify such register classes to make sure we never use R0 for a
> register lifetime containing a use that forbids R0; but fast-isel is too
> myopic for that, so we have to fix it up somehow.

TableGen synthesizes a GPRC_and_GPRC_NOR0 register class representing the intersection of GPRC and GPRC_NOR0. If you use that intersection class, you shouldn’t have any problems with instructions that don’t accept R0.

I’d recommend that your define the register class explicitly in the .td file instead of using TableGen’s synthetic name.

Thanks,
/jakob