[llvm] r186461 - Related to r181161 - Indirect branches may not be the last branch in a basic

[Lang Hames]

Author: lhames
Date: Tue Jul 16 17:01:40 2013
New Revision: 186461

URL: http://llvm.org/viewvc/llvm-project?rev=186461&view=rev
Log:
Related to r181161 - Indirect branches may not be the last branch in a basic
block. Blocks that have an indirect branch terminator, even if it's not the
last terminator, should still be treated as unanalyzable.

<rdar://problem/14437274>

Reducing a useful regression test case is proving difficult - I hope to have
one soon.


Modified:
    llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=186461&r1=186460&r2=186461&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Tue Jul 16 17:01:40 2013
@@ -295,6 +295,11 @@ ARMBaseInstrInfo::AnalyzeBranch(MachineB
   if (!isUnpredicatedTerminator(I))
     return false;
 
+  // Check whether the second-to-last branch is indirect, return
+  // 'unanalyzeable' here too.
+  if (I != MBB.begin() && prior(I)->isIndirectBranch())
+    return true;
+
   // If there is only one terminator instruction, process it.
   if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) {
     if (isUncondBranchOpcode(LastOpc)) {
@@ -322,6 +327,8 @@ ARMBaseInstrInfo::AnalyzeBranch(MachineB
       LastInst->eraseFromParent();
       LastInst = SecondLastInst;
       LastOpc = LastInst->getOpcode();
+      if (I != MBB.begin() && prior(I)->isIndirectBranch())
+        return true; // Indirect branches are unanalyzeable.
       if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) {
         // Return now the only terminator is an unconditional branch.
         TBB = LastInst->getOperand(0).getMBB();