[PATCH] [ARMv8] New NEON instructions vmaxnm/vminnm.

Joey Gouly joey.gouly at arm.com
Tue Jul 16 04:38:58 PDT 2013


  Hi Tim,

  >The problem: doesn't this enable these instructions even on v7 cores?

  Yes, that's wrong. I need to add Requires<> for v8 too.

  > 1. These seem to be the first NEON instructions to have separate
  > ARM/Thumb variants like that. Why didn't the conventional mechanism
  > (whatever that is) work in this case?

  Currently, the Decoder/Encoder namespaces do pre/post processing, and none of these match the bit changes that these instructions have. If I add a separate Decoder namepsace and PostEncoders, I can match the current style.

  > 2. Why the "np" variants. Aren't all NEON instructions unpredicated?

  They are, unless they are inside an IT block. These instructions can't be used inside an IT block, so shouldn't accept a condition code suffix.

  > 3. Why the "NEONDup" namespace? If shares a common feature with DUP,
  > the namespace should probably be renamed to reflect that.

  The NEONDup is the only namespace that doesn't do pre-processing of instructions in the disassembler. I was actually going to rename it (I talked with Owen, and he seemed fine with that), to just "NEON", since that's not actually being used. (Although, this may be changed by point 1.)

  Thanks,
  Joey

http://llvm-reviews.chandlerc.com/D1153



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