[llvm] r186283 - Properly lower jump tables on MSP430. Patch by Job Noorman!

[Anton Korobeynikov]

Author: asl
Date: Sun Jul 14 10:11:00 2013
New Revision: 186283

URL: http://llvm.org/viewvc/llvm-project?rev=186283&view=rev
Log:
Properly lower jump tables on MSP430. Patch by Job Noorman!

Modified:
    llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp
    llvm/trunk/test/CodeGen/MSP430/jumptable.ll

Modified: llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp?rev=186283&r1=186282&r2=186283&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp Sun Jul 14 10:11:00 2013
@@ -987,8 +987,8 @@ SDValue MSP430TargetLowering::LowerJumpT
                                              SelectionDAG &DAG) const {
     JumpTableSDNode *JT = cast<JumpTableSDNode>(Op);
     SDValue Result = DAG.getTargetJumpTable(JT->getIndex(), getPointerTy());
-    Result.getNode()->setDebugLoc(JT->getDebugLoc());
-    return Result;
+    return DAG.getNode(MSP430ISD::Wrapper, SDLoc(JT),
+                       getPointerTy(), Result);
 }
 
 /// getPostIndexedAddressParts - returns true by value, base pointer and

Modified: llvm/trunk/test/CodeGen/MSP430/jumptable.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MSP430/jumptable.ll?rev=186283&r1=186282&r2=186283&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MSP430/jumptable.ll (original)
+++ llvm/trunk/test/CodeGen/MSP430/jumptable.ll Sun Jul 14 10:11:00 2013
@@ -1,4 +1,4 @@
-; RUN: llc -O0 < %s | FileCheck %s
+; RUN: llc < %s | FileCheck %s
 
 target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"
 target triple = "msp430---elf"
@@ -11,9 +11,9 @@ entry:
   %i.addr = alloca i16, align 2
   store i16 %i, i16* %i.addr, align 2
   %0 = load i16* %i.addr, align 2
-; CHECK: add.w #.LJTI0_0, [[REG1:r[0-9]+]]
-; CHECK: mov.w 0([[REG1]]), [[REG2:r[0-9]+]]
-; CHECK: mov.w [[REG2]], pc
+; CHECK: mov.w #2, r14
+; CHECK: call #__mulhi3hw_noint
+; CHECK: mov.w .LJTI0_0(r15), pc
   switch i16 %0, label %sw.default [
     i16 0, label %sw.bb
     i16 1, label %sw.bb1
@@ -49,6 +49,6 @@ return:
 
 ; CHECK: .LJTI0_0:
 ; CHECK-NEXT: .short .LBB0_2
-; CHECK-NEXT: .short .LBB0_3
 ; CHECK-NEXT: .short .LBB0_4
+; CHECK-NEXT: .short .LBB0_3
 ; CHECK-NEXT: .short .LBB0_5