[llvm] r186280 - Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
Stephen Lin
stephenwlin at gmail.com
Sat Jul 13 23:24:16 PDT 2013
Modified: llvm/trunk/test/CodeGen/X86/non-lazy-bind.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/non-lazy-bind.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/non-lazy-bind.ll (original)
+++ llvm/trunk/test/CodeGen/X86/non-lazy-bind.ll Sun Jul 14 01:24:09 2013
@@ -3,7 +3,7 @@
declare void @lazy() nonlazybind
declare void @not()
-; CHECK: foo:
+; CHECK-LABEL: foo:
; CHECK: callq _not
; CHECK: callq *_lazy at GOTPCREL(%rip)
define void @foo() nounwind {
@@ -12,14 +12,14 @@ define void @foo() nounwind {
ret void
}
-; CHECK: tail_call_regular:
+; CHECK-LABEL: tail_call_regular:
; CHECK: jmp _not
define void @tail_call_regular() nounwind {
tail call void @not()
ret void
}
-; CHECK: tail_call_eager:
+; CHECK-LABEL: tail_call_eager:
; CHECK: jmpq *_lazy at GOTPCREL(%rip)
define void @tail_call_eager() nounwind {
tail call void @lazy()
Modified: llvm/trunk/test/CodeGen/X86/optimize-max-3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/optimize-max-3.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/optimize-max-3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/optimize-max-3.ll Sun Jul 14 01:24:09 2013
@@ -3,7 +3,7 @@
; LSR's OptimizeMax should eliminate the select (max).
-; CHECK: foo:
+; CHECK-LABEL: foo:
; CHECK-NOT: cmov
; CHECK: jle
@@ -37,7 +37,7 @@ for.end:
; OptimizeMax should handle this case.
; PR7454
-; CHECK: _Z18GenerateStatusPagei:
+; CHECK-LABEL: _Z18GenerateStatusPagei:
; CHECK: jle
; CHECK-NOT: cmov
Modified: llvm/trunk/test/CodeGen/X86/palignr-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/palignr-2.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/palignr-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/palignr-2.ll Sun Jul 14 01:24:09 2013
@@ -7,7 +7,7 @@
define void @t1(<2 x i64> %a, <2 x i64> %b) nounwind ssp {
entry:
-; CHECK: t1:
+; CHECK-LABEL: t1:
; palignr $3, %xmm1, %xmm0
%0 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %a, <2 x i64> %b, i8 24) nounwind readnone
store <2 x i64> %0, <2 x i64>* bitcast ([4 x i32]* @c to <2 x i64>*), align 16
@@ -18,7 +18,7 @@ declare <2 x i64> @llvm.x86.ssse3.palign
define void @t2() nounwind ssp {
entry:
-; CHECK: t2:
+; CHECK-LABEL: t2:
; palignr $4, _b, %xmm0
%0 = load <2 x i64>* bitcast ([4 x i32]* @b to <2 x i64>*), align 16 ; <<2 x i64>> [#uses=1]
%1 = load <2 x i64>* bitcast ([4 x i32]* @a to <2 x i64>*), align 16 ; <<2 x i64>> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/pass-three.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pass-three.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pass-three.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pass-three.ll Sun Jul 14 01:24:09 2013
@@ -11,6 +11,6 @@ entry:
ret { i8*, i64, i64* } %2
}
-; CHECK: copy_3:
+; CHECK-LABEL: copy_3:
; CHECK-NOT: (%rdi)
; CHECK: ret
Modified: llvm/trunk/test/CodeGen/X86/peep-test-3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/peep-test-3.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/peep-test-3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/peep-test-3.ll Sun Jul 14 01:24:09 2013
@@ -3,7 +3,7 @@
; LLVM should omit the testl and use the flags result from the orl.
-; CHECK: or:
+; CHECK-LABEL: or:
define void @or(float* %A, i32 %IA, i32 %N) nounwind {
entry:
%0 = ptrtoint float* %A to i32 ; <i32> [#uses=1]
@@ -22,7 +22,7 @@ bb:
return: ; preds = %entry
ret void
}
-; CHECK: xor:
+; CHECK-LABEL: xor:
define void @xor(float* %A, i32 %IA, i32 %N) nounwind {
entry:
%0 = ptrtoint float* %A to i32 ; <i32> [#uses=1]
@@ -41,7 +41,7 @@ bb:
return: ; preds = %entry
ret void
}
-; CHECK: and:
+; CHECK-LABEL: and:
define void @and(float* %A, i32 %IA, i32 %N, i8* %p) nounwind {
entry:
store i8 0, i8* %p
Modified: llvm/trunk/test/CodeGen/X86/peep-test-4.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/peep-test-4.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/peep-test-4.ll (original)
+++ llvm/trunk/test/CodeGen/X86/peep-test-4.ll Sun Jul 14 01:24:09 2013
@@ -2,7 +2,7 @@
declare void @foo(i32)
declare void @foo64(i64)
-; CHECK: neg:
+; CHECK-LABEL: neg:
; CHECK: negl %edi
; CHECK-NEXT: je
; CHECK: jmp foo
@@ -20,7 +20,7 @@ return:
ret void
}
-; CHECK: sar:
+; CHECK-LABEL: sar:
; CHECK: sarl %edi
; CHECK-NEXT: je
; CHECK: jmp foo
@@ -38,7 +38,7 @@ return:
ret void
}
-; CHECK: shr:
+; CHECK-LABEL: shr:
; CHECK: shrl %edi
; CHECK-NEXT: je
; CHECK: jmp foo
@@ -56,7 +56,7 @@ return:
ret void
}
-; CHECK: shri:
+; CHECK-LABEL: shri:
; CHECK: shrl $3, %edi
; CHECK-NEXT: je
; CHECK: jmp foo
@@ -74,7 +74,7 @@ return:
ret void
}
-; CHECK: shl:
+; CHECK-LABEL: shl:
; CHECK: addl %edi, %edi
; CHECK-NEXT: je
; CHECK: jmp foo
@@ -92,7 +92,7 @@ return:
ret void
}
-; CHECK: shli:
+; CHECK-LABEL: shli:
; CHECK: shll $4, %edi
; CHECK-NEXT: je
; CHECK: jmp foo
@@ -110,7 +110,7 @@ return:
ret void
}
-; CHECK: adc:
+; CHECK-LABEL: adc:
; CHECK: movabsq $-9223372036854775808, %rax
; CHECK-NEXT: addq %rdi, %rax
; CHECK-NEXT: adcq $0, %rsi
@@ -122,7 +122,7 @@ define zeroext i1 @adc(i128 %x) nounwind
ret i1 %cmp
}
-; CHECK: sbb:
+; CHECK-LABEL: sbb:
; CHECK: cmpq %rdx, %rdi
; CHECK-NEXT: sbbq %rcx, %rsi
; CHECK-NEXT: setns %al
@@ -133,7 +133,7 @@ define zeroext i1 @sbb(i128 %x, i128 %y)
ret i1 %cmp
}
-; CHECK: andn:
+; CHECK-LABEL: andn:
; CHECK: andnl %esi, %edi, %edi
; CHECK-NEXT: je
; CHECK: jmp foo
@@ -152,7 +152,7 @@ return:
ret void
}
-; CHECK: bextr:
+; CHECK-LABEL: bextr:
; CHECK: bextrl %esi, %edi, %edi
; CHECK-NEXT: je
; CHECK: jmp foo
@@ -171,7 +171,7 @@ return:
ret void
}
-; CHECK: popcnt:
+; CHECK-LABEL: popcnt:
; CHECK: popcntl
; CHECK-NEXT: je
; CHECK: jmp foo
Modified: llvm/trunk/test/CodeGen/X86/phaddsub.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/phaddsub.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/phaddsub.ll (original)
+++ llvm/trunk/test/CodeGen/X86/phaddsub.ll Sun Jul 14 01:24:09 2013
@@ -1,10 +1,10 @@
; RUN: llc < %s -march=x86-64 -mattr=+ssse3,-avx | FileCheck %s -check-prefix=SSSE3
; RUN: llc < %s -march=x86-64 -mattr=-ssse3,+avx | FileCheck %s -check-prefix=AVX
-; SSSE3: phaddw1:
+; SSSE3-LABEL: phaddw1:
; SSSE3-NOT: vphaddw
; SSSE3: phaddw
-; AVX: phaddw1:
+; AVX-LABEL: phaddw1:
; AVX: vphaddw
define <8 x i16> @phaddw1(<8 x i16> %x, <8 x i16> %y) {
%a = shufflevector <8 x i16> %x, <8 x i16> %y, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
@@ -13,10 +13,10 @@ define <8 x i16> @phaddw1(<8 x i16> %x,
ret <8 x i16> %r
}
-; SSSE3: phaddw2:
+; SSSE3-LABEL: phaddw2:
; SSSE3-NOT: vphaddw
; SSSE3: phaddw
-; AVX: phaddw2:
+; AVX-LABEL: phaddw2:
; AVX: vphaddw
define <8 x i16> @phaddw2(<8 x i16> %x, <8 x i16> %y) {
%a = shufflevector <8 x i16> %x, <8 x i16> %y, <8 x i32> <i32 1, i32 2, i32 5, i32 6, i32 9, i32 10, i32 13, i32 14>
@@ -25,10 +25,10 @@ define <8 x i16> @phaddw2(<8 x i16> %x,
ret <8 x i16> %r
}
-; SSSE3: phaddd1:
+; SSSE3-LABEL: phaddd1:
; SSSE3-NOT: vphaddd
; SSSE3: phaddd
-; AVX: phaddd1:
+; AVX-LABEL: phaddd1:
; AVX: vphaddd
define <4 x i32> @phaddd1(<4 x i32> %x, <4 x i32> %y) {
%a = shufflevector <4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
@@ -37,10 +37,10 @@ define <4 x i32> @phaddd1(<4 x i32> %x,
ret <4 x i32> %r
}
-; SSSE3: phaddd2:
+; SSSE3-LABEL: phaddd2:
; SSSE3-NOT: vphaddd
; SSSE3: phaddd
-; AVX: phaddd2:
+; AVX-LABEL: phaddd2:
; AVX: vphaddd
define <4 x i32> @phaddd2(<4 x i32> %x, <4 x i32> %y) {
%a = shufflevector <4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 1, i32 2, i32 5, i32 6>
@@ -49,10 +49,10 @@ define <4 x i32> @phaddd2(<4 x i32> %x,
ret <4 x i32> %r
}
-; SSSE3: phaddd3:
+; SSSE3-LABEL: phaddd3:
; SSSE3-NOT: vphaddd
; SSSE3: phaddd
-; AVX: phaddd3:
+; AVX-LABEL: phaddd3:
; AVX: vphaddd
define <4 x i32> @phaddd3(<4 x i32> %x) {
%a = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 undef, i32 2, i32 4, i32 6>
@@ -61,10 +61,10 @@ define <4 x i32> @phaddd3(<4 x i32> %x)
ret <4 x i32> %r
}
-; SSSE3: phaddd4:
+; SSSE3-LABEL: phaddd4:
; SSSE3-NOT: vphaddd
; SSSE3: phaddd
-; AVX: phaddd4:
+; AVX-LABEL: phaddd4:
; AVX: vphaddd
define <4 x i32> @phaddd4(<4 x i32> %x) {
%a = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 undef, i32 undef>
@@ -73,10 +73,10 @@ define <4 x i32> @phaddd4(<4 x i32> %x)
ret <4 x i32> %r
}
-; SSSE3: phaddd5:
+; SSSE3-LABEL: phaddd5:
; SSSE3-NOT: vphaddd
; SSSE3: phaddd
-; AVX: phaddd5:
+; AVX-LABEL: phaddd5:
; AVX: vphaddd
define <4 x i32> @phaddd5(<4 x i32> %x) {
%a = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 0, i32 3, i32 undef, i32 undef>
@@ -85,10 +85,10 @@ define <4 x i32> @phaddd5(<4 x i32> %x)
ret <4 x i32> %r
}
-; SSSE3: phaddd6:
+; SSSE3-LABEL: phaddd6:
; SSSE3-NOT: vphaddd
; SSSE3: phaddd
-; AVX: phaddd6:
+; AVX-LABEL: phaddd6:
; AVX: vphaddd
define <4 x i32> @phaddd6(<4 x i32> %x) {
%a = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
@@ -97,10 +97,10 @@ define <4 x i32> @phaddd6(<4 x i32> %x)
ret <4 x i32> %r
}
-; SSSE3: phaddd7:
+; SSSE3-LABEL: phaddd7:
; SSSE3-NOT: vphaddd
; SSSE3: phaddd
-; AVX: phaddd7:
+; AVX-LABEL: phaddd7:
; AVX: vphaddd
define <4 x i32> @phaddd7(<4 x i32> %x) {
%a = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 undef, i32 3, i32 undef, i32 undef>
@@ -109,10 +109,10 @@ define <4 x i32> @phaddd7(<4 x i32> %x)
ret <4 x i32> %r
}
-; SSSE3: phsubw1:
+; SSSE3-LABEL: phsubw1:
; SSSE3-NOT: vphsubw
; SSSE3: phsubw
-; AVX: phsubw1:
+; AVX-LABEL: phsubw1:
; AVX: vphsubw
define <8 x i16> @phsubw1(<8 x i16> %x, <8 x i16> %y) {
%a = shufflevector <8 x i16> %x, <8 x i16> %y, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
@@ -121,10 +121,10 @@ define <8 x i16> @phsubw1(<8 x i16> %x,
ret <8 x i16> %r
}
-; SSSE3: phsubd1:
+; SSSE3-LABEL: phsubd1:
; SSSE3-NOT: vphsubd
; SSSE3: phsubd
-; AVX: phsubd1:
+; AVX-LABEL: phsubd1:
; AVX: vphsubd
define <4 x i32> @phsubd1(<4 x i32> %x, <4 x i32> %y) {
%a = shufflevector <4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
@@ -133,10 +133,10 @@ define <4 x i32> @phsubd1(<4 x i32> %x,
ret <4 x i32> %r
}
-; SSSE3: phsubd2:
+; SSSE3-LABEL: phsubd2:
; SSSE3-NOT: vphsubd
; SSSE3: phsubd
-; AVX: phsubd2:
+; AVX-LABEL: phsubd2:
; AVX: vphsubd
define <4 x i32> @phsubd2(<4 x i32> %x) {
%a = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 undef, i32 2, i32 4, i32 6>
@@ -145,10 +145,10 @@ define <4 x i32> @phsubd2(<4 x i32> %x)
ret <4 x i32> %r
}
-; SSSE3: phsubd3:
+; SSSE3-LABEL: phsubd3:
; SSSE3-NOT: vphsubd
; SSSE3: phsubd
-; AVX: phsubd3:
+; AVX-LABEL: phsubd3:
; AVX: vphsubd
define <4 x i32> @phsubd3(<4 x i32> %x) {
%a = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 undef, i32 undef>
@@ -157,10 +157,10 @@ define <4 x i32> @phsubd3(<4 x i32> %x)
ret <4 x i32> %r
}
-; SSSE3: phsubd4:
+; SSSE3-LABEL: phsubd4:
; SSSE3-NOT: vphsubd
; SSSE3: phsubd
-; AVX: phsubd4:
+; AVX-LABEL: phsubd4:
; AVX: vphsubd
define <4 x i32> @phsubd4(<4 x i32> %x) {
%a = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
Modified: llvm/trunk/test/CodeGen/X86/phys_subreg_coalesce-3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/phys_subreg_coalesce-3.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/phys_subreg_coalesce-3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/phys_subreg_coalesce-3.ll Sun Jul 14 01:24:09 2013
@@ -7,7 +7,7 @@
; 336L %vreg15<def> = SAR32rCL %vreg15, %EFLAGS<imp-def,dead>, %CL<imp-use,kill>; GR32:%vreg15
define void @foo(i32* nocapture %quadrant, i32* nocapture %ptr, i32 %bbSize, i32 %bbStart, i32 %shifts) nounwind ssp {
-; CHECK: foo:
+; CHECK-LABEL: foo:
entry:
%j.03 = add i32 %bbSize, -1 ; <i32> [#uses=2]
%0 = icmp sgt i32 %j.03, -1 ; <i1> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/popcnt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/popcnt.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/popcnt.ll (original)
+++ llvm/trunk/test/CodeGen/X86/popcnt.ll Sun Jul 14 01:24:09 2013
@@ -3,7 +3,7 @@
define i8 @cnt8(i8 %x) nounwind readnone {
%cnt = tail call i8 @llvm.ctpop.i8(i8 %x)
ret i8 %cnt
-; CHECK: cnt8:
+; CHECK-LABEL: cnt8:
; CHECK: popcntw
; CHECK: ret
}
@@ -11,7 +11,7 @@ define i8 @cnt8(i8 %x) nounwind readnone
define i16 @cnt16(i16 %x) nounwind readnone {
%cnt = tail call i16 @llvm.ctpop.i16(i16 %x)
ret i16 %cnt
-; CHECK: cnt16:
+; CHECK-LABEL: cnt16:
; CHECK: popcntw
; CHECK: ret
}
@@ -19,7 +19,7 @@ define i16 @cnt16(i16 %x) nounwind readn
define i32 @cnt32(i32 %x) nounwind readnone {
%cnt = tail call i32 @llvm.ctpop.i32(i32 %x)
ret i32 %cnt
-; CHECK: cnt32:
+; CHECK-LABEL: cnt32:
; CHECK: popcntl
; CHECK: ret
}
@@ -27,7 +27,7 @@ define i32 @cnt32(i32 %x) nounwind readn
define i64 @cnt64(i64 %x) nounwind readnone {
%cnt = tail call i64 @llvm.ctpop.i64(i64 %x)
ret i64 %cnt
-; CHECK: cnt64:
+; CHECK-LABEL: cnt64:
; CHECK: popcntq
; CHECK: ret
}
Modified: llvm/trunk/test/CodeGen/X86/postra-licm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/postra-licm.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/postra-licm.ll (original)
+++ llvm/trunk/test/CodeGen/X86/postra-licm.ll Sun Jul 14 01:24:09 2013
@@ -16,7 +16,7 @@
@.str24 = external constant [4 x i8], align 1 ; <[4 x i8]*> [#uses=1]
define i32 @t1(i32 %c, i8** nocapture %v) nounwind ssp {
-; X86-32: t1:
+; X86-32-LABEL: t1:
entry:
br i1 undef, label %bb, label %bb3
@@ -146,7 +146,7 @@ declare i32 @strcmp(i8* nocapture, i8* n
@map_4_to_16 = external constant [16 x i16], align 32 ; <[16 x i16]*> [#uses=2]
define void @t2(i8* nocapture %bufp, i8* nocapture %data, i32 %dsize) nounwind ssp {
-; X86-64: t2:
+; X86-64-LABEL: t2:
entry:
br i1 undef, label %return, label %bb.nph
Modified: llvm/trunk/test/CodeGen/X86/pr12360.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr12360.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr12360.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr12360.ll Sun Jul 14 01:24:09 2013
@@ -1,7 +1,7 @@
; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
define zeroext i1 @f1(i8* %x) {
-; CHECK: f1:
+; CHECK-LABEL: f1:
; CHECK: movb (%rdi), %al
; CHECK-NEXT: ret
@@ -12,7 +12,7 @@ entry:
}
define zeroext i1 @f2(i8* %x) {
-; CHECK: f2:
+; CHECK-LABEL: f2:
; CHECK: movb (%rdi), %al
; CHECK-NEXT: ret
@@ -27,7 +27,7 @@ entry:
; check that we don't build a "trunc" from i1 to i1, which would assert.
define zeroext i1 @f3(i1 %x) {
-; CHECK: f3:
+; CHECK-LABEL: f3:
entry:
%tobool = icmp ne i1 %x, 0
@@ -36,7 +36,7 @@ entry:
; check that we don't build a trunc when other bits are needed
define zeroext i1 @f4(i32 %x) {
-; CHECK: f4:
+; CHECK-LABEL: f4:
; CHECK: and
entry:
Modified: llvm/trunk/test/CodeGen/X86/pr13209.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr13209.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr13209.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr13209.ll Sun Jul 14 01:24:09 2013
@@ -1,6 +1,6 @@
; RUN: llc < %s -mtriple=x86_64-pc-linux | FileCheck %s
-; CHECK: pr13209:
+; CHECK-LABEL: pr13209:
; CHECK-NOT: mov
; CHECK: .size pr13209
Modified: llvm/trunk/test/CodeGen/X86/pr16031.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr16031.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr16031.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr16031.ll Sun Jul 14 01:24:09 2013
@@ -1,6 +1,6 @@
; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mcpu=corei7-avx | FileCheck %s
-; CHECK: main:
+; CHECK-LABEL: main:
; CHECK: pushl %esi
; CHECK-NEXT: movl $-12, %eax
; CHECK-NEXT: movl $-1, %edx
Modified: llvm/trunk/test/CodeGen/X86/pr2182.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr2182.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr2182.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr2182.ll Sun Jul 14 01:24:09 2013
@@ -7,7 +7,7 @@ target triple = "i386-apple-darwin8"
@x = weak global i32 0 ; <i32*> [#uses=8]
define void @loop_2() nounwind {
-; CHECK: loop_2:
+; CHECK-LABEL: loop_2:
; CHECK-NOT: ret
; CHECK: addl $3, (%{{.*}})
; CHECK-NEXT: addl $3, (%{{.*}})
Modified: llvm/trunk/test/CodeGen/X86/pr3216.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr3216.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr3216.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr3216.ll Sun Jul 14 01:24:09 2013
@@ -3,7 +3,7 @@
@foo = global i8 127
define i32 @main() nounwind {
-; CHECK: main:
+; CHECK-LABEL: main:
; CHECK-NOT: ret
; CHECK: sar{{.}} $5
; CHECK: ret
Modified: llvm/trunk/test/CodeGen/X86/private.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/private.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/private.ll (original)
+++ llvm/trunk/test/CodeGen/X86/private.ll Sun Jul 14 01:24:09 2013
@@ -13,7 +13,7 @@ define i32 @bar() {
%1 = load i32* @baz, align 4
ret i32 %1
-; CHECK: bar:
+; CHECK-LABEL: bar:
; CHECK: callq .Lfoo
; CHECK: movl .Lbaz(%rip)
}
Modified: llvm/trunk/test/CodeGen/X86/promote-i16.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/promote-i16.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/promote-i16.ll (original)
+++ llvm/trunk/test/CodeGen/X86/promote-i16.ll Sun Jul 14 01:24:09 2013
@@ -2,7 +2,7 @@
define signext i16 @foo(i16 signext %x) nounwind {
entry:
-; CHECK: foo:
+; CHECK-LABEL: foo:
; CHECK-NOT: movzwl
; CHECK: movswl 4(%esp), %eax
; CHECK: xorl $21998, %eax
@@ -12,7 +12,7 @@ entry:
define signext i16 @bar(i16 signext %x) nounwind {
entry:
-; CHECK: bar:
+; CHECK-LABEL: bar:
; CHECK-NOT: movzwl
; CHECK: movswl 4(%esp), %eax
; CHECK: xorl $-10770, %eax
Modified: llvm/trunk/test/CodeGen/X86/rdrand.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rdrand.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rdrand.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rdrand.ll Sun Jul 14 01:24:09 2013
@@ -9,7 +9,7 @@ define i32 @_rdrand16_step(i16* %random_
store i16 %randval, i16* %random_val
%isvalid = extractvalue {i16, i32} %call, 1
ret i32 %isvalid
-; CHECK: _rdrand16_step:
+; CHECK-LABEL: _rdrand16_step:
; CHECK: rdrandw %ax
; CHECK: movw %ax, (%r[[A0:di|cx]])
; CHECK: movzwl %ax, %ecx
@@ -24,7 +24,7 @@ define i32 @_rdrand32_step(i32* %random_
store i32 %randval, i32* %random_val
%isvalid = extractvalue {i32, i32} %call, 1
ret i32 %isvalid
-; CHECK: _rdrand32_step:
+; CHECK-LABEL: _rdrand32_step:
; CHECK: rdrandl %e[[T0:[a-z]+]]
; CHECK: movl %e[[T0]], (%r[[A0]])
; CHECK: movl $1, %eax
@@ -38,7 +38,7 @@ define i32 @_rdrand64_step(i64* %random_
store i64 %randval, i64* %random_val
%isvalid = extractvalue {i64, i32} %call, 1
ret i32 %isvalid
-; CHECK: _rdrand64_step:
+; CHECK-LABEL: _rdrand64_step:
; CHECK: rdrandq %r[[T1:[a-z]+]]
; CHECK: movq %r[[T1]], (%r[[A0]])
; CHECK: movl $1, %eax
@@ -54,7 +54,7 @@ define i32 @CSE() nounwind {
%v2 = extractvalue { i32, i32 } %rand2, 0
%add = add i32 %v2, %v1
ret i32 %add
-; CHECK: CSE:
+; CHECK-LABEL: CSE:
; CHECK: rdrandl
; CHECK: rdrandl
}
@@ -78,7 +78,7 @@ while.body:
while.end: ; preds = %while.body, %entry
ret void
-; CHECK: loop:
+; CHECK-LABEL: loop:
; CHECK-NOT: rdrandl
; CHECK: This Inner Loop Header: Depth=1
; CHECK: rdrandl
Modified: llvm/trunk/test/CodeGen/X86/rdseed.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rdseed.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rdseed.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rdseed.ll Sun Jul 14 01:24:09 2013
@@ -10,7 +10,7 @@ define i32 @_rdseed16_step(i16* %random_
store i16 %randval, i16* %random_val
%isvalid = extractvalue {i16, i32} %call, 1
ret i32 %isvalid
-; CHECK: _rdseed16_step:
+; CHECK-LABEL: _rdseed16_step:
; CHECK: rdseedw %ax
; CHECK: movw %ax, (%r[[A0:di|cx]])
; CHECK: movzwl %ax, %ecx
@@ -25,7 +25,7 @@ define i32 @_rdseed32_step(i32* %random_
store i32 %randval, i32* %random_val
%isvalid = extractvalue {i32, i32} %call, 1
ret i32 %isvalid
-; CHECK: _rdseed32_step:
+; CHECK-LABEL: _rdseed32_step:
; CHECK: rdseedl %e[[T0:[a-z]+]]
; CHECK: movl %e[[T0]], (%r[[A0]])
; CHECK: movl $1, %eax
@@ -39,7 +39,7 @@ define i32 @_rdseed64_step(i64* %random_
store i64 %randval, i64* %random_val
%isvalid = extractvalue {i64, i32} %call, 1
ret i32 %isvalid
-; CHECK: _rdseed64_step:
+; CHECK-LABEL: _rdseed64_step:
; CHECK: rdseedq %r[[T1:[a-z]+]]
; CHECK: movq %r[[T1]], (%r[[A0]])
; CHECK: movl $1, %eax
Modified: llvm/trunk/test/CodeGen/X86/red-zone.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/red-zone.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/red-zone.ll (original)
+++ llvm/trunk/test/CodeGen/X86/red-zone.ll Sun Jul 14 01:24:09 2013
@@ -1,7 +1,7 @@
; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s
; First without noredzone.
-; CHECK: f0:
+; CHECK-LABEL: f0:
; CHECK: -4(%rsp)
; CHECK: -4(%rsp)
; CHECK: ret
@@ -12,7 +12,7 @@ entry:
}
; Then with noredzone.
-; CHECK: f1:
+; CHECK-LABEL: f1:
; CHECK: subq $4, %rsp
; CHECK: (%rsp)
; CHECK: (%rsp)
Modified: llvm/trunk/test/CodeGen/X86/red-zone2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/red-zone2.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/red-zone2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/red-zone2.ll Sun Jul 14 01:24:09 2013
@@ -1,5 +1,5 @@
; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s
-; CHECK: f0:
+; CHECK-LABEL: f0:
; CHECK: subq
; CHECK: addq
Modified: llvm/trunk/test/CodeGen/X86/remat-mov-0.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/remat-mov-0.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/remat-mov-0.ll (original)
+++ llvm/trunk/test/CodeGen/X86/remat-mov-0.ll Sun Jul 14 01:24:09 2013
@@ -5,7 +5,7 @@
declare void @foo(i64 %p)
-; CHECK: bar:
+; CHECK-LABEL: bar:
; CHECK: xorl %e[[A0:di|cx]], %e
; CHECK: xorl %e[[A0]], %e[[A0]]
define void @bar() nounwind {
@@ -14,7 +14,7 @@ define void @bar() nounwind {
ret void
}
-; CHECK: bat:
+; CHECK-LABEL: bat:
; CHECK: movq $-1, %r[[A0]]
; CHECK: movq $-1, %r[[A0]]
define void @bat() nounwind {
@@ -23,7 +23,7 @@ define void @bat() nounwind {
ret void
}
-; CHECK: bau:
+; CHECK-LABEL: bau:
; CHECK: movl $1, %e[[A0]]
; CHECK: movl $1, %e[[A0]]
define void @bau() nounwind {
Modified: llvm/trunk/test/CodeGen/X86/ret-mmx.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/ret-mmx.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/ret-mmx.ll (original)
+++ llvm/trunk/test/CodeGen/X86/ret-mmx.ll Sun Jul 14 01:24:09 2013
@@ -8,7 +8,7 @@ entry:
%call = call <1 x i64> @return_v1di() ; <<1 x i64>> [#uses=0]
store <1 x i64> %call, <1 x i64>* @g_v1di
ret void
-; CHECK: t1:
+; CHECK-LABEL: t1:
; CHECK: callq
; CHECK-NEXT: movq _g_v1di
; CHECK-NEXT: movq %rax,
@@ -18,21 +18,21 @@ declare <1 x i64> @return_v1di()
define <1 x i64> @t2() nounwind {
ret <1 x i64> <i64 1>
-; CHECK: t2:
+; CHECK-LABEL: t2:
; CHECK: movl $1
; CHECK-NEXT: ret
}
define <2 x i32> @t3() nounwind {
ret <2 x i32> <i32 1, i32 0>
-; CHECK: t3:
+; CHECK-LABEL: t3:
; CHECK: movl $1
; CHECK: movd {{.*}}, %xmm0
}
define double @t4() nounwind {
ret double bitcast (<2 x i32> <i32 1, i32 0> to double)
-; CHECK: t4:
+; CHECK-LABEL: t4:
; CHECK: movl $1
; CHECK: movd {{.*}}, %xmm0
}
Modified: llvm/trunk/test/CodeGen/X86/rot16.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rot16.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rot16.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rot16.ll Sun Jul 14 01:24:09 2013
@@ -2,7 +2,7 @@
define i16 @foo(i16 %x, i16 %y, i16 %z) nounwind readnone {
entry:
-; CHECK: foo:
+; CHECK-LABEL: foo:
; CHECK: rolw %cl
%0 = shl i16 %x, %z
%1 = sub i16 16, %z
@@ -13,7 +13,7 @@ entry:
define i16 @bar(i16 %x, i16 %y, i16 %z) nounwind readnone {
entry:
-; CHECK: bar:
+; CHECK-LABEL: bar:
; CHECK: shldw %cl
%0 = shl i16 %y, %z
%1 = sub i16 16, %z
@@ -24,7 +24,7 @@ entry:
define i16 @un(i16 %x, i16 %y, i16 %z) nounwind readnone {
entry:
-; CHECK: un:
+; CHECK-LABEL: un:
; CHECK: rorw %cl
%0 = lshr i16 %x, %z
%1 = sub i16 16, %z
@@ -35,7 +35,7 @@ entry:
define i16 @bu(i16 %x, i16 %y, i16 %z) nounwind readnone {
entry:
-; CHECK: bu:
+; CHECK-LABEL: bu:
; CHECK: shrdw
%0 = lshr i16 %y, %z
%1 = sub i16 16, %z
@@ -46,7 +46,7 @@ entry:
define i16 @xfoo(i16 %x, i16 %y, i16 %z) nounwind readnone {
entry:
-; CHECK: xfoo:
+; CHECK-LABEL: xfoo:
; CHECK: rolw $5
%0 = lshr i16 %x, 11
%1 = shl i16 %x, 5
@@ -56,7 +56,7 @@ entry:
define i16 @xbar(i16 %x, i16 %y, i16 %z) nounwind readnone {
entry:
-; CHECK: xbar:
+; CHECK-LABEL: xbar:
; CHECK: shldw $5
%0 = shl i16 %y, 5
%1 = lshr i16 %x, 11
@@ -66,7 +66,7 @@ entry:
define i16 @xun(i16 %x, i16 %y, i16 %z) nounwind readnone {
entry:
-; CHECK: xun:
+; CHECK-LABEL: xun:
; CHECK: rolw $11
%0 = lshr i16 %x, 5
%1 = shl i16 %x, 11
@@ -76,7 +76,7 @@ entry:
define i16 @xbu(i16 %x, i16 %y, i16 %z) nounwind readnone {
entry:
-; CHECK: xbu:
+; CHECK-LABEL: xbu:
; CHECK: shldw $11
%0 = lshr i16 %y, 5
%1 = shl i16 %x, 11
Modified: llvm/trunk/test/CodeGen/X86/rot32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rot32.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rot32.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rot32.ll Sun Jul 14 01:24:09 2013
@@ -3,7 +3,7 @@
define i32 @foo(i32 %x, i32 %y, i32 %z) nounwind readnone {
entry:
-; CHECK: foo:
+; CHECK-LABEL: foo:
; CHECK: roll %cl
%0 = shl i32 %x, %z
%1 = sub i32 32, %z
@@ -14,7 +14,7 @@ entry:
define i32 @bar(i32 %x, i32 %y, i32 %z) nounwind readnone {
entry:
-; CHECK: bar:
+; CHECK-LABEL: bar:
; CHECK: shldl %cl
%0 = shl i32 %y, %z
%1 = sub i32 32, %z
@@ -25,7 +25,7 @@ entry:
define i32 @un(i32 %x, i32 %y, i32 %z) nounwind readnone {
entry:
-; CHECK: un:
+; CHECK-LABEL: un:
; CHECK: rorl %cl
%0 = lshr i32 %x, %z
%1 = sub i32 32, %z
@@ -36,7 +36,7 @@ entry:
define i32 @bu(i32 %x, i32 %y, i32 %z) nounwind readnone {
entry:
-; CHECK: bu:
+; CHECK-LABEL: bu:
; CHECK: shrdl %cl
%0 = lshr i32 %y, %z
%1 = sub i32 32, %z
@@ -47,9 +47,9 @@ entry:
define i32 @xfoo(i32 %x, i32 %y, i32 %z) nounwind readnone {
entry:
-; CHECK: xfoo:
+; CHECK-LABEL: xfoo:
; CHECK: roll $7
-; BMI2: xfoo:
+; BMI2-LABEL: xfoo:
; BMI2: rorxl $25
%0 = lshr i32 %x, 25
%1 = shl i32 %x, 7
@@ -59,7 +59,7 @@ entry:
define i32 @xfoop(i32* %p) nounwind readnone {
entry:
-; BMI2: xfoop:
+; BMI2-LABEL: xfoop:
; BMI2: rorxl $25, ({{.+}}), %{{.+}}
%x = load i32* %p
%a = lshr i32 %x, 25
@@ -70,7 +70,7 @@ entry:
define i32 @xbar(i32 %x, i32 %y, i32 %z) nounwind readnone {
entry:
-; CHECK: xbar:
+; CHECK-LABEL: xbar:
; CHECK: shldl $7
%0 = shl i32 %y, 7
%1 = lshr i32 %x, 25
@@ -80,9 +80,9 @@ entry:
define i32 @xun(i32 %x, i32 %y, i32 %z) nounwind readnone {
entry:
-; CHECK: xun:
+; CHECK-LABEL: xun:
; CHECK: roll $25
-; BMI2: xun:
+; BMI2-LABEL: xun:
; BMI2: rorxl $7
%0 = lshr i32 %x, 7
%1 = shl i32 %x, 25
@@ -92,7 +92,7 @@ entry:
define i32 @xunp(i32* %p) nounwind readnone {
entry:
-; BMI2: xunp:
+; BMI2-LABEL: xunp:
; BMI2: rorxl $7, ({{.+}}), %{{.+}}
%x = load i32* %p
%a = lshr i32 %x, 7
@@ -103,7 +103,7 @@ entry:
define i32 @xbu(i32 %x, i32 %y, i32 %z) nounwind readnone {
entry:
-; CHECK: xbu:
+; CHECK-LABEL: xbu:
; CHECK: shldl
%0 = lshr i32 %y, 7
%1 = shl i32 %x, 25
Modified: llvm/trunk/test/CodeGen/X86/rot64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rot64.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rot64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rot64.ll Sun Jul 14 01:24:09 2013
@@ -43,7 +43,7 @@ entry:
define i64 @xfoo(i64 %x, i64 %y, i64 %z) nounwind readnone {
entry:
-; BMI2: xfoo:
+; BMI2-LABEL: xfoo:
; BMI2: rorxq $57
%0 = lshr i64 %x, 57
%1 = shl i64 %x, 7
@@ -53,7 +53,7 @@ entry:
define i64 @xfoop(i64* %p) nounwind readnone {
entry:
-; BMI2: xfoop:
+; BMI2-LABEL: xfoop:
; BMI2: rorxq $57, ({{.+}}), %{{.+}}
%x = load i64* %p
%a = lshr i64 %x, 57
@@ -72,7 +72,7 @@ entry:
define i64 @xun(i64 %x, i64 %y, i64 %z) nounwind readnone {
entry:
-; BMI2: xun:
+; BMI2-LABEL: xun:
; BMI2: rorxq $7
%0 = lshr i64 %x, 7
%1 = shl i64 %x, 57
@@ -82,7 +82,7 @@ entry:
define i64 @xunp(i64* %p) nounwind readnone {
entry:
-; BMI2: xunp:
+; BMI2-LABEL: xunp:
; BMI2: rorxq $7, ({{.+}}), %{{.+}}
%x = load i64* %p
%a = lshr i64 %x, 7
Modified: llvm/trunk/test/CodeGen/X86/rounding-ops.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rounding-ops.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rounding-ops.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rounding-ops.ll Sun Jul 14 01:24:09 2013
@@ -5,10 +5,10 @@ define float @test1(float %x) nounwind
%call = tail call float @floorf(float %x) nounwind readnone
ret float %call
-; CHECK-SSE: test1:
+; CHECK-SSE-LABEL: test1:
; CHECK-SSE: roundss $1
-; CHECK-AVX: test1:
+; CHECK-AVX-LABEL: test1:
; CHECK-AVX: vroundss $1
}
@@ -18,10 +18,10 @@ define double @test2(double %x) nounwind
%call = tail call double @floor(double %x) nounwind readnone
ret double %call
-; CHECK-SSE: test2:
+; CHECK-SSE-LABEL: test2:
; CHECK-SSE: roundsd $1
-; CHECK-AVX: test2:
+; CHECK-AVX-LABEL: test2:
; CHECK-AVX: vroundsd $1
}
@@ -31,10 +31,10 @@ define float @test3(float %x) nounwind
%call = tail call float @nearbyintf(float %x) nounwind readnone
ret float %call
-; CHECK-SSE: test3:
+; CHECK-SSE-LABEL: test3:
; CHECK-SSE: roundss $12
-; CHECK-AVX: test3:
+; CHECK-AVX-LABEL: test3:
; CHECK-AVX: vroundss $12
}
@@ -44,10 +44,10 @@ define double @test4(double %x) nounwind
%call = tail call double @nearbyint(double %x) nounwind readnone
ret double %call
-; CHECK-SSE: test4:
+; CHECK-SSE-LABEL: test4:
; CHECK-SSE: roundsd $12
-; CHECK-AVX: test4:
+; CHECK-AVX-LABEL: test4:
; CHECK-AVX: vroundsd $12
}
@@ -57,10 +57,10 @@ define float @test5(float %x) nounwind
%call = tail call float @ceilf(float %x) nounwind readnone
ret float %call
-; CHECK-SSE: test5:
+; CHECK-SSE-LABEL: test5:
; CHECK-SSE: roundss $2
-; CHECK-AVX: test5:
+; CHECK-AVX-LABEL: test5:
; CHECK-AVX: vroundss $2
}
@@ -70,10 +70,10 @@ define double @test6(double %x) nounwind
%call = tail call double @ceil(double %x) nounwind readnone
ret double %call
-; CHECK-SSE: test6:
+; CHECK-SSE-LABEL: test6:
; CHECK-SSE: roundsd $2
-; CHECK-AVX: test6:
+; CHECK-AVX-LABEL: test6:
; CHECK-AVX: vroundsd $2
}
@@ -83,10 +83,10 @@ define float @test7(float %x) nounwind
%call = tail call float @rintf(float %x) nounwind readnone
ret float %call
-; CHECK-SSE: test7:
+; CHECK-SSE-LABEL: test7:
; CHECK-SSE: roundss $4
-; CHECK-AVX: test7:
+; CHECK-AVX-LABEL: test7:
; CHECK-AVX: vroundss $4
}
@@ -96,10 +96,10 @@ define double @test8(double %x) nounwind
%call = tail call double @rint(double %x) nounwind readnone
ret double %call
-; CHECK-SSE: test8:
+; CHECK-SSE-LABEL: test8:
; CHECK-SSE: roundsd $4
-; CHECK-AVX: test8:
+; CHECK-AVX-LABEL: test8:
; CHECK-AVX: vroundsd $4
}
@@ -109,10 +109,10 @@ define float @test9(float %x) nounwind
%call = tail call float @truncf(float %x) nounwind readnone
ret float %call
-; CHECK-SSE: test9:
+; CHECK-SSE-LABEL: test9:
; CHECK-SSE: roundss $3
-; CHECK-AVX: test9:
+; CHECK-AVX-LABEL: test9:
; CHECK-AVX: vroundss $3
}
@@ -122,10 +122,10 @@ define double @test10(double %x) nounwin
%call = tail call double @trunc(double %x) nounwind readnone
ret double %call
-; CHECK-SSE: test10:
+; CHECK-SSE-LABEL: test10:
; CHECK-SSE: roundsd $3
-; CHECK-AVX: test10:
+; CHECK-AVX-LABEL: test10:
; CHECK-AVX: vroundsd $3
}
Modified: llvm/trunk/test/CodeGen/X86/segmented-stacks.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/segmented-stacks.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/segmented-stacks.ll (original)
+++ llvm/trunk/test/CodeGen/X86/segmented-stacks.ll Sun Jul 14 01:24:09 2013
@@ -32,7 +32,7 @@ define void @test_basic() {
call void @dummy_use (i32* %mem, i32 10)
ret void
-; X32-Linux: test_basic:
+; X32-Linux-LABEL: test_basic:
; X32-Linux: cmpl %gs:48, %esp
; X32-Linux-NEXT: ja .LBB0_2
@@ -42,7 +42,7 @@ define void @test_basic() {
; X32-Linux-NEXT: calll __morestack
; X32-Linux-NEXT: ret
-; X64-Linux: test_basic:
+; X64-Linux-LABEL: test_basic:
; X64-Linux: cmpq %fs:112, %rsp
; X64-Linux-NEXT: ja .LBB0_2
@@ -52,7 +52,7 @@ define void @test_basic() {
; X64-Linux-NEXT: callq __morestack
; X64-Linux-NEXT: ret
-; X32-Darwin: test_basic:
+; X32-Darwin-LABEL: test_basic:
; X32-Darwin: movl $432, %ecx
; X32-Darwin-NEXT: cmpl %gs:(%ecx), %esp
@@ -63,7 +63,7 @@ define void @test_basic() {
; X32-Darwin-NEXT: calll ___morestack
; X32-Darwin-NEXT: ret
-; X64-Darwin: test_basic:
+; X64-Darwin-LABEL: test_basic:
; X64-Darwin: cmpq %gs:816, %rsp
; X64-Darwin-NEXT: ja LBB0_2
@@ -73,7 +73,7 @@ define void @test_basic() {
; X64-Darwin-NEXT: callq ___morestack
; X64-Darwin-NEXT: ret
-; X32-MinGW: test_basic:
+; X32-MinGW-LABEL: test_basic:
; X32-MinGW: cmpl %fs:20, %esp
; X32-MinGW-NEXT: ja LBB0_2
@@ -83,7 +83,7 @@ define void @test_basic() {
; X32-MinGW-NEXT: calll ___morestack
; X32-MinGW-NEXT: ret
-; X64-FreeBSD: test_basic:
+; X64-FreeBSD-LABEL: test_basic:
; X64-FreeBSD: cmpq %fs:24, %rsp
; X64-FreeBSD-NEXT: ja .LBB0_2
@@ -224,7 +224,7 @@ define fastcc void @test_fastcc() {
call void @dummy_use (i32* %mem, i32 10)
ret void
-; X32-Linux: test_fastcc:
+; X32-Linux-LABEL: test_fastcc:
; X32-Linux: cmpl %gs:48, %esp
; X32-Linux-NEXT: ja .LBB3_2
@@ -234,7 +234,7 @@ define fastcc void @test_fastcc() {
; X32-Linux-NEXT: calll __morestack
; X32-Linux-NEXT: ret
-; X64-Linux: test_fastcc:
+; X64-Linux-LABEL: test_fastcc:
; X64-Linux: cmpq %fs:112, %rsp
; X64-Linux-NEXT: ja .LBB3_2
@@ -244,7 +244,7 @@ define fastcc void @test_fastcc() {
; X64-Linux-NEXT: callq __morestack
; X64-Linux-NEXT: ret
-; X32-Darwin: test_fastcc:
+; X32-Darwin-LABEL: test_fastcc:
; X32-Darwin: movl $432, %eax
; X32-Darwin-NEXT: cmpl %gs:(%eax), %esp
@@ -255,7 +255,7 @@ define fastcc void @test_fastcc() {
; X32-Darwin-NEXT: calll ___morestack
; X32-Darwin-NEXT: ret
-; X64-Darwin: test_fastcc:
+; X64-Darwin-LABEL: test_fastcc:
; X64-Darwin: cmpq %gs:816, %rsp
; X64-Darwin-NEXT: ja LBB3_2
@@ -265,7 +265,7 @@ define fastcc void @test_fastcc() {
; X64-Darwin-NEXT: callq ___morestack
; X64-Darwin-NEXT: ret
-; X32-MinGW: test_fastcc:
+; X32-MinGW-LABEL: test_fastcc:
; X32-MinGW: cmpl %fs:20, %esp
; X32-MinGW-NEXT: ja LBB3_2
@@ -275,7 +275,7 @@ define fastcc void @test_fastcc() {
; X32-MinGW-NEXT: calll ___morestack
; X32-MinGW-NEXT: ret
-; X64-FreeBSD: test_fastcc:
+; X64-FreeBSD-LABEL: test_fastcc:
; X64-FreeBSD: cmpq %fs:24, %rsp
; X64-FreeBSD-NEXT: ja .LBB3_2
@@ -292,7 +292,7 @@ define fastcc void @test_fastcc_large()
call void @dummy_use (i32* %mem, i32 0)
ret void
-; X32-Linux: test_fastcc_large:
+; X32-Linux-LABEL: test_fastcc_large:
; X32-Linux: leal -40012(%esp), %eax
; X32-Linux-NEXT: cmpl %gs:48, %eax
@@ -303,7 +303,7 @@ define fastcc void @test_fastcc_large()
; X32-Linux-NEXT: calll __morestack
; X32-Linux-NEXT: ret
-; X64-Linux: test_fastcc_large:
+; X64-Linux-LABEL: test_fastcc_large:
; X64-Linux: leaq -40008(%rsp), %r11
; X64-Linux-NEXT: cmpq %fs:112, %r11
@@ -314,7 +314,7 @@ define fastcc void @test_fastcc_large()
; X64-Linux-NEXT: callq __morestack
; X64-Linux-NEXT: ret
-; X32-Darwin: test_fastcc_large:
+; X32-Darwin-LABEL: test_fastcc_large:
; X32-Darwin: leal -40012(%esp), %eax
; X32-Darwin-NEXT: movl $432, %ecx
@@ -326,7 +326,7 @@ define fastcc void @test_fastcc_large()
; X32-Darwin-NEXT: calll ___morestack
; X32-Darwin-NEXT: ret
-; X64-Darwin: test_fastcc_large:
+; X64-Darwin-LABEL: test_fastcc_large:
; X64-Darwin: leaq -40008(%rsp), %r11
; X64-Darwin-NEXT: cmpq %gs:816, %r11
@@ -337,7 +337,7 @@ define fastcc void @test_fastcc_large()
; X64-Darwin-NEXT: callq ___morestack
; X64-Darwin-NEXT: ret
-; X32-MinGW: test_fastcc_large:
+; X32-MinGW-LABEL: test_fastcc_large:
; X32-MinGW: leal -40008(%esp), %eax
; X32-MinGW-NEXT: cmpl %fs:20, %eax
@@ -348,7 +348,7 @@ define fastcc void @test_fastcc_large()
; X32-MinGW-NEXT: calll ___morestack
; X32-MinGW-NEXT: ret
-; X64-FreeBSD: test_fastcc_large:
+; X64-FreeBSD-LABEL: test_fastcc_large:
; X64-FreeBSD: leaq -40008(%rsp), %r11
; X64-FreeBSD-NEXT: cmpq %fs:24, %r11
@@ -368,7 +368,7 @@ define fastcc void @test_fastcc_large_wi
; This is testing that the Mac implementation preserves ecx
-; X32-Darwin: test_fastcc_large_with_ecx_arg:
+; X32-Darwin-LABEL: test_fastcc_large_with_ecx_arg:
; X32-Darwin: leal -40012(%esp), %eax
; X32-Darwin-NEXT: pushl %ecx
Modified: llvm/trunk/test/CodeGen/X86/setcc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/setcc.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/setcc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/setcc.ll Sun Jul 14 01:24:09 2013
@@ -6,7 +6,7 @@
define zeroext i16 @t1(i16 zeroext %x) nounwind readnone ssp {
entry:
-; CHECK: t1:
+; CHECK-LABEL: t1:
; CHECK: seta %al
; CHECK: movzbl %al, %eax
; CHECK: shll $5, %eax
@@ -17,7 +17,7 @@ entry:
define zeroext i16 @t2(i16 zeroext %x) nounwind readnone ssp {
entry:
-; CHECK: t2:
+; CHECK-LABEL: t2:
; CHECK: sbbl %eax, %eax
; CHECK: andl $32, %eax
%0 = icmp ult i16 %x, 26 ; <i1> [#uses=1]
@@ -27,7 +27,7 @@ entry:
define i64 @t3(i64 %x) nounwind readnone ssp {
entry:
-; CHECK: t3:
+; CHECK-LABEL: t3:
; CHECK: sbbq %rax, %rax
; CHECK: andq $64, %rax
%0 = icmp ult i64 %x, 18 ; <i1> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/sext-i1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sext-i1.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sext-i1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sext-i1.ll Sun Jul 14 01:24:09 2013
@@ -5,11 +5,11 @@
define i32 @t1(i32 %x) nounwind readnone ssp {
entry:
-; 32: t1:
+; 32-LABEL: t1:
; 32: cmpl $1
; 32: sbbl
-; 64: t1:
+; 64-LABEL: t1:
; 64: cmpl $1
; 64: sbbl
%0 = icmp eq i32 %x, 0
@@ -19,11 +19,11 @@ entry:
define i32 @t2(i32 %x) nounwind readnone ssp {
entry:
-; 32: t2:
+; 32-LABEL: t2:
; 32: cmpl $1
; 32: sbbl
-; 64: t2:
+; 64-LABEL: t2:
; 64: cmpl $1
; 64: sbbl
%0 = icmp eq i32 %x, 0
@@ -36,13 +36,13 @@ entry:
define i32 @t3() nounwind readonly {
entry:
-; 32: t3:
+; 32-LABEL: t3:
; 32: cmpl $1
; 32: sbbl
; 32: cmpl
; 32: xorl
-; 64: t3:
+; 64-LABEL: t3:
; 64: cmpl $1
; 64: sbbq
; 64: cmpq
Modified: llvm/trunk/test/CodeGen/X86/sext-subreg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sext-subreg.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sext-subreg.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sext-subreg.ll Sun Jul 14 01:24:09 2013
@@ -2,7 +2,7 @@
; rdar://7529457
define i64 @t(i64 %A, i64 %B, i32* %P, i64 *%P2) nounwind {
-; CHECK: t:
+; CHECK-LABEL: t:
; CHECK: movslq %e{{.*}}, %rax
; CHECK: movq %rax
; CHECK: movl %eax
Modified: llvm/trunk/test/CodeGen/X86/shift-and.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shift-and.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/shift-and.ll (original)
+++ llvm/trunk/test/CodeGen/X86/shift-and.ll Sun Jul 14 01:24:09 2013
@@ -2,11 +2,11 @@
; RUN: llc < %s -mtriple=x86_64-apple-macosx | FileCheck %s --check-prefix=X64
define i32 @t1(i32 %t, i32 %val) nounwind {
-; X32: t1:
+; X32-LABEL: t1:
; X32-NOT: andl
; X32: shll
-; X64: t1:
+; X64-LABEL: t1:
; X64-NOT: andl
; X64: shll
%shamt = and i32 %t, 31
@@ -15,11 +15,11 @@ define i32 @t1(i32 %t, i32 %val) nounwin
}
define i32 @t2(i32 %t, i32 %val) nounwind {
-; X32: t2:
+; X32-LABEL: t2:
; X32-NOT: andl
; X32: shll
-; X64: t2:
+; X64-LABEL: t2:
; X64-NOT: andl
; X64: shll
%shamt = and i32 %t, 63
@@ -30,11 +30,11 @@ define i32 @t2(i32 %t, i32 %val) nounwin
@X = internal global i16 0
define void @t3(i16 %t) nounwind {
-; X32: t3:
+; X32-LABEL: t3:
; X32-NOT: andl
; X32: sarw
-; X64: t3:
+; X64-LABEL: t3:
; X64-NOT: andl
; X64: sarw
%shamt = and i16 %t, 31
@@ -45,7 +45,7 @@ define void @t3(i16 %t) nounwind {
}
define i64 @t4(i64 %t, i64 %val) nounwind {
-; X64: t4:
+; X64-LABEL: t4:
; X64-NOT: and
; X64: shrq
%shamt = and i64 %t, 63
@@ -54,7 +54,7 @@ define i64 @t4(i64 %t, i64 %val) nounwin
}
define i64 @t5(i64 %t, i64 %val) nounwind {
-; X64: t5:
+; X64-LABEL: t5:
; X64-NOT: and
; X64: shrq
%shamt = and i64 %t, 191
@@ -66,7 +66,7 @@ define i64 @t5(i64 %t, i64 %val) nounwin
; rdar://11866926
define i64 @t6(i64 %key, i64* nocapture %val) nounwind {
entry:
-; X64: t6:
+; X64-LABEL: t6:
; X64-NOT: movabsq
; X64: decq
; X64: andq
Modified: llvm/trunk/test/CodeGen/X86/shift-codegen.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shift-codegen.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/shift-codegen.ll (original)
+++ llvm/trunk/test/CodeGen/X86/shift-codegen.ll Sun Jul 14 01:24:09 2013
@@ -8,7 +8,7 @@ target triple = "i686-apple-darwin8"
define void @fn1() {
-; CHECK: fn1:
+; CHECK-LABEL: fn1:
; CHECK-NOT: ret
; CHECK-NOT: lea
; CHECK: shll $3
@@ -24,7 +24,7 @@ define void @fn1() {
}
define i32 @fn2(i32 %X, i32 %Y) {
-; CHECK: fn2:
+; CHECK-LABEL: fn2:
; CHECK-NOT: ret
; CHECK-NOT: lea
; CHECK: shll $3
Modified: llvm/trunk/test/CodeGen/X86/shl-anyext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shl-anyext.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/shl-anyext.ll (original)
+++ llvm/trunk/test/CodeGen/X86/shl-anyext.ll Sun Jul 14 01:24:09 2013
@@ -17,7 +17,7 @@ if.end523:
ret void
}
-; CHECK: foo:
+; CHECK-LABEL: foo:
declare void @bar(i64)
Modified: llvm/trunk/test/CodeGen/X86/shl_elim.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shl_elim.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/shl_elim.ll (original)
+++ llvm/trunk/test/CodeGen/X86/shl_elim.ll Sun Jul 14 01:24:09 2013
@@ -8,7 +8,7 @@ define i32 @test1(i64 %a) nounwind {
%tmp456 = sext i16 %tmp45 to i32 ; <i32> [#uses=1]
ret i32 %tmp456
-; CHECK: test1:
+; CHECK-LABEL: test1:
; CHECK: movl 8(%esp), %eax
; CHECK: shrl %eax
; CHECK: cwtl
Modified: llvm/trunk/test/CodeGen/X86/sibcall-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sibcall-2.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sibcall-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sibcall-2.ll Sun Jul 14 01:24:09 2013
@@ -5,10 +5,10 @@
define void @t1(i8* nocapture %value) nounwind {
entry:
-; 32: t1:
+; 32-LABEL: t1:
; 32: jmpl *4(%esp)
-; 64: t1:
+; 64-LABEL: t1:
; 64: jmpq *%rdi
%0 = bitcast i8* %value to void ()*
tail call void %0() nounwind
@@ -17,10 +17,10 @@ entry:
define void @t2(i32 %a, i8* nocapture %value) nounwind {
entry:
-; 32: t2:
+; 32-LABEL: t2:
; 32: jmpl *8(%esp)
-; 64: t2:
+; 64-LABEL: t2:
; 64: jmpq *%rsi
%0 = bitcast i8* %value to void ()*
tail call void %0() nounwind
@@ -29,10 +29,10 @@ entry:
define void @t3(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i8* nocapture %value) nounwind {
entry:
-; 32: t3:
+; 32-LABEL: t3:
; 32: jmpl *28(%esp)
-; 64: t3:
+; 64-LABEL: t3:
; 64: jmpq *8(%rsp)
%0 = bitcast i8* %value to void ()*
tail call void %0() nounwind
@@ -41,10 +41,10 @@ entry:
define void @t4(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i8* nocapture %value) nounwind {
entry:
-; 32: t4:
+; 32-LABEL: t4:
; 32: jmpl *32(%esp)
-; 64: t4:
+; 64-LABEL: t4:
; 64: jmpq *16(%rsp)
%0 = bitcast i8* %value to void ()*
tail call void %0() nounwind
Modified: llvm/trunk/test/CodeGen/X86/sibcall-3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sibcall-3.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sibcall-3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sibcall-3.ll Sun Jul 14 01:24:09 2013
@@ -2,14 +2,14 @@
; PR7193
define void @t1(i8* inreg %dst, i8* inreg %src, i8* inreg %len) nounwind {
-; CHECK: t1:
+; CHECK-LABEL: t1:
; CHECK: calll 0
tail call void null(i8* inreg %dst, i8* inreg %src, i8* inreg %len) nounwind
ret void
}
define void @t2(i8* inreg %dst, i8* inreg %src, i8* inreg %len) nounwind {
-; CHECK: t2:
+; CHECK-LABEL: t2:
; CHECK: jmpl
tail call void null(i8* inreg %dst, i8* inreg %src) nounwind
ret void
Modified: llvm/trunk/test/CodeGen/X86/sibcall-4.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sibcall-4.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sibcall-4.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sibcall-4.ll Sun Jul 14 01:24:09 2013
@@ -3,7 +3,7 @@
define cc10 void @t(i32* %Base_Arg, i32* %Sp_Arg, i32* %Hp_Arg, i32 %R1_Arg) nounwind {
cm1:
-; CHECK: t:
+; CHECK-LABEL: t:
; CHECK: jmpl *%eax
%nm3 = getelementptr i32* %Sp_Arg, i32 1
%nm9 = load i32* %Sp_Arg
Modified: llvm/trunk/test/CodeGen/X86/sibcall-5.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sibcall-5.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sibcall-5.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sibcall-5.ll Sun Jul 14 01:24:09 2013
@@ -7,20 +7,20 @@
define double @foo(double %a) nounwind readonly ssp {
entry:
-; X32: foo:
+; X32-LABEL: foo:
; X32: jmp _sin$stub
-; X64: foo:
+; X64-LABEL: foo:
; X64: jmp _sin
%0 = tail call double @sin(double %a) nounwind readonly
ret double %0
}
define float @bar(float %a) nounwind readonly ssp {
-; X32: bar:
+; X32-LABEL: bar:
; X32: jmp _sinf$stub
-; X64: bar:
+; X64-LABEL: bar:
; X64: jmp _sinf
entry:
%0 = tail call float @sinf(float %a) nounwind readonly
Modified: llvm/trunk/test/CodeGen/X86/sibcall.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sibcall.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sibcall.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sibcall.ll Sun Jul 14 01:24:09 2013
@@ -3,10 +3,10 @@
define void @t1(i32 %x) nounwind ssp {
entry:
-; 32: t1:
+; 32-LABEL: t1:
; 32: jmp {{_?}}foo
-; 64: t1:
+; 64-LABEL: t1:
; 64: jmp {{_?}}foo
tail call void @foo() nounwind
ret void
@@ -16,10 +16,10 @@ declare void @foo()
define void @t2() nounwind ssp {
entry:
-; 32: t2:
+; 32-LABEL: t2:
; 32: jmp {{_?}}foo2
-; 64: t2:
+; 64-LABEL: t2:
; 64: jmp {{_?}}foo2
%0 = tail call i32 @foo2() nounwind
ret void
@@ -29,10 +29,10 @@ declare i32 @foo2()
define void @t3() nounwind ssp {
entry:
-; 32: t3:
+; 32-LABEL: t3:
; 32: jmp {{_?}}foo3
-; 64: t3:
+; 64-LABEL: t3:
; 64: jmp {{_?}}foo3
%0 = tail call i32 @foo3() nounwind
ret void
@@ -42,11 +42,11 @@ declare i32 @foo3()
define void @t4(void (i32)* nocapture %x) nounwind ssp {
entry:
-; 32: t4:
+; 32-LABEL: t4:
; 32: calll *
; FIXME: gcc can generate a tailcall for this. But it's tricky.
-; 64: t4:
+; 64-LABEL: t4:
; 64-NOT: call
; 64: jmpq *
tail call void %x(i32 0) nounwind
@@ -55,11 +55,11 @@ entry:
define void @t5(void ()* nocapture %x) nounwind ssp {
entry:
-; 32: t5:
+; 32-LABEL: t5:
; 32-NOT: call
; 32: jmpl *4(%esp)
-; 64: t5:
+; 64-LABEL: t5:
; 64-NOT: call
; 64: jmpq *%rdi
tail call void %x() nounwind
@@ -68,11 +68,11 @@ entry:
define i32 @t6(i32 %x) nounwind ssp {
entry:
-; 32: t6:
+; 32-LABEL: t6:
; 32: calll {{_?}}t6
; 32: jmp {{_?}}bar
-; 64: t6:
+; 64-LABEL: t6:
; 64: jmp {{_?}}t6
; 64: jmp {{_?}}bar
%0 = icmp slt i32 %x, 10
@@ -92,10 +92,10 @@ declare i32 @bar(i32)
define i32 @t7(i32 %a, i32 %b, i32 %c) nounwind ssp {
entry:
-; 32: t7:
+; 32-LABEL: t7:
; 32: jmp {{_?}}bar2
-; 64: t7:
+; 64-LABEL: t7:
; 64: jmp {{_?}}bar2
%0 = tail call i32 @bar2(i32 %a, i32 %b, i32 %c) nounwind
ret i32 %0
@@ -105,10 +105,10 @@ declare i32 @bar2(i32, i32, i32)
define signext i16 @t8() nounwind ssp {
entry:
-; 32: t8:
+; 32-LABEL: t8:
; 32: calll {{_?}}bar3
-; 64: t8:
+; 64-LABEL: t8:
; 64: callq {{_?}}bar3
%0 = tail call signext i16 @bar3() nounwind ; <i16> [#uses=1]
ret i16 %0
@@ -118,10 +118,10 @@ declare signext i16 @bar3()
define signext i16 @t9(i32 (i32)* nocapture %x) nounwind ssp {
entry:
-; 32: t9:
+; 32-LABEL: t9:
; 32: calll *
-; 64: t9:
+; 64-LABEL: t9:
; 64: callq *
%0 = bitcast i32 (i32)* %x to i16 (i32)*
%1 = tail call signext i16 %0(i32 0) nounwind
@@ -130,10 +130,10 @@ entry:
define void @t10() nounwind ssp {
entry:
-; 32: t10:
+; 32-LABEL: t10:
; 32: calll
-; 64: t10:
+; 64-LABEL: t10:
; 64: callq
%0 = tail call i32 @foo4() noreturn nounwind
unreachable
@@ -145,14 +145,14 @@ define i32 @t11(i32 %x, i32 %y, i32 %z.0
; In 32-bit mode, it's emitting a bunch of dead loads that are not being
; eliminated currently.
-; 32: t11:
+; 32-LABEL: t11:
; 32-NOT: subl ${{[0-9]+}}, %esp
; 32: je
; 32-NOT: movl
; 32-NOT: addl ${{[0-9]+}}, %esp
; 32: jmp {{_?}}foo5
-; 64: t11:
+; 64-LABEL: t11:
; 64-NOT: subq ${{[0-9]+}}, %esp
; 64-NOT: addq ${{[0-9]+}}, %esp
; 64: jmp {{_?}}foo5
@@ -173,12 +173,12 @@ declare i32 @foo5(i32, i32, i32, i32, i3
%struct.t = type { i32, i32, i32, i32, i32 }
define i32 @t12(i32 %x, i32 %y, %struct.t* byval align 4 %z) nounwind ssp {
-; 32: t12:
+; 32-LABEL: t12:
; 32-NOT: subl ${{[0-9]+}}, %esp
; 32-NOT: addl ${{[0-9]+}}, %esp
; 32: jmp {{_?}}foo6
-; 64: t12:
+; 64-LABEL: t12:
; 64-NOT: subq ${{[0-9]+}}, %esp
; 64-NOT: addq ${{[0-9]+}}, %esp
; 64: jmp {{_?}}foo6
@@ -201,12 +201,12 @@ declare i32 @foo6(i32, i32, %struct.t* b
%struct.cp = type { float, float, float, float, float }
define %struct.ns* @t13(%struct.cp* %yy) nounwind ssp {
-; 32: t13:
+; 32-LABEL: t13:
; 32-NOT: jmp
; 32: calll
; 32: ret
-; 64: t13:
+; 64-LABEL: t13:
; 64-NOT: jmp
; 64: callq
; 64: ret
@@ -226,7 +226,7 @@ declare fastcc %struct.ns* @foo7(%struct
define void @t14(%struct.__block_literal_2* nocapture %.block_descriptor) nounwind ssp {
entry:
-; 64: t14:
+; 64-LABEL: t14:
; 64: movq 32(%rdi)
; 64-NOT: movq 16(%rdi)
; 64: jmpq *16({{%rdi|%rax}})
@@ -245,11 +245,11 @@ entry:
%struct.foo = type { [4 x i32] }
define void @t15(%struct.foo* noalias sret %agg.result) nounwind {
-; 32: t15:
+; 32-LABEL: t15:
; 32: calll {{_?}}f
; 32: ret $4
-; 64: t15:
+; 64-LABEL: t15:
; 64: callq {{_?}}f
; 64: ret
tail call fastcc void @f(%struct.foo* noalias sret %agg.result) nounwind
@@ -260,11 +260,11 @@ declare void @f(%struct.foo* noalias sre
define void @t16() nounwind ssp {
entry:
-; 32: t16:
+; 32-LABEL: t16:
; 32: calll {{_?}}bar4
; 32: fstp
-; 64: t16:
+; 64-LABEL: t16:
; 64: jmp {{_?}}bar4
%0 = tail call double @bar4() nounwind
ret void
@@ -275,10 +275,10 @@ declare double @bar4()
; rdar://6283267
define void @t17() nounwind ssp {
entry:
-; 32: t17:
+; 32-LABEL: t17:
; 32: jmp {{_?}}bar5
-; 64: t17:
+; 64-LABEL: t17:
; 64: xorl %eax, %eax
; 64: jmp {{_?}}bar5
tail call void (...)* @bar5() nounwind
@@ -290,11 +290,11 @@ declare void @bar5(...)
; rdar://7774847
define void @t18() nounwind ssp {
entry:
-; 32: t18:
+; 32-LABEL: t18:
; 32: calll {{_?}}bar6
; 32: fstp %st(0)
-; 64: t18:
+; 64-LABEL: t18:
; 64: xorl %eax, %eax
; 64: jmp {{_?}}bar6
%0 = tail call double (...)* @bar6() nounwind
@@ -305,7 +305,7 @@ declare double @bar6(...)
define void @t19() alignstack(32) nounwind {
entry:
-; CHECK: t19:
+; CHECK-LABEL: t19:
; CHECK: andl $-32
; CHECK: calll {{_?}}foo
tail call void @foo() nounwind
@@ -318,11 +318,11 @@ entry:
define double @t20(double %x) nounwind {
entry:
-; 32: t20:
+; 32-LABEL: t20:
; 32: calll {{_?}}foo20
; 32: fldl (%esp)
-; 64: t20:
+; 64-LABEL: t20:
; 64: jmp {{_?}}foo20
%0 = tail call fastcc double @foo20(double %x) nounwind
ret double %0
Modified: llvm/trunk/test/CodeGen/X86/sink-hoist.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sink-hoist.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sink-hoist.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sink-hoist.ll Sun Jul 14 01:24:09 2013
@@ -5,7 +5,7 @@
; evaluated, however with MachineSink we can sink the other side so
; that it's conditionally evaluated.
-; CHECK: foo:
+; CHECK-LABEL: foo:
; CHECK-NEXT: testb $1, %dil
; CHECK-NEXT: jne
; CHECK-NEXT: divsd
@@ -24,7 +24,7 @@ define double @foo(double %x, double %y,
; the conditional branch.
; rdar://8454886
-; CHECK: split:
+; CHECK-LABEL: split:
; CHECK-NEXT: testb $1, %dil
; CHECK-NEXT: jne
; CHECK-NEXT: movaps
@@ -40,7 +40,7 @@ define double @split(double %x, double %
; Hoist floating-point constant-pool loads out of loops.
-; CHECK: bar:
+; CHECK-LABEL: bar:
; CHECK: movsd
; CHECK: align
define void @bar(double* nocapture %p, i64 %n) nounwind {
@@ -87,7 +87,7 @@ return:
; Codegen should hoist and CSE these constants.
-; CHECK: vv:
+; CHECK-LABEL: vv:
; CHECK: LCPI3_0(%rip), %xmm0
; CHECK: LCPI3_1(%rip), %xmm1
; CHECK: LCPI3_2(%rip), %xmm2
@@ -151,7 +151,7 @@ declare <4 x float> @llvm.x86.sse2.cvtdq
; CodeGen should use the correct register class when extracting
; a load from a zero-extending load for hoisting.
-; CHECK: default_get_pch_validity:
+; CHECK-LABEL: default_get_pch_validity:
; CHECK: movl cl_options_count(%rip), %ecx
@cl_options_count = external constant i32 ; <i32*> [#uses=2]
Modified: llvm/trunk/test/CodeGen/X86/splat-scalar-load.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/splat-scalar-load.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/splat-scalar-load.ll (original)
+++ llvm/trunk/test/CodeGen/X86/splat-scalar-load.ll Sun Jul 14 01:24:09 2013
@@ -3,7 +3,7 @@
define <2 x i64> @t2() nounwind {
entry:
-; CHECK: t2:
+; CHECK-LABEL: t2:
; CHECK: pshufd $85, (%esp), %xmm0
%array = alloca [8 x float], align 4
%arrayidx = getelementptr inbounds [8 x float]* %array, i32 0, i32 1
Modified: llvm/trunk/test/CodeGen/X86/sse-align-12.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-align-12.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse-align-12.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse-align-12.ll Sun Jul 14 01:24:09 2013
@@ -1,6 +1,6 @@
; RUN: llc < %s -march=x86-64 -mcpu=nehalem | FileCheck %s
-; CHECK: a:
+; CHECK-LABEL: a:
; CHECK: movdqu
; CHECK: pshufd
define <4 x float> @a(<4 x float>* %y) nounwind {
@@ -16,7 +16,7 @@ define <4 x float> @a(<4 x float>* %y) n
ret <4 x float> %s
}
-; CHECK: b:
+; CHECK-LABEL: b:
; CHECK: movups
; CHECK: unpckhps
define <4 x float> @b(<4 x float>* %y, <4 x float> %z) nounwind {
@@ -32,7 +32,7 @@ define <4 x float> @b(<4 x float>* %y, <
ret <4 x float> %s
}
-; CHECK: c:
+; CHECK-LABEL: c:
; CHECK: movupd
; CHECK: shufpd
define <2 x double> @c(<2 x double>* %y) nounwind {
@@ -44,7 +44,7 @@ define <2 x double> @c(<2 x double>* %y)
ret <2 x double> %r
}
-; CHECK: d:
+; CHECK-LABEL: d:
; CHECK: movupd
; CHECK: unpckhpd
define <2 x double> @d(<2 x double>* %y, <2 x double> %z) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/sse-align-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-align-2.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse-align-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse-align-2.ll Sun Jul 14 01:24:09 2013
@@ -6,7 +6,7 @@ define <4 x float> @foo(<4 x float>* %p,
ret <4 x float> %z
}
-; CHECK: foo:
+; CHECK-LABEL: foo:
; CHECK: movups
; CHECK: ret
@@ -16,6 +16,6 @@ define <2 x double> @bar(<2 x double>* %
ret <2 x double> %z
}
-; CHECK: bar:
+; CHECK-LABEL: bar:
; CHECK: movupd
; CHECK: ret
Modified: llvm/trunk/test/CodeGen/X86/sse-commute.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-commute.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse-commute.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse-commute.ll Sun Jul 14 01:24:09 2013
@@ -3,7 +3,7 @@
; Commute the comparison to avoid a move.
; PR7500.
-; CHECK: a:
+; CHECK-LABEL: a:
; CHECK-NOT: mov
; CHECK: pcmpeqd
define <2 x double> @a(<2 x double>, <2 x double>) nounwind readnone {
Modified: llvm/trunk/test/CodeGen/X86/sse-minmax.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-minmax.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse-minmax.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse-minmax.ll Sun Jul 14 01:24:09 2013
@@ -12,13 +12,13 @@
; _y: use -0.0 instead of %y
; _inverse : swap the arms of the select.
-; CHECK: ogt:
+; CHECK-LABEL: ogt:
; CHECK-NEXT: maxsd %xmm1, %xmm0
; CHECK-NEXT: ret
-; UNSAFE: ogt:
+; UNSAFE-LABEL: ogt:
; UNSAFE-NEXT: maxsd %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: ogt:
+; FINITE-LABEL: ogt:
; FINITE-NEXT: maxsd %xmm1, %xmm0
; FINITE-NEXT: ret
define double @ogt(double %x, double %y) nounwind {
@@ -27,13 +27,13 @@ define double @ogt(double %x, double %y)
ret double %d
}
-; CHECK: olt:
+; CHECK-LABEL: olt:
; CHECK-NEXT: minsd %xmm1, %xmm0
; CHECK-NEXT: ret
-; UNSAFE: olt:
+; UNSAFE-LABEL: olt:
; UNSAFE-NEXT: minsd %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: olt:
+; FINITE-LABEL: olt:
; FINITE-NEXT: minsd %xmm1, %xmm0
; FINITE-NEXT: ret
define double @olt(double %x, double %y) nounwind {
@@ -42,14 +42,14 @@ define double @olt(double %x, double %y)
ret double %d
}
-; CHECK: ogt_inverse:
+; CHECK-LABEL: ogt_inverse:
; CHECK-NEXT: minsd %xmm0, %xmm1
; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0
; CHECK-NEXT: ret
-; UNSAFE: ogt_inverse:
+; UNSAFE-LABEL: ogt_inverse:
; UNSAFE-NEXT: minsd %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: ogt_inverse:
+; FINITE-LABEL: ogt_inverse:
; FINITE-NEXT: minsd %xmm0, %xmm1
; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
; FINITE-NEXT: ret
@@ -59,14 +59,14 @@ define double @ogt_inverse(double %x, do
ret double %d
}
-; CHECK: olt_inverse:
+; CHECK-LABEL: olt_inverse:
; CHECK-NEXT: maxsd %xmm0, %xmm1
; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0
; CHECK-NEXT: ret
-; UNSAFE: olt_inverse:
+; UNSAFE-LABEL: olt_inverse:
; UNSAFE-NEXT: maxsd %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: olt_inverse:
+; FINITE-LABEL: olt_inverse:
; FINITE-NEXT: maxsd %xmm0, %xmm1
; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
; FINITE-NEXT: ret
@@ -76,12 +76,12 @@ define double @olt_inverse(double %x, do
ret double %d
}
-; CHECK: oge:
+; CHECK-LABEL: oge:
; CHECK-NEXT: ucomisd %xmm1, %xmm0
-; UNSAFE: oge:
+; UNSAFE-LABEL: oge:
; UNSAFE-NEXT: maxsd %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: oge:
+; FINITE-LABEL: oge:
; FINITE-NEXT: maxsd %xmm1, %xmm0
; FINITE-NEXT: ret
define double @oge(double %x, double %y) nounwind {
@@ -90,11 +90,11 @@ define double @oge(double %x, double %y)
ret double %d
}
-; CHECK: ole:
+; CHECK-LABEL: ole:
; CHECK-NEXT: ucomisd %xmm0, %xmm1
-; UNSAFE: ole:
+; UNSAFE-LABEL: ole:
; UNSAFE-NEXT: minsd %xmm1, %xmm0
-; FINITE: ole:
+; FINITE-LABEL: ole:
; FINITE-NEXT: minsd %xmm1, %xmm0
define double @ole(double %x, double %y) nounwind {
%c = fcmp ole double %x, %y
@@ -102,12 +102,12 @@ define double @ole(double %x, double %y)
ret double %d
}
-; CHECK: oge_inverse:
+; CHECK-LABEL: oge_inverse:
; CHECK-NEXT: ucomisd %xmm1, %xmm0
-; UNSAFE: oge_inverse:
+; UNSAFE-LABEL: oge_inverse:
; UNSAFE-NEXT: minsd %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: oge_inverse:
+; FINITE-LABEL: oge_inverse:
; FINITE-NEXT: minsd %xmm0, %xmm1
; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
; FINITE-NEXT: ret
@@ -117,12 +117,12 @@ define double @oge_inverse(double %x, do
ret double %d
}
-; CHECK: ole_inverse:
+; CHECK-LABEL: ole_inverse:
; CHECK-NEXT: ucomisd %xmm0, %xmm1
-; UNSAFE: ole_inverse:
+; UNSAFE-LABEL: ole_inverse:
; UNSAFE-NEXT: maxsd %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: ole_inverse:
+; FINITE-LABEL: ole_inverse:
; FINITE-NEXT: maxsd %xmm0, %xmm1
; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
; FINITE-NEXT: ret
@@ -132,16 +132,16 @@ define double @ole_inverse(double %x, do
ret double %d
}
-; CHECK: ogt_x:
+; CHECK-LABEL: ogt_x:
; CHECK-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; CHECK-NEXT: maxsd %xmm1, %xmm0
; CHECK-NEXT: ret
-; UNSAFE: ogt_x:
+; UNSAFE-LABEL: ogt_x:
; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; UNSAFE-NEXT: maxsd %xmm0, %xmm1
; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: ogt_x:
+; FINITE-LABEL: ogt_x:
; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; FINITE-NEXT: maxsd %xmm1, %xmm0
; FINITE-NEXT: ret
@@ -151,16 +151,16 @@ define double @ogt_x(double %x) nounwind
ret double %d
}
-; CHECK: olt_x:
+; CHECK-LABEL: olt_x:
; CHECK-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; CHECK-NEXT: minsd %xmm1, %xmm0
; CHECK-NEXT: ret
-; UNSAFE: olt_x:
+; UNSAFE-LABEL: olt_x:
; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; UNSAFE-NEXT: minsd %xmm0, %xmm1
; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: olt_x:
+; FINITE-LABEL: olt_x:
; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; FINITE-NEXT: minsd %xmm1, %xmm0
; FINITE-NEXT: ret
@@ -170,17 +170,17 @@ define double @olt_x(double %x) nounwind
ret double %d
}
-; CHECK: ogt_inverse_x:
+; CHECK-LABEL: ogt_inverse_x:
; CHECK-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; CHECK-NEXT: minsd %xmm0, %xmm1
; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0
; CHECK-NEXT: ret
-; UNSAFE: ogt_inverse_x:
+; UNSAFE-LABEL: ogt_inverse_x:
; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; UNSAFE-NEXT: minsd %xmm0, %xmm1
; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: ogt_inverse_x:
+; FINITE-LABEL: ogt_inverse_x:
; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; FINITE-NEXT: minsd %xmm0, %xmm1
; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
@@ -191,17 +191,17 @@ define double @ogt_inverse_x(double %x)
ret double %d
}
-; CHECK: olt_inverse_x:
+; CHECK-LABEL: olt_inverse_x:
; CHECK-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; CHECK-NEXT: maxsd %xmm0, %xmm1
; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0
; CHECK-NEXT: ret
-; UNSAFE: olt_inverse_x:
+; UNSAFE-LABEL: olt_inverse_x:
; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; UNSAFE-NEXT: maxsd %xmm0, %xmm1
; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: olt_inverse_x:
+; FINITE-LABEL: olt_inverse_x:
; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; FINITE-NEXT: maxsd %xmm0, %xmm1
; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
@@ -212,14 +212,14 @@ define double @olt_inverse_x(double %x)
ret double %d
}
-; CHECK: oge_x:
+; CHECK-LABEL: oge_x:
; CHECK: ucomisd %xmm1, %xmm0
-; UNSAFE: oge_x:
+; UNSAFE-LABEL: oge_x:
; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; UNSAFE-NEXT: maxsd %xmm0, %xmm1
; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: oge_x:
+; FINITE-LABEL: oge_x:
; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; FINITE-NEXT: maxsd %xmm1, %xmm0
; FINITE-NEXT: ret
@@ -229,14 +229,14 @@ define double @oge_x(double %x) nounwind
ret double %d
}
-; CHECK: ole_x:
+; CHECK-LABEL: ole_x:
; CHECK: ucomisd %xmm0, %xmm1
-; UNSAFE: ole_x:
+; UNSAFE-LABEL: ole_x:
; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; UNSAFE-NEXT: minsd %xmm0, %xmm1
; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: ole_x:
+; FINITE-LABEL: ole_x:
; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; FINITE-NEXT: minsd %xmm1, %xmm0
; FINITE-NEXT: ret
@@ -246,14 +246,14 @@ define double @ole_x(double %x) nounwind
ret double %d
}
-; CHECK: oge_inverse_x:
+; CHECK-LABEL: oge_inverse_x:
; CHECK: ucomisd %xmm
-; UNSAFE: oge_inverse_x:
+; UNSAFE-LABEL: oge_inverse_x:
; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; UNSAFE-NEXT: minsd %xmm0, %xmm1
; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: oge_inverse_x:
+; FINITE-LABEL: oge_inverse_x:
; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; FINITE-NEXT: minsd %xmm0, %xmm1
; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
@@ -264,14 +264,14 @@ define double @oge_inverse_x(double %x)
ret double %d
}
-; CHECK: ole_inverse_x:
+; CHECK-LABEL: ole_inverse_x:
; CHECK: ucomisd %xmm
-; UNSAFE: ole_inverse_x:
+; UNSAFE-LABEL: ole_inverse_x:
; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; UNSAFE-NEXT: maxsd %xmm0, %xmm1
; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: ole_inverse_x:
+; FINITE-LABEL: ole_inverse_x:
; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; FINITE-NEXT: maxsd %xmm0, %xmm1
; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
@@ -282,12 +282,12 @@ define double @ole_inverse_x(double %x)
ret double %d
}
-; CHECK: ugt:
+; CHECK-LABEL: ugt:
; CHECK: ucomisd %xmm0, %xmm1
-; UNSAFE: ugt:
+; UNSAFE-LABEL: ugt:
; UNSAFE-NEXT: maxsd %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: ugt:
+; FINITE-LABEL: ugt:
; FINITE-NEXT: maxsd %xmm1, %xmm0
; FINITE-NEXT: ret
define double @ugt(double %x, double %y) nounwind {
@@ -296,12 +296,12 @@ define double @ugt(double %x, double %y)
ret double %d
}
-; CHECK: ult:
+; CHECK-LABEL: ult:
; CHECK: ucomisd %xmm1, %xmm0
-; UNSAFE: ult:
+; UNSAFE-LABEL: ult:
; UNSAFE-NEXT: minsd %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: ult:
+; FINITE-LABEL: ult:
; FINITE-NEXT: minsd %xmm1, %xmm0
; FINITE-NEXT: ret
define double @ult(double %x, double %y) nounwind {
@@ -310,12 +310,12 @@ define double @ult(double %x, double %y)
ret double %d
}
-; CHECK: ugt_inverse:
+; CHECK-LABEL: ugt_inverse:
; CHECK: ucomisd %xmm0, %xmm1
-; UNSAFE: ugt_inverse:
+; UNSAFE-LABEL: ugt_inverse:
; UNSAFE-NEXT: minsd %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: ugt_inverse:
+; FINITE-LABEL: ugt_inverse:
; FINITE-NEXT: minsd %xmm0, %xmm1
; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
; FINITE-NEXT: ret
@@ -325,12 +325,12 @@ define double @ugt_inverse(double %x, do
ret double %d
}
-; CHECK: ult_inverse:
+; CHECK-LABEL: ult_inverse:
; CHECK: ucomisd %xmm1, %xmm0
-; UNSAFE: ult_inverse:
+; UNSAFE-LABEL: ult_inverse:
; UNSAFE-NEXT: maxsd %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: ult_inverse:
+; FINITE-LABEL: ult_inverse:
; FINITE-NEXT: maxsd %xmm0, %xmm1
; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
; FINITE-NEXT: ret
@@ -340,14 +340,14 @@ define double @ult_inverse(double %x, do
ret double %d
}
-; CHECK: uge:
+; CHECK-LABEL: uge:
; CHECK-NEXT: maxsd %xmm0, %xmm1
; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0
; CHECK-NEXT: ret
-; UNSAFE: uge:
+; UNSAFE-LABEL: uge:
; UNSAFE-NEXT: maxsd %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: uge:
+; FINITE-LABEL: uge:
; FINITE-NEXT: maxsd %xmm1, %xmm0
; FINITE-NEXT: ret
define double @uge(double %x, double %y) nounwind {
@@ -356,14 +356,14 @@ define double @uge(double %x, double %y)
ret double %d
}
-; CHECK: ule:
+; CHECK-LABEL: ule:
; CHECK-NEXT: minsd %xmm0, %xmm1
; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0
; CHECK-NEXT: ret
-; UNSAFE: ule:
+; UNSAFE-LABEL: ule:
; UNSAFE-NEXT: minsd %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: ule:
+; FINITE-LABEL: ule:
; FINITE-NEXT: minsd %xmm1, %xmm0
; FINITE-NEXT: ret
define double @ule(double %x, double %y) nounwind {
@@ -372,13 +372,13 @@ define double @ule(double %x, double %y)
ret double %d
}
-; CHECK: uge_inverse:
+; CHECK-LABEL: uge_inverse:
; CHECK-NEXT: minsd %xmm1, %xmm0
; CHECK-NEXT: ret
-; UNSAFE: uge_inverse:
+; UNSAFE-LABEL: uge_inverse:
; UNSAFE-NEXT: minsd %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: uge_inverse:
+; FINITE-LABEL: uge_inverse:
; FINITE-NEXT: minsd %xmm0, %xmm1
; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
; FINITE-NEXT: ret
@@ -388,13 +388,13 @@ define double @uge_inverse(double %x, do
ret double %d
}
-; CHECK: ule_inverse:
+; CHECK-LABEL: ule_inverse:
; CHECK-NEXT: maxsd %xmm1, %xmm0
; CHECK-NEXT: ret
-; UNSAFE: ule_inverse:
+; UNSAFE-LABEL: ule_inverse:
; UNSAFE-NEXT: maxsd %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: ule_inverse:
+; FINITE-LABEL: ule_inverse:
; FINITE-NEXT: maxsd %xmm0, %xmm1
; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
; FINITE-NEXT: ret
@@ -404,14 +404,14 @@ define double @ule_inverse(double %x, do
ret double %d
}
-; CHECK: ugt_x:
+; CHECK-LABEL: ugt_x:
; CHECK: ucomisd %xmm0, %xmm1
-; UNSAFE: ugt_x:
+; UNSAFE-LABEL: ugt_x:
; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; UNSAFE-NEXT: maxsd %xmm0, %xmm1
; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: ugt_x:
+; FINITE-LABEL: ugt_x:
; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; FINITE-NEXT: maxsd %xmm1, %xmm0
; FINITE-NEXT: ret
@@ -421,14 +421,14 @@ define double @ugt_x(double %x) nounwind
ret double %d
}
-; CHECK: ult_x:
+; CHECK-LABEL: ult_x:
; CHECK: ucomisd %xmm1, %xmm0
-; UNSAFE: ult_x:
+; UNSAFE-LABEL: ult_x:
; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; UNSAFE-NEXT: minsd %xmm0, %xmm1
; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: ult_x:
+; FINITE-LABEL: ult_x:
; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; FINITE-NEXT: minsd %xmm1, %xmm0
; FINITE-NEXT: ret
@@ -438,14 +438,14 @@ define double @ult_x(double %x) nounwind
ret double %d
}
-; CHECK: ugt_inverse_x:
+; CHECK-LABEL: ugt_inverse_x:
; CHECK: ucomisd %xmm
-; UNSAFE: ugt_inverse_x:
+; UNSAFE-LABEL: ugt_inverse_x:
; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; UNSAFE-NEXT: minsd %xmm0, %xmm1
; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: ugt_inverse_x:
+; FINITE-LABEL: ugt_inverse_x:
; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; FINITE-NEXT: minsd %xmm0, %xmm1
; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
@@ -456,14 +456,14 @@ define double @ugt_inverse_x(double %x)
ret double %d
}
-; CHECK: ult_inverse_x:
+; CHECK-LABEL: ult_inverse_x:
; CHECK: ucomisd %xmm
-; UNSAFE: ult_inverse_x:
+; UNSAFE-LABEL: ult_inverse_x:
; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; UNSAFE-NEXT: maxsd %xmm0, %xmm1
; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: ult_inverse_x:
+; FINITE-LABEL: ult_inverse_x:
; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; FINITE-NEXT: maxsd %xmm0, %xmm1
; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
@@ -474,17 +474,17 @@ define double @ult_inverse_x(double %x)
ret double %d
}
-; CHECK: uge_x:
+; CHECK-LABEL: uge_x:
; CHECK-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; CHECK-NEXT: maxsd %xmm0, %xmm1
; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0
; CHECK-NEXT: ret
-; UNSAFE: uge_x:
+; UNSAFE-LABEL: uge_x:
; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; UNSAFE-NEXT: maxsd %xmm0, %xmm1
; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: uge_x:
+; FINITE-LABEL: uge_x:
; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; FINITE-NEXT: maxsd %xmm1, %xmm0
; FINITE-NEXT: ret
@@ -494,17 +494,17 @@ define double @uge_x(double %x) nounwind
ret double %d
}
-; CHECK: ule_x:
+; CHECK-LABEL: ule_x:
; CHECK-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; CHECK-NEXT: minsd %xmm0, %xmm1
; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0
; CHECK-NEXT: ret
-; UNSAFE: ule_x:
+; UNSAFE-LABEL: ule_x:
; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; UNSAFE-NEXT: minsd %xmm0, %xmm1
; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: ule_x:
+; FINITE-LABEL: ule_x:
; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; FINITE-NEXT: minsd %xmm1, %xmm0
; FINITE-NEXT: ret
@@ -514,16 +514,16 @@ define double @ule_x(double %x) nounwind
ret double %d
}
-; CHECK: uge_inverse_x:
+; CHECK-LABEL: uge_inverse_x:
; CHECK-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; CHECK-NEXT: minsd %xmm1, %xmm0
; CHECK-NEXT: ret
-; UNSAFE: uge_inverse_x:
+; UNSAFE-LABEL: uge_inverse_x:
; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; UNSAFE-NEXT: minsd %xmm0, %xmm1
; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: uge_inverse_x:
+; FINITE-LABEL: uge_inverse_x:
; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; FINITE-NEXT: minsd %xmm0, %xmm1
; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
@@ -534,16 +534,16 @@ define double @uge_inverse_x(double %x)
ret double %d
}
-; CHECK: ule_inverse_x:
+; CHECK-LABEL: ule_inverse_x:
; CHECK-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; CHECK-NEXT: maxsd %xmm1, %xmm0
; CHECK-NEXT: ret
-; UNSAFE: ule_inverse_x:
+; UNSAFE-LABEL: ule_inverse_x:
; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; UNSAFE-NEXT: maxsd %xmm0, %xmm1
; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: ule_inverse_x:
+; FINITE-LABEL: ule_inverse_x:
; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
; FINITE-NEXT: maxsd %xmm0, %xmm1
; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
@@ -554,13 +554,13 @@ define double @ule_inverse_x(double %x)
ret double %d
}
-; CHECK: ogt_y:
+; CHECK-LABEL: ogt_y:
; CHECK-NEXT: maxsd {{[^,]*}}, %xmm0
; CHECK-NEXT: ret
-; UNSAFE: ogt_y:
+; UNSAFE-LABEL: ogt_y:
; UNSAFE-NEXT: maxsd {{[^,]*}}, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: ogt_y:
+; FINITE-LABEL: ogt_y:
; FINITE-NEXT: maxsd {{[^,]*}}, %xmm0
; FINITE-NEXT: ret
define double @ogt_y(double %x) nounwind {
@@ -569,13 +569,13 @@ define double @ogt_y(double %x) nounwind
ret double %d
}
-; CHECK: olt_y:
+; CHECK-LABEL: olt_y:
; CHECK-NEXT: minsd {{[^,]*}}, %xmm0
; CHECK-NEXT: ret
-; UNSAFE: olt_y:
+; UNSAFE-LABEL: olt_y:
; UNSAFE-NEXT: minsd {{[^,]*}}, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: olt_y:
+; FINITE-LABEL: olt_y:
; FINITE-NEXT: minsd {{[^,]*}}, %xmm0
; FINITE-NEXT: ret
define double @olt_y(double %x) nounwind {
@@ -584,15 +584,15 @@ define double @olt_y(double %x) nounwind
ret double %d
}
-; CHECK: ogt_inverse_y:
+; CHECK-LABEL: ogt_inverse_y:
; CHECK-NEXT: movsd {{[^,]*}}, %xmm1
; CHECK-NEXT: minsd %xmm0, %xmm1
; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0
; CHECK-NEXT: ret
-; UNSAFE: ogt_inverse_y:
+; UNSAFE-LABEL: ogt_inverse_y:
; UNSAFE-NEXT: minsd {{[^,]*}}, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: ogt_inverse_y:
+; FINITE-LABEL: ogt_inverse_y:
; FINITE-NEXT: movsd {{[^,]*}}, %xmm1
; FINITE-NEXT: minsd %xmm0, %xmm1
; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
@@ -603,15 +603,15 @@ define double @ogt_inverse_y(double %x)
ret double %d
}
-; CHECK: olt_inverse_y:
+; CHECK-LABEL: olt_inverse_y:
; CHECK-NEXT: movsd {{[^,]*}}, %xmm1
; CHECK-NEXT: maxsd %xmm0, %xmm1
; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0
; CHECK-NEXT: ret
-; UNSAFE: olt_inverse_y:
+; UNSAFE-LABEL: olt_inverse_y:
; UNSAFE-NEXT: maxsd {{[^,]*}}, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: olt_inverse_y:
+; FINITE-LABEL: olt_inverse_y:
; FINITE-NEXT: movsd {{[^,]*}}, %xmm1
; FINITE-NEXT: maxsd %xmm0, %xmm1
; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
@@ -622,12 +622,12 @@ define double @olt_inverse_y(double %x)
ret double %d
}
-; CHECK: oge_y:
+; CHECK-LABEL: oge_y:
; CHECK: ucomisd %xmm1, %xmm0
-; UNSAFE: oge_y:
+; UNSAFE-LABEL: oge_y:
; UNSAFE-NEXT: maxsd {{[^,]*}}, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: oge_y:
+; FINITE-LABEL: oge_y:
; FINITE-NEXT: maxsd {{[^,]*}}, %xmm0
; FINITE-NEXT: ret
define double @oge_y(double %x) nounwind {
@@ -636,12 +636,12 @@ define double @oge_y(double %x) nounwind
ret double %d
}
-; CHECK: ole_y:
+; CHECK-LABEL: ole_y:
; CHECK: ucomisd %xmm0, %xmm1
-; UNSAFE: ole_y:
+; UNSAFE-LABEL: ole_y:
; UNSAFE-NEXT: minsd {{[^,]*}}, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: ole_y:
+; FINITE-LABEL: ole_y:
; FINITE-NEXT: minsd {{[^,]*}}, %xmm0
; FINITE-NEXT: ret
define double @ole_y(double %x) nounwind {
@@ -650,12 +650,12 @@ define double @ole_y(double %x) nounwind
ret double %d
}
-; CHECK: oge_inverse_y:
+; CHECK-LABEL: oge_inverse_y:
; CHECK: ucomisd %xmm
-; UNSAFE: oge_inverse_y:
+; UNSAFE-LABEL: oge_inverse_y:
; UNSAFE-NEXT: minsd {{[^,]*}}, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: oge_inverse_y:
+; FINITE-LABEL: oge_inverse_y:
; FINITE-NEXT: movsd {{[^,]*}}, %xmm1
; FINITE-NEXT: minsd %xmm0, %xmm1
; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
@@ -666,12 +666,12 @@ define double @oge_inverse_y(double %x)
ret double %d
}
-; CHECK: ole_inverse_y:
+; CHECK-LABEL: ole_inverse_y:
; CHECK: ucomisd %xmm
-; UNSAFE: ole_inverse_y:
+; UNSAFE-LABEL: ole_inverse_y:
; UNSAFE-NEXT: maxsd {{[^,]*}}, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: ole_inverse_y:
+; FINITE-LABEL: ole_inverse_y:
; FINITE-NEXT: movsd {{[^,]*}}, %xmm1
; FINITE-NEXT: maxsd %xmm0, %xmm1
; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
@@ -682,12 +682,12 @@ define double @ole_inverse_y(double %x)
ret double %d
}
-; CHECK: ugt_y:
+; CHECK-LABEL: ugt_y:
; CHECK: ucomisd %xmm0, %xmm1
-; UNSAFE: ugt_y:
+; UNSAFE-LABEL: ugt_y:
; UNSAFE-NEXT: maxsd {{[^,]*}}, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: ugt_y:
+; FINITE-LABEL: ugt_y:
; FINITE-NEXT: maxsd {{[^,]*}}, %xmm0
; FINITE-NEXT: ret
define double @ugt_y(double %x) nounwind {
@@ -696,12 +696,12 @@ define double @ugt_y(double %x) nounwind
ret double %d
}
-; CHECK: ult_y:
+; CHECK-LABEL: ult_y:
; CHECK: ucomisd %xmm1, %xmm0
-; UNSAFE: ult_y:
+; UNSAFE-LABEL: ult_y:
; UNSAFE-NEXT: minsd {{[^,]*}}, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: ult_y:
+; FINITE-LABEL: ult_y:
; FINITE-NEXT: minsd {{[^,]*}}, %xmm0
; FINITE-NEXT: ret
define double @ult_y(double %x) nounwind {
@@ -710,12 +710,12 @@ define double @ult_y(double %x) nounwind
ret double %d
}
-; CHECK: ugt_inverse_y:
+; CHECK-LABEL: ugt_inverse_y:
; CHECK: ucomisd %xmm
-; UNSAFE: ugt_inverse_y:
+; UNSAFE-LABEL: ugt_inverse_y:
; UNSAFE-NEXT: minsd {{[^,]*}}, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: ugt_inverse_y:
+; FINITE-LABEL: ugt_inverse_y:
; FINITE-NEXT: movsd {{[^,]*}}, %xmm1
; FINITE-NEXT: minsd %xmm0, %xmm1
; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
@@ -726,12 +726,12 @@ define double @ugt_inverse_y(double %x)
ret double %d
}
-; CHECK: ult_inverse_y:
+; CHECK-LABEL: ult_inverse_y:
; CHECK: ucomisd %xmm
-; UNSAFE: ult_inverse_y:
+; UNSAFE-LABEL: ult_inverse_y:
; UNSAFE-NEXT: maxsd {{[^,]*}}, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: ult_inverse_y:
+; FINITE-LABEL: ult_inverse_y:
; FINITE-NEXT: movsd {{[^,]*}}, %xmm1
; FINITE-NEXT: maxsd %xmm0, %xmm1
; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
@@ -742,15 +742,15 @@ define double @ult_inverse_y(double %x)
ret double %d
}
-; CHECK: uge_y:
+; CHECK-LABEL: uge_y:
; CHECK-NEXT: movsd {{[^,]*}}, %xmm1
; CHECK-NEXT: maxsd %xmm0, %xmm1
; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0
; CHECK-NEXT: ret
-; UNSAFE: uge_y:
+; UNSAFE-LABEL: uge_y:
; UNSAFE-NEXT: maxsd {{[^,]*}}, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: uge_y:
+; FINITE-LABEL: uge_y:
; FINITE-NEXT: maxsd {{[^,]*}}, %xmm0
; FINITE-NEXT: ret
define double @uge_y(double %x) nounwind {
@@ -759,15 +759,15 @@ define double @uge_y(double %x) nounwind
ret double %d
}
-; CHECK: ule_y:
+; CHECK-LABEL: ule_y:
; CHECK-NEXT: movsd {{[^,]*}}, %xmm1
; CHECK-NEXT: minsd %xmm0, %xmm1
; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0
; CHECK-NEXT: ret
-; UNSAFE: ule_y:
+; UNSAFE-LABEL: ule_y:
; UNSAFE-NEXT: minsd {{[^,]*}}, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: ule_y:
+; FINITE-LABEL: ule_y:
; FINITE-NEXT: minsd {{[^,]*}}, %xmm0
; FINITE-NEXT: ret
define double @ule_y(double %x) nounwind {
@@ -776,13 +776,13 @@ define double @ule_y(double %x) nounwind
ret double %d
}
-; CHECK: uge_inverse_y:
+; CHECK-LABEL: uge_inverse_y:
; CHECK-NEXT: minsd {{[^,]*}}, %xmm0
; CHECK-NEXT: ret
-; UNSAFE: uge_inverse_y:
+; UNSAFE-LABEL: uge_inverse_y:
; UNSAFE-NEXT: minsd {{[^,]*}}, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: uge_inverse_y:
+; FINITE-LABEL: uge_inverse_y:
; FINITE-NEXT: movsd {{[^,]*}}, %xmm1
; FINITE-NEXT: minsd %xmm0, %xmm1
; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
@@ -793,13 +793,13 @@ define double @uge_inverse_y(double %x)
ret double %d
}
-; CHECK: ule_inverse_y:
+; CHECK-LABEL: ule_inverse_y:
; CHECK-NEXT: maxsd {{[^,]*}}, %xmm0
; CHECK-NEXT: ret
-; UNSAFE: ule_inverse_y:
+; UNSAFE-LABEL: ule_inverse_y:
; UNSAFE-NEXT: maxsd {{[^,]*}}, %xmm0
; UNSAFE-NEXT: ret
-; FINITE: ule_inverse_y:
+; FINITE-LABEL: ule_inverse_y:
; FINITE-NEXT: movsd {{[^,]*}}, %xmm1
; FINITE-NEXT: maxsd %xmm0, %xmm1
; FINITE-NEXT: movap{{[sd]}} %xmm1, %xmm0
@@ -811,11 +811,11 @@ define double @ule_inverse_y(double %x)
}
; Test a few more misc. cases.
-; CHECK: clampTo3k_a:
+; CHECK-LABEL: clampTo3k_a:
; CHECK: minsd
-; UNSAFE: clampTo3k_a:
+; UNSAFE-LABEL: clampTo3k_a:
; UNSAFE: minsd
-; FINITE: clampTo3k_a:
+; FINITE-LABEL: clampTo3k_a:
; FINITE: minsd
define double @clampTo3k_a(double %x) nounwind readnone {
entry:
@@ -824,11 +824,11 @@ entry:
ret double %x_addr.0
}
-; CHECK: clampTo3k_b:
+; CHECK-LABEL: clampTo3k_b:
; CHECK: minsd
-; UNSAFE: clampTo3k_b:
+; UNSAFE-LABEL: clampTo3k_b:
; UNSAFE: minsd
-; FINITE: clampTo3k_b:
+; FINITE-LABEL: clampTo3k_b:
; FINITE: minsd
define double @clampTo3k_b(double %x) nounwind readnone {
entry:
@@ -837,11 +837,11 @@ entry:
ret double %x_addr.0
}
-; CHECK: clampTo3k_c:
+; CHECK-LABEL: clampTo3k_c:
; CHECK: maxsd
-; UNSAFE: clampTo3k_c:
+; UNSAFE-LABEL: clampTo3k_c:
; UNSAFE: maxsd
-; FINITE: clampTo3k_c:
+; FINITE-LABEL: clampTo3k_c:
; FINITE: maxsd
define double @clampTo3k_c(double %x) nounwind readnone {
entry:
@@ -850,11 +850,11 @@ entry:
ret double %x_addr.0
}
-; CHECK: clampTo3k_d:
+; CHECK-LABEL: clampTo3k_d:
; CHECK: maxsd
-; UNSAFE: clampTo3k_d:
+; UNSAFE-LABEL: clampTo3k_d:
; UNSAFE: maxsd
-; FINITE: clampTo3k_d:
+; FINITE-LABEL: clampTo3k_d:
; FINITE: maxsd
define double @clampTo3k_d(double %x) nounwind readnone {
entry:
@@ -863,11 +863,11 @@ entry:
ret double %x_addr.0
}
-; CHECK: clampTo3k_e:
+; CHECK-LABEL: clampTo3k_e:
; CHECK: maxsd
-; UNSAFE: clampTo3k_e:
+; UNSAFE-LABEL: clampTo3k_e:
; UNSAFE: maxsd
-; FINITE: clampTo3k_e:
+; FINITE-LABEL: clampTo3k_e:
; FINITE: maxsd
define double @clampTo3k_e(double %x) nounwind readnone {
entry:
@@ -876,11 +876,11 @@ entry:
ret double %x_addr.0
}
-; CHECK: clampTo3k_f:
+; CHECK-LABEL: clampTo3k_f:
; CHECK: maxsd
-; UNSAFE: clampTo3k_f:
+; UNSAFE-LABEL: clampTo3k_f:
; UNSAFE: maxsd
-; FINITE: clampTo3k_f:
+; FINITE-LABEL: clampTo3k_f:
; FINITE: maxsd
define double @clampTo3k_f(double %x) nounwind readnone {
entry:
@@ -889,11 +889,11 @@ entry:
ret double %x_addr.0
}
-; CHECK: clampTo3k_g:
+; CHECK-LABEL: clampTo3k_g:
; CHECK: minsd
-; UNSAFE: clampTo3k_g:
+; UNSAFE-LABEL: clampTo3k_g:
; UNSAFE: minsd
-; FINITE: clampTo3k_g:
+; FINITE-LABEL: clampTo3k_g:
; FINITE: minsd
define double @clampTo3k_g(double %x) nounwind readnone {
entry:
@@ -902,11 +902,11 @@ entry:
ret double %x_addr.0
}
-; CHECK: clampTo3k_h:
+; CHECK-LABEL: clampTo3k_h:
; CHECK: minsd
-; UNSAFE: clampTo3k_h:
+; UNSAFE-LABEL: clampTo3k_h:
; UNSAFE: minsd
-; FINITE: clampTo3k_h:
+; FINITE-LABEL: clampTo3k_h:
; FINITE: minsd
define double @clampTo3k_h(double %x) nounwind readnone {
entry:
@@ -915,7 +915,7 @@ entry:
ret double %x_addr.0
}
-; UNSAFE: maxpd:
+; UNSAFE-LABEL: maxpd:
; UNSAFE: maxpd
define <2 x double> @maxpd(<2 x double> %x, <2 x double> %y) {
%max_is_x = fcmp oge <2 x double> %x, %y
@@ -923,7 +923,7 @@ define <2 x double> @maxpd(<2 x double>
ret <2 x double> %max
}
-; UNSAFE: minpd:
+; UNSAFE-LABEL: minpd:
; UNSAFE: minpd
define <2 x double> @minpd(<2 x double> %x, <2 x double> %y) {
%min_is_x = fcmp ole <2 x double> %x, %y
@@ -931,7 +931,7 @@ define <2 x double> @minpd(<2 x double>
ret <2 x double> %min
}
-; UNSAFE: maxps:
+; UNSAFE-LABEL: maxps:
; UNSAFE: maxps
define <4 x float> @maxps(<4 x float> %x, <4 x float> %y) {
%max_is_x = fcmp oge <4 x float> %x, %y
@@ -939,7 +939,7 @@ define <4 x float> @maxps(<4 x float> %x
ret <4 x float> %max
}
-; UNSAFE: minps:
+; UNSAFE-LABEL: minps:
; UNSAFE: minps
define <4 x float> @minps(<4 x float> %x, <4 x float> %y) {
%min_is_x = fcmp ole <4 x float> %x, %y
Modified: llvm/trunk/test/CodeGen/X86/sse3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse3.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse3.ll Sun Jul 14 01:24:09 2013
@@ -15,7 +15,7 @@ entry:
store <8 x i16> %tmp6, <8 x i16>* %dest
ret void
-; X64: t0:
+; X64-LABEL: t0:
; X64: movdqa (%rsi), %xmm0
; X64: pslldq $2, %xmm0
; X64: movdqa %xmm0, (%rdi)
@@ -28,7 +28,7 @@ define <8 x i16> @t1(<8 x i16>* %A, <8 x
%tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> < i32 8, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 >
ret <8 x i16> %tmp3
-; X64: t1:
+; X64-LABEL: t1:
; X64: movdqa (%rdi), %xmm0
; X64: pinsrw $0, (%rsi), %xmm0
; X64: ret
@@ -37,7 +37,7 @@ define <8 x i16> @t1(<8 x i16>* %A, <8 x
define <8 x i16> @t2(<8 x i16> %A, <8 x i16> %B) nounwind {
%tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 9, i32 1, i32 2, i32 9, i32 4, i32 5, i32 6, i32 7 >
ret <8 x i16> %tmp
-; X64: t2:
+; X64-LABEL: t2:
; X64: pextrw $1, %xmm1, %eax
; X64: pinsrw $0, %eax, %xmm0
; X64: pinsrw $3, %eax, %xmm0
@@ -47,7 +47,7 @@ define <8 x i16> @t2(<8 x i16> %A, <8 x
define <8 x i16> @t3(<8 x i16> %A, <8 x i16> %B) nounwind {
%tmp = shufflevector <8 x i16> %A, <8 x i16> %A, <8 x i32> < i32 8, i32 3, i32 2, i32 13, i32 7, i32 6, i32 5, i32 4 >
ret <8 x i16> %tmp
-; X64: t3:
+; X64-LABEL: t3:
; X64: pextrw $5, %xmm0, %eax
; X64: pshuflw $44, %xmm0, %xmm0
; X64: pshufhw $27, %xmm0, %xmm0
@@ -58,7 +58,7 @@ define <8 x i16> @t3(<8 x i16> %A, <8 x
define <8 x i16> @t4(<8 x i16> %A, <8 x i16> %B) nounwind {
%tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 0, i32 7, i32 2, i32 3, i32 1, i32 5, i32 6, i32 5 >
ret <8 x i16> %tmp
-; X64: t4:
+; X64-LABEL: t4:
; X64: pextrw $7, [[XMM0:%xmm[0-9]+]], %eax
; X64: pshufhw $100, [[XMM0]], [[XMM1:%xmm[0-9]+]]
; X64: pinsrw $1, %eax, [[XMM1]]
@@ -179,7 +179,7 @@ entry:
%tmp7 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 1, i32 8, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef , i32 undef >
ret <8 x i16> %tmp7
-; X64: t11:
+; X64-LABEL: t11:
; X64: movd %xmm1, %eax
; X64: movlhps %xmm0, %xmm0
; X64: pshuflw $1, %xmm0, %xmm0
@@ -193,7 +193,7 @@ entry:
%tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 0, i32 1, i32 undef, i32 undef, i32 3, i32 11, i32 undef , i32 undef >
ret <8 x i16> %tmp9
-; X64: t12:
+; X64-LABEL: t12:
; X64: pextrw $3, %xmm1, %eax
; X64: movlhps %xmm0, %xmm0
; X64: pshufhw $3, %xmm0, %xmm0
@@ -206,7 +206,7 @@ define <8 x i16> @t13(<8 x i16> %T0, <8
entry:
%tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 8, i32 9, i32 undef, i32 undef, i32 11, i32 3, i32 undef , i32 undef >
ret <8 x i16> %tmp9
-; X64: t13:
+; X64-LABEL: t13:
; X64: punpcklqdq %xmm0, %xmm1
; X64: pextrw $3, %xmm1, %eax
; X64: pshufd $52, %xmm1, %xmm0
@@ -219,7 +219,7 @@ define <8 x i16> @t14(<8 x i16> %T0, <8
entry:
%tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 8, i32 9, i32 undef, i32 undef, i32 undef, i32 2, i32 undef , i32 undef >
ret <8 x i16> %tmp9
-; X64: t14:
+; X64-LABEL: t14:
; X64: punpcklqdq %xmm0, %xmm1
; X64: pshufhw $8, %xmm1, %xmm0
; X64: ret
@@ -259,7 +259,7 @@ entry:
; rdar://8520311
define <4 x i32> @t17() nounwind {
entry:
-; X64: t17:
+; X64-LABEL: t17:
; X64: movddup (%rax), %xmm0
%tmp1 = load <4 x float>* undef, align 16
%tmp2 = shufflevector <4 x float> %tmp1, <4 x float> undef, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
Modified: llvm/trunk/test/CodeGen/X86/sse41.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse41.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse41.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse41.ll Sun Jul 14 01:24:09 2013
@@ -6,20 +6,20 @@
define <4 x i32> @pinsrd_1(i32 %s, <4 x i32> %tmp) nounwind {
%tmp1 = insertelement <4 x i32> %tmp, i32 %s, i32 1
ret <4 x i32> %tmp1
-; X32: pinsrd_1:
+; X32-LABEL: pinsrd_1:
; X32: pinsrd $1, 4(%esp), %xmm0
-; X64: pinsrd_1:
+; X64-LABEL: pinsrd_1:
; X64: pinsrd $1, %edi, %xmm0
}
define <16 x i8> @pinsrb_1(i8 %s, <16 x i8> %tmp) nounwind {
%tmp1 = insertelement <16 x i8> %tmp, i8 %s, i32 1
ret <16 x i8> %tmp1
-; X32: pinsrb_1:
+; X32-LABEL: pinsrb_1:
; X32: pinsrb $1, 4(%esp), %xmm0
-; X64: pinsrb_1:
+; X64-LABEL: pinsrb_1:
; X64: pinsrb $1, %edi, %xmm0
}
@@ -237,12 +237,12 @@ entry:
%tmp11 = insertelement <2 x float> undef, float %add.r, i32 0
%tmp9 = insertelement <2 x float> %tmp11, float %add.i, i32 1
ret <2 x float> %tmp9
-; X32: buildvector:
+; X32-LABEL: buildvector:
; X32-NOT: insertps $0
; X32: insertps $16
; X32-NOT: insertps $0
; X32: ret
-; X64: buildvector:
+; X64-LABEL: buildvector:
; X64-NOT: insertps $0
; X64: insertps $16
; X64-NOT: insertps $0
Modified: llvm/trunk/test/CodeGen/X86/sse_partial_update.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse_partial_update.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse_partial_update.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse_partial_update.ll Sun Jul 14 01:24:09 2013
@@ -8,7 +8,7 @@
; destination of rsqrtss are the same.
define void @t1(<4 x float> %a) nounwind uwtable ssp {
entry:
-; CHECK: t1:
+; CHECK-LABEL: t1:
; CHECK: rsqrtss %xmm0, %xmm0
%0 = tail call <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float> %a) nounwind
%a.addr.0.extract = extractelement <4 x float> %0, i32 0
@@ -23,7 +23,7 @@ declare <4 x float> @llvm.x86.sse.rsqrt.
define void @t2(<4 x float> %a) nounwind uwtable ssp {
entry:
-; CHECK: t2:
+; CHECK-LABEL: t2:
; CHECK: rcpss %xmm0, %xmm0
%0 = tail call <4 x float> @llvm.x86.sse.rcp.ss(<4 x float> %a) nounwind
%a.addr.0.extract = extractelement <4 x float> %0, i32 0
Modified: llvm/trunk/test/CodeGen/X86/stack-protector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/stack-protector.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/stack-protector.ll (original)
+++ llvm/trunk/test/CodeGen/X86/stack-protector.ll Sun Jul 14 01:24:09 2013
@@ -24,19 +24,19 @@
; Requires no protector.
define void @test1a(i8* %a) nounwind uwtable {
entry:
-; LINUX-I386: test1a:
+; LINUX-I386-LABEL: test1a:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test1a:
+; LINUX-X64-LABEL: test1a:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test1a:
+; LINUX-KERNEL-X64-LABEL: test1a:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test1a:
+; DARWIN-X64-LABEL: test1a:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%a.addr = alloca i8*, align 8
@@ -55,23 +55,23 @@ entry:
; Requires protector.
define void @test1b(i8* %a) nounwind uwtable ssp {
entry:
-; LINUX-I386: test1b:
+; LINUX-I386-LABEL: test1b:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test1b:
+; LINUX-X64-LABEL: test1b:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test1b:
+; LINUX-KERNEL-X64-LABEL: test1b:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test1b:
+; DARWIN-X64-LABEL: test1b:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
-; OPENBSD-AMD64: test1b:
+; OPENBSD-AMD64-LABEL: test1b:
; OPENBSD-AMD64: movq __guard_local(%rip)
; OPENBSD-AMD64: callq __stack_smash_handler
%a.addr = alloca i8*, align 8
@@ -90,19 +90,19 @@ entry:
; Requires protector.
define void @test1c(i8* %a) nounwind uwtable sspstrong {
entry:
-; LINUX-I386: test1c:
+; LINUX-I386-LABEL: test1c:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test1c:
+; LINUX-X64-LABEL: test1c:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test1c:
+; LINUX-KERNEL-X64-LABEL: test1c:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test1c:
+; DARWIN-X64-LABEL: test1c:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%a.addr = alloca i8*, align 8
@@ -121,19 +121,19 @@ entry:
; Requires protector.
define void @test1d(i8* %a) nounwind uwtable sspreq {
entry:
-; LINUX-I386: test1d:
+; LINUX-I386-LABEL: test1d:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test1d:
+; LINUX-X64-LABEL: test1d:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test1d:
+; LINUX-KERNEL-X64-LABEL: test1d:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test1d:
+; DARWIN-X64-LABEL: test1d:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%a.addr = alloca i8*, align 8
@@ -152,19 +152,19 @@ entry:
; Requires no protector.
define void @test2a(i8* %a) nounwind uwtable {
entry:
-; LINUX-I386: test2a:
+; LINUX-I386-LABEL: test2a:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test2a:
+; LINUX-X64-LABEL: test2a:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test2a:
+; LINUX-KERNEL-X64-LABEL: test2a:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test2a:
+; DARWIN-X64-LABEL: test2a:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%a.addr = alloca i8*, align 8
@@ -185,19 +185,19 @@ entry:
; Requires protector.
define void @test2b(i8* %a) nounwind uwtable ssp {
entry:
-; LINUX-I386: test2b:
+; LINUX-I386-LABEL: test2b:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test2b:
+; LINUX-X64-LABEL: test2b:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test2b:
+; LINUX-KERNEL-X64-LABEL: test2b:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test2b:
+; DARWIN-X64-LABEL: test2b:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%a.addr = alloca i8*, align 8
@@ -218,19 +218,19 @@ entry:
; Requires protector.
define void @test2c(i8* %a) nounwind uwtable sspstrong {
entry:
-; LINUX-I386: test2c:
+; LINUX-I386-LABEL: test2c:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test2c:
+; LINUX-X64-LABEL: test2c:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test2c:
+; LINUX-KERNEL-X64-LABEL: test2c:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test2c:
+; DARWIN-X64-LABEL: test2c:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%a.addr = alloca i8*, align 8
@@ -251,19 +251,19 @@ entry:
; Requires protector.
define void @test2d(i8* %a) nounwind uwtable sspreq {
entry:
-; LINUX-I386: test2d:
+; LINUX-I386-LABEL: test2d:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test2d:
+; LINUX-X64-LABEL: test2d:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test2d:
+; LINUX-KERNEL-X64-LABEL: test2d:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test2d:
+; DARWIN-X64-LABEL: test2d:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%a.addr = alloca i8*, align 8
@@ -284,19 +284,19 @@ entry:
; Requires no protector.
define void @test3a(i8* %a) nounwind uwtable {
entry:
-; LINUX-I386: test3a:
+; LINUX-I386-LABEL: test3a:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test3a:
+; LINUX-X64-LABEL: test3a:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test3a:
+; LINUX-KERNEL-X64-LABEL: test3a:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test3a:
+; DARWIN-X64-LABEL: test3a:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%a.addr = alloca i8*, align 8
@@ -315,19 +315,19 @@ entry:
; Requires no protector.
define void @test3b(i8* %a) nounwind uwtable ssp {
entry:
-; LINUX-I386: test3b:
+; LINUX-I386-LABEL: test3b:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test3b:
+; LINUX-X64-LABEL: test3b:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test3b:
+; LINUX-KERNEL-X64-LABEL: test3b:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test3b:
+; DARWIN-X64-LABEL: test3b:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%a.addr = alloca i8*, align 8
@@ -346,19 +346,19 @@ entry:
; Requires protector.
define void @test3c(i8* %a) nounwind uwtable sspstrong {
entry:
-; LINUX-I386: test3c:
+; LINUX-I386-LABEL: test3c:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test3c:
+; LINUX-X64-LABEL: test3c:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test3c:
+; LINUX-KERNEL-X64-LABEL: test3c:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test3c:
+; DARWIN-X64-LABEL: test3c:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%a.addr = alloca i8*, align 8
@@ -377,19 +377,19 @@ entry:
; Requires protector.
define void @test3d(i8* %a) nounwind uwtable sspreq {
entry:
-; LINUX-I386: test3d:
+; LINUX-I386-LABEL: test3d:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test3d:
+; LINUX-X64-LABEL: test3d:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test3d:
+; LINUX-KERNEL-X64-LABEL: test3d:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test3d:
+; DARWIN-X64-LABEL: test3d:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%a.addr = alloca i8*, align 8
@@ -408,19 +408,19 @@ entry:
; Requires no protector.
define void @test4a(i8* %a) nounwind uwtable {
entry:
-; LINUX-I386: test4a:
+; LINUX-I386-LABEL: test4a:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test4a:
+; LINUX-X64-LABEL: test4a:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test4a:
+; LINUX-KERNEL-X64-LABEL: test4a:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test4a:
+; DARWIN-X64-LABEL: test4a:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%a.addr = alloca i8*, align 8
@@ -441,19 +441,19 @@ entry:
; Requires no protector.
define void @test4b(i8* %a) nounwind uwtable ssp {
entry:
-; LINUX-I386: test4b:
+; LINUX-I386-LABEL: test4b:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test4b:
+; LINUX-X64-LABEL: test4b:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test4b:
+; LINUX-KERNEL-X64-LABEL: test4b:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test4b:
+; DARWIN-X64-LABEL: test4b:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%a.addr = alloca i8*, align 8
@@ -474,19 +474,19 @@ entry:
; Requires protector.
define void @test4c(i8* %a) nounwind uwtable sspstrong {
entry:
-; LINUX-I386: test4c:
+; LINUX-I386-LABEL: test4c:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test4c:
+; LINUX-X64-LABEL: test4c:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test4c:
+; LINUX-KERNEL-X64-LABEL: test4c:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test4c:
+; DARWIN-X64-LABEL: test4c:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%a.addr = alloca i8*, align 8
@@ -507,19 +507,19 @@ entry:
; Requires protector.
define void @test4d(i8* %a) nounwind uwtable sspreq {
entry:
-; LINUX-I386: test4d:
+; LINUX-I386-LABEL: test4d:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test4d:
+; LINUX-X64-LABEL: test4d:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test4d:
+; LINUX-KERNEL-X64-LABEL: test4d:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test4d:
+; DARWIN-X64-LABEL: test4d:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%a.addr = alloca i8*, align 8
@@ -540,19 +540,19 @@ entry:
; Requires no protector.
define void @test5a(i8* %a) nounwind uwtable {
entry:
-; LINUX-I386: test5a:
+; LINUX-I386-LABEL: test5a:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test5a:
+; LINUX-X64-LABEL: test5a:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test5a:
+; LINUX-KERNEL-X64-LABEL: test5a:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test5a:
+; DARWIN-X64-LABEL: test5a:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%a.addr = alloca i8*, align 8
@@ -567,19 +567,19 @@ entry:
; Requires no protector.
define void @test5b(i8* %a) nounwind uwtable ssp {
entry:
-; LINUX-I386: test5b:
+; LINUX-I386-LABEL: test5b:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test5b:
+; LINUX-X64-LABEL: test5b:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test5b:
+; LINUX-KERNEL-X64-LABEL: test5b:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test5b:
+; DARWIN-X64-LABEL: test5b:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%a.addr = alloca i8*, align 8
@@ -594,19 +594,19 @@ entry:
; Requires no protector.
define void @test5c(i8* %a) nounwind uwtable sspstrong {
entry:
-; LINUX-I386: test5c:
+; LINUX-I386-LABEL: test5c:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test5c:
+; LINUX-X64-LABEL: test5c:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test5c:
+; LINUX-KERNEL-X64-LABEL: test5c:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test5c:
+; DARWIN-X64-LABEL: test5c:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%a.addr = alloca i8*, align 8
@@ -621,19 +621,19 @@ entry:
; Requires protector.
define void @test5d(i8* %a) nounwind uwtable sspreq {
entry:
-; LINUX-I386: test5d:
+; LINUX-I386-LABEL: test5d:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test5d:
+; LINUX-X64-LABEL: test5d:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test5d:
+; LINUX-KERNEL-X64-LABEL: test5d:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test5d:
+; DARWIN-X64-LABEL: test5d:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%a.addr = alloca i8*, align 8
@@ -648,19 +648,19 @@ entry:
; Requires no protector.
define void @test6a() nounwind uwtable {
entry:
-; LINUX-I386: test6a:
+; LINUX-I386-LABEL: test6a:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test6a:
+; LINUX-X64-LABEL: test6a:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test6a:
+; LINUX-KERNEL-X64-LABEL: test6a:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test6a:
+; DARWIN-X64-LABEL: test6a:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%retval = alloca i32, align 4
@@ -679,19 +679,19 @@ entry:
; Requires no protector.
define void @test6b() nounwind uwtable ssp {
entry:
-; LINUX-I386: test6b:
+; LINUX-I386-LABEL: test6b:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test6b:
+; LINUX-X64-LABEL: test6b:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test6b:
+; LINUX-KERNEL-X64-LABEL: test6b:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test6b:
+; DARWIN-X64-LABEL: test6b:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%retval = alloca i32, align 4
@@ -710,19 +710,19 @@ entry:
; Requires protector.
define void @test6c() nounwind uwtable sspstrong {
entry:
-; LINUX-I386: test6c:
+; LINUX-I386-LABEL: test6c:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test6c:
+; LINUX-X64-LABEL: test6c:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test6c:
+; LINUX-KERNEL-X64-LABEL: test6c:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test6c:
+; DARWIN-X64-LABEL: test6c:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%retval = alloca i32, align 4
@@ -741,19 +741,19 @@ entry:
; Requires protector.
define void @test6d() nounwind uwtable sspreq {
entry:
-; LINUX-I386: test6d:
+; LINUX-I386-LABEL: test6d:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test6d:
+; LINUX-X64-LABEL: test6d:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test6d:
+; LINUX-KERNEL-X64-LABEL: test6d:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test6d:
+; DARWIN-X64-LABEL: test6d:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%retval = alloca i32, align 4
@@ -772,19 +772,19 @@ entry:
; Requires no protector.
define void @test7a() nounwind uwtable readnone {
entry:
-; LINUX-I386: test7a:
+; LINUX-I386-LABEL: test7a:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test7a:
+; LINUX-X64-LABEL: test7a:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test7a:
+; LINUX-KERNEL-X64-LABEL: test7a:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test7a:
+; DARWIN-X64-LABEL: test7a:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%a = alloca i32, align 4
@@ -798,19 +798,19 @@ entry:
; Requires no protector.
define void @test7b() nounwind uwtable readnone ssp {
entry:
-; LINUX-I386: test7b:
+; LINUX-I386-LABEL: test7b:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test7b:
+; LINUX-X64-LABEL: test7b:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test7b:
+; LINUX-KERNEL-X64-LABEL: test7b:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test7b:
+; DARWIN-X64-LABEL: test7b:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%a = alloca i32, align 4
@@ -824,19 +824,19 @@ entry:
; Requires protector.
define void @test7c() nounwind uwtable readnone sspstrong {
entry:
-; LINUX-I386: test7c:
+; LINUX-I386-LABEL: test7c:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test7c:
+; LINUX-X64-LABEL: test7c:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test7c:
+; LINUX-KERNEL-X64-LABEL: test7c:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test7c:
+; DARWIN-X64-LABEL: test7c:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%a = alloca i32, align 4
@@ -850,19 +850,19 @@ entry:
; Requires protector.
define void @test7d() nounwind uwtable readnone sspreq {
entry:
-; LINUX-I386: test7d:
+; LINUX-I386-LABEL: test7d:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test7d:
+; LINUX-X64-LABEL: test7d:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test7d:
+; LINUX-KERNEL-X64-LABEL: test7d:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test7d:
+; DARWIN-X64-LABEL: test7d:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%a = alloca i32, align 4
@@ -876,19 +876,19 @@ entry:
; Requires no protector.
define void @test8a() nounwind uwtable {
entry:
-; LINUX-I386: test8a:
+; LINUX-I386-LABEL: test8a:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test8a:
+; LINUX-X64-LABEL: test8a:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test8a:
+; LINUX-KERNEL-X64-LABEL: test8a:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test8a:
+; DARWIN-X64-LABEL: test8a:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%b = alloca i32, align 4
@@ -901,19 +901,19 @@ entry:
; Requires no protector.
define void @test8b() nounwind uwtable ssp {
entry:
-; LINUX-I386: test8b:
+; LINUX-I386-LABEL: test8b:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test8b:
+; LINUX-X64-LABEL: test8b:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test8b:
+; LINUX-KERNEL-X64-LABEL: test8b:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test8b:
+; DARWIN-X64-LABEL: test8b:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%b = alloca i32, align 4
@@ -926,19 +926,19 @@ entry:
; Requires protector.
define void @test8c() nounwind uwtable sspstrong {
entry:
-; LINUX-I386: test8c:
+; LINUX-I386-LABEL: test8c:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test8c:
+; LINUX-X64-LABEL: test8c:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test8c:
+; LINUX-KERNEL-X64-LABEL: test8c:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test8c:
+; DARWIN-X64-LABEL: test8c:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%b = alloca i32, align 4
@@ -951,19 +951,19 @@ entry:
; Requires protector.
define void @test8d() nounwind uwtable sspreq {
entry:
-; LINUX-I386: test8d:
+; LINUX-I386-LABEL: test8d:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test8d:
+; LINUX-X64-LABEL: test8d:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test8d:
+; LINUX-KERNEL-X64-LABEL: test8d:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test8d:
+; DARWIN-X64-LABEL: test8d:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%b = alloca i32, align 4
@@ -976,19 +976,19 @@ entry:
; Requires no protector.
define void @test9a() nounwind uwtable {
entry:
-; LINUX-I386: test9a:
+; LINUX-I386-LABEL: test9a:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test9a:
+; LINUX-X64-LABEL: test9a:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test9a:
+; LINUX-KERNEL-X64-LABEL: test9a:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test9a:
+; DARWIN-X64-LABEL: test9a:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%x = alloca double, align 8
@@ -1005,19 +1005,19 @@ entry:
; Requires no protector.
define void @test9b() nounwind uwtable ssp {
entry:
-; LINUX-I386: test9b:
+; LINUX-I386-LABEL: test9b:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test9b:
+; LINUX-X64-LABEL: test9b:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test9b:
+; LINUX-KERNEL-X64-LABEL: test9b:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test9b:
+; DARWIN-X64-LABEL: test9b:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%x = alloca double, align 8
@@ -1034,19 +1034,19 @@ entry:
; Requires protector.
define void @test9c() nounwind uwtable sspstrong {
entry:
-; LINUX-I386: test9c:
+; LINUX-I386-LABEL: test9c:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test9c:
+; LINUX-X64-LABEL: test9c:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test9c:
+; LINUX-KERNEL-X64-LABEL: test9c:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test9c:
+; DARWIN-X64-LABEL: test9c:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%x = alloca double, align 8
@@ -1063,19 +1063,19 @@ entry:
; Requires protector.
define void @test9d() nounwind uwtable sspreq {
entry:
-; LINUX-I386: test9d:
+; LINUX-I386-LABEL: test9d:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test9d:
+; LINUX-X64-LABEL: test9d:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test9d:
+; LINUX-KERNEL-X64-LABEL: test9d:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test9d:
+; DARWIN-X64-LABEL: test9d:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%x = alloca double, align 8
@@ -1092,19 +1092,19 @@ entry:
; Requires no protector.
define void @test10a() nounwind uwtable {
entry:
-; LINUX-I386: test10a:
+; LINUX-I386-LABEL: test10a:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test10a:
+; LINUX-X64-LABEL: test10a:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test10a:
+; LINUX-KERNEL-X64-LABEL: test10a:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test10a:
+; DARWIN-X64-LABEL: test10a:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%x = alloca double, align 8
@@ -1136,19 +1136,19 @@ if.end4:
; Requires no protector.
define void @test10b() nounwind uwtable ssp {
entry:
-; LINUX-I386: test10b:
+; LINUX-I386-LABEL: test10b:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test10b:
+; LINUX-X64-LABEL: test10b:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test10b:
+; LINUX-KERNEL-X64-LABEL: test10b:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test10b:
+; DARWIN-X64-LABEL: test10b:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%x = alloca double, align 8
@@ -1180,19 +1180,19 @@ if.end4:
; Requires protector.
define void @test10c() nounwind uwtable sspstrong {
entry:
-; LINUX-I386: test10c:
+; LINUX-I386-LABEL: test10c:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test10c:
+; LINUX-X64-LABEL: test10c:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test10c:
+; LINUX-KERNEL-X64-LABEL: test10c:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test10c:
+; DARWIN-X64-LABEL: test10c:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%x = alloca double, align 8
@@ -1224,19 +1224,19 @@ if.end4:
; Requires protector.
define void @test10d() nounwind uwtable sspreq {
entry:
-; LINUX-I386: test10d:
+; LINUX-I386-LABEL: test10d:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test10d:
+; LINUX-X64-LABEL: test10d:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test10d:
+; LINUX-KERNEL-X64-LABEL: test10d:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test10d:
+; DARWIN-X64-LABEL: test10d:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%x = alloca double, align 8
@@ -1268,19 +1268,19 @@ if.end4:
; Requires no protector.
define void @test11a() nounwind uwtable {
entry:
-; LINUX-I386: test11a:
+; LINUX-I386-LABEL: test11a:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test11a:
+; LINUX-X64-LABEL: test11a:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test11a:
+; LINUX-KERNEL-X64-LABEL: test11a:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test11a:
+; DARWIN-X64-LABEL: test11a:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%c = alloca %struct.pair, align 4
@@ -1297,19 +1297,19 @@ entry:
; Requires no protector.
define void @test11b() nounwind uwtable ssp {
entry:
-; LINUX-I386: test11b:
+; LINUX-I386-LABEL: test11b:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test11b:
+; LINUX-X64-LABEL: test11b:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test11b:
+; LINUX-KERNEL-X64-LABEL: test11b:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test11b:
+; DARWIN-X64-LABEL: test11b:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%c = alloca %struct.pair, align 4
@@ -1326,19 +1326,19 @@ entry:
; Requires protector.
define void @test11c() nounwind uwtable sspstrong {
entry:
-; LINUX-I386: test11c:
+; LINUX-I386-LABEL: test11c:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test11c:
+; LINUX-X64-LABEL: test11c:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test11c:
+; LINUX-KERNEL-X64-LABEL: test11c:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test11c:
+; DARWIN-X64-LABEL: test11c:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%c = alloca %struct.pair, align 4
@@ -1355,19 +1355,19 @@ entry:
; Requires protector.
define void @test11d() nounwind uwtable sspreq {
entry:
-; LINUX-I386: test11d:
+; LINUX-I386-LABEL: test11d:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test11d:
+; LINUX-X64-LABEL: test11d:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test11d:
+; LINUX-KERNEL-X64-LABEL: test11d:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test11d:
+; DARWIN-X64-LABEL: test11d:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%c = alloca %struct.pair, align 4
@@ -1384,19 +1384,19 @@ entry:
; Requires no protector.
define void @test12a() nounwind uwtable {
entry:
-; LINUX-I386: test12a:
+; LINUX-I386-LABEL: test12a:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test12a:
+; LINUX-X64-LABEL: test12a:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test12a:
+; LINUX-KERNEL-X64-LABEL: test12a:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test12a:
+; DARWIN-X64-LABEL: test12a:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%c = alloca %struct.pair, align 4
@@ -1412,19 +1412,19 @@ entry:
; Requires no protector.
define void @test12b() nounwind uwtable ssp {
entry:
-; LINUX-I386: test12b:
+; LINUX-I386-LABEL: test12b:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test12b:
+; LINUX-X64-LABEL: test12b:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test12b:
+; LINUX-KERNEL-X64-LABEL: test12b:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test12b:
+; DARWIN-X64-LABEL: test12b:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%c = alloca %struct.pair, align 4
@@ -1440,19 +1440,19 @@ entry:
; Requires protector.
define void @test12c() nounwind uwtable sspstrong {
entry:
-; LINUX-I386: test12c:
+; LINUX-I386-LABEL: test12c:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test12c:
+; LINUX-X64-LABEL: test12c:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test12c:
+; LINUX-KERNEL-X64-LABEL: test12c:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test12c:
+; DARWIN-X64-LABEL: test12c:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%c = alloca %struct.pair, align 4
@@ -1468,19 +1468,19 @@ entry:
; Requires protector.
define void @test12d() nounwind uwtable sspreq {
entry:
-; LINUX-I386: test12d:
+; LINUX-I386-LABEL: test12d:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test12d:
+; LINUX-X64-LABEL: test12d:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test12d:
+; LINUX-KERNEL-X64-LABEL: test12d:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test12d:
+; DARWIN-X64-LABEL: test12d:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%c = alloca %struct.pair, align 4
@@ -1496,19 +1496,19 @@ entry:
; Requires no protector.
define void @test13a() nounwind uwtable {
entry:
-; LINUX-I386: test13a:
+; LINUX-I386-LABEL: test13a:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test13a:
+; LINUX-X64-LABEL: test13a:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test13a:
+; LINUX-KERNEL-X64-LABEL: test13a:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test13a:
+; DARWIN-X64-LABEL: test13a:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%c = alloca %struct.pair, align 4
@@ -1522,19 +1522,19 @@ entry:
; Requires no protector.
define void @test13b() nounwind uwtable ssp {
entry:
-; LINUX-I386: test13b:
+; LINUX-I386-LABEL: test13b:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test13b:
+; LINUX-X64-LABEL: test13b:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test13b:
+; LINUX-KERNEL-X64-LABEL: test13b:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test13b:
+; DARWIN-X64-LABEL: test13b:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%c = alloca %struct.pair, align 4
@@ -1548,19 +1548,19 @@ entry:
; Requires protector.
define void @test13c() nounwind uwtable sspstrong {
entry:
-; LINUX-I386: test13c:
+; LINUX-I386-LABEL: test13c:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test13c:
+; LINUX-X64-LABEL: test13c:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test13c:
+; LINUX-KERNEL-X64-LABEL: test13c:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test13c:
+; DARWIN-X64-LABEL: test13c:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%c = alloca %struct.pair, align 4
@@ -1574,19 +1574,19 @@ entry:
; Requires protector.
define void @test13d() nounwind uwtable sspreq {
entry:
-; LINUX-I386: test13d:
+; LINUX-I386-LABEL: test13d:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test13d:
+; LINUX-X64-LABEL: test13d:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test13d:
+; LINUX-KERNEL-X64-LABEL: test13d:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test13d:
+; DARWIN-X64-LABEL: test13d:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%c = alloca %struct.pair, align 4
@@ -1600,19 +1600,19 @@ entry:
; Requires no protector.
define void @test14a() nounwind uwtable {
entry:
-; LINUX-I386: test14a:
+; LINUX-I386-LABEL: test14a:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test14a:
+; LINUX-X64-LABEL: test14a:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test14a:
+; LINUX-KERNEL-X64-LABEL: test14a:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test14a:
+; DARWIN-X64-LABEL: test14a:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%a = alloca i32, align 4
@@ -1626,19 +1626,19 @@ entry:
; Requires no protector.
define void @test14b() nounwind uwtable ssp {
entry:
-; LINUX-I386: test14b:
+; LINUX-I386-LABEL: test14b:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test14b:
+; LINUX-X64-LABEL: test14b:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test14b:
+; LINUX-KERNEL-X64-LABEL: test14b:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test14b:
+; DARWIN-X64-LABEL: test14b:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%a = alloca i32, align 4
@@ -1652,19 +1652,19 @@ entry:
; Requires protector.
define void @test14c() nounwind uwtable sspstrong {
entry:
-; LINUX-I386: test14c:
+; LINUX-I386-LABEL: test14c:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test14c:
+; LINUX-X64-LABEL: test14c:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test14c:
+; LINUX-KERNEL-X64-LABEL: test14c:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test14c:
+; DARWIN-X64-LABEL: test14c:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%a = alloca i32, align 4
@@ -1678,19 +1678,19 @@ entry:
; Requires protector.
define void @test14d() nounwind uwtable sspreq {
entry:
-; LINUX-I386: test14d:
+; LINUX-I386-LABEL: test14d:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test14d:
+; LINUX-X64-LABEL: test14d:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test14d:
+; LINUX-KERNEL-X64-LABEL: test14d:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test14d:
+; DARWIN-X64-LABEL: test14d:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%a = alloca i32, align 4
@@ -1705,19 +1705,19 @@ entry:
; Requires no protector.
define void @test15a() nounwind uwtable {
entry:
-; LINUX-I386: test15a:
+; LINUX-I386-LABEL: test15a:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test15a:
+; LINUX-X64-LABEL: test15a:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test15a:
+; LINUX-KERNEL-X64-LABEL: test15a:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test15a:
+; DARWIN-X64-LABEL: test15a:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%a = alloca i32, align 4
@@ -1736,19 +1736,19 @@ entry:
; Requires no protector.
define void @test15b() nounwind uwtable ssp {
entry:
-; LINUX-I386: test15b:
+; LINUX-I386-LABEL: test15b:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test15b:
+; LINUX-X64-LABEL: test15b:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test15b:
+; LINUX-KERNEL-X64-LABEL: test15b:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test15b:
+; DARWIN-X64-LABEL: test15b:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%a = alloca i32, align 4
@@ -1767,19 +1767,19 @@ entry:
; Requires protector.
define void @test15c() nounwind uwtable sspstrong {
entry:
-; LINUX-I386: test15c:
+; LINUX-I386-LABEL: test15c:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test15c:
+; LINUX-X64-LABEL: test15c:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test15c:
+; LINUX-KERNEL-X64-LABEL: test15c:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test15c:
+; DARWIN-X64-LABEL: test15c:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%a = alloca i32, align 4
@@ -1798,19 +1798,19 @@ entry:
; Requires protector.
define void @test15d() nounwind uwtable sspreq {
entry:
-; LINUX-I386: test15d:
+; LINUX-I386-LABEL: test15d:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test15d:
+; LINUX-X64-LABEL: test15d:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test15d:
+; LINUX-KERNEL-X64-LABEL: test15d:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test15d:
+; DARWIN-X64-LABEL: test15d:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%a = alloca i32, align 4
@@ -1829,19 +1829,19 @@ entry:
; Requires no protector.
define void @test16a() nounwind uwtable {
entry:
-; LINUX-I386: test16a:
+; LINUX-I386-LABEL: test16a:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test16a:
+; LINUX-X64-LABEL: test16a:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test16a:
+; LINUX-KERNEL-X64-LABEL: test16a:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test16a:
+; DARWIN-X64-LABEL: test16a:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%a = alloca i32, align 4
@@ -1857,19 +1857,19 @@ entry:
; Requires no protector.
define void @test16b() nounwind uwtable ssp {
entry:
-; LINUX-I386: test16b:
+; LINUX-I386-LABEL: test16b:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test16b:
+; LINUX-X64-LABEL: test16b:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test16b:
+; LINUX-KERNEL-X64-LABEL: test16b:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test16b:
+; DARWIN-X64-LABEL: test16b:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%a = alloca i32, align 4
@@ -1885,19 +1885,19 @@ entry:
; Requires protector.
define void @test16c() nounwind uwtable sspstrong {
entry:
-; LINUX-I386: test16c:
+; LINUX-I386-LABEL: test16c:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test16c:
+; LINUX-X64-LABEL: test16c:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test16c:
+; LINUX-KERNEL-X64-LABEL: test16c:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test16c:
+; DARWIN-X64-LABEL: test16c:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%a = alloca i32, align 4
@@ -1913,19 +1913,19 @@ entry:
; Requires protector.
define void @test16d() nounwind uwtable sspreq {
entry:
-; LINUX-I386: test16d:
+; LINUX-I386-LABEL: test16d:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test16d:
+; LINUX-X64-LABEL: test16d:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test16d:
+; LINUX-KERNEL-X64-LABEL: test16d:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test16d:
+; DARWIN-X64-LABEL: test16d:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%a = alloca i32, align 4
@@ -1940,19 +1940,19 @@ entry:
; Requires no protector.
define void @test17a() nounwind uwtable {
entry:
-; LINUX-I386: test17a:
+; LINUX-I386-LABEL: test17a:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test17a:
+; LINUX-X64-LABEL: test17a:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test17a:
+; LINUX-KERNEL-X64-LABEL: test17a:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test17a:
+; DARWIN-X64-LABEL: test17a:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%c = alloca %struct.vec, align 16
@@ -1967,19 +1967,19 @@ entry:
; Requires no protector.
define void @test17b() nounwind uwtable ssp {
entry:
-; LINUX-I386: test17b:
+; LINUX-I386-LABEL: test17b:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test17b:
+; LINUX-X64-LABEL: test17b:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test17b:
+; LINUX-KERNEL-X64-LABEL: test17b:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test17b:
+; DARWIN-X64-LABEL: test17b:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%c = alloca %struct.vec, align 16
@@ -1994,19 +1994,19 @@ entry:
; Requires protector.
define void @test17c() nounwind uwtable sspstrong {
entry:
-; LINUX-I386: test17c:
+; LINUX-I386-LABEL: test17c:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test17c:
+; LINUX-X64-LABEL: test17c:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test17c:
+; LINUX-KERNEL-X64-LABEL: test17c:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test17c:
+; DARWIN-X64-LABEL: test17c:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%c = alloca %struct.vec, align 16
@@ -2021,19 +2021,19 @@ entry:
; Requires protector.
define void @test17d() nounwind uwtable sspreq {
entry:
-; LINUX-I386: test17d:
+; LINUX-I386-LABEL: test17d:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test17d:
+; LINUX-X64-LABEL: test17d:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test17d:
+; LINUX-KERNEL-X64-LABEL: test17d:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test17d:
+; DARWIN-X64-LABEL: test17d:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%c = alloca %struct.vec, align 16
@@ -2048,19 +2048,19 @@ entry:
; Requires no protector.
define i32 @test18a() uwtable {
entry:
-; LINUX-I386: test18a:
+; LINUX-I386-LABEL: test18a:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test18a:
+; LINUX-X64-LABEL: test18a:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test18a:
+; LINUX-KERNEL-X64-LABEL: test18a:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test18a:
+; DARWIN-X64-LABEL: test18a:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%a = alloca i32, align 4
@@ -2084,19 +2084,19 @@ lpad:
; Requires no protector.
define i32 @test18b() uwtable ssp {
entry:
-; LINUX-I386: test18b:
+; LINUX-I386-LABEL: test18b:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test18b:
+; LINUX-X64-LABEL: test18b:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test18b:
+; LINUX-KERNEL-X64-LABEL: test18b:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test18b:
+; DARWIN-X64-LABEL: test18b:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%a = alloca i32, align 4
@@ -2120,19 +2120,19 @@ lpad:
; Requires protector.
define i32 @test18c() uwtable sspstrong {
entry:
-; LINUX-I386: test18c:
+; LINUX-I386-LABEL: test18c:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test18c:
+; LINUX-X64-LABEL: test18c:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test18c:
+; LINUX-KERNEL-X64-LABEL: test18c:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test18c:
+; DARWIN-X64-LABEL: test18c:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%a = alloca i32, align 4
@@ -2156,19 +2156,19 @@ lpad:
; Requires protector.
define i32 @test18d() uwtable sspreq {
entry:
-; LINUX-I386: test18d:
+; LINUX-I386-LABEL: test18d:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test18d:
+; LINUX-X64-LABEL: test18d:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test18d:
+; LINUX-KERNEL-X64-LABEL: test18d:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test18d:
+; DARWIN-X64-LABEL: test18d:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%a = alloca i32, align 4
@@ -2193,19 +2193,19 @@ lpad:
; Requires no protector.
define i32 @test19a() uwtable {
entry:
-; LINUX-I386: test19a:
+; LINUX-I386-LABEL: test19a:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test19a:
+; LINUX-X64-LABEL: test19a:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test19a:
+; LINUX-KERNEL-X64-LABEL: test19a:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test19a:
+; DARWIN-X64-LABEL: test19a:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%c = alloca %struct.pair, align 4
@@ -2232,19 +2232,19 @@ lpad:
; Requires no protector.
define i32 @test19b() uwtable ssp {
entry:
-; LINUX-I386: test19b:
+; LINUX-I386-LABEL: test19b:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test19b:
+; LINUX-X64-LABEL: test19b:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test19b:
+; LINUX-KERNEL-X64-LABEL: test19b:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test19b:
+; DARWIN-X64-LABEL: test19b:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%c = alloca %struct.pair, align 4
@@ -2271,19 +2271,19 @@ lpad:
; Requires protector.
define i32 @test19c() uwtable sspstrong {
entry:
-; LINUX-I386: test19c:
+; LINUX-I386-LABEL: test19c:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test19c:
+; LINUX-X64-LABEL: test19c:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test19c:
+; LINUX-KERNEL-X64-LABEL: test19c:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test19c:
+; DARWIN-X64-LABEL: test19c:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%c = alloca %struct.pair, align 4
@@ -2310,19 +2310,19 @@ lpad:
; Requires protector.
define i32 @test19d() uwtable sspreq {
entry:
-; LINUX-I386: test19d:
+; LINUX-I386-LABEL: test19d:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test19d:
+; LINUX-X64-LABEL: test19d:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test19d:
+; LINUX-KERNEL-X64-LABEL: test19d:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test19d:
+; DARWIN-X64-LABEL: test19d:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%c = alloca %struct.pair, align 4
@@ -2348,19 +2348,19 @@ lpad:
; Requires no protector.
define void @test20a() nounwind uwtable {
entry:
-; LINUX-I386: test20a:
+; LINUX-I386-LABEL: test20a:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test20a:
+; LINUX-X64-LABEL: test20a:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test20a:
+; LINUX-KERNEL-X64-LABEL: test20a:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test20a:
+; DARWIN-X64-LABEL: test20a:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%a = alloca i32*, align 8
@@ -2378,19 +2378,19 @@ entry:
; Requires no protector.
define void @test20b() nounwind uwtable ssp {
entry:
-; LINUX-I386: test20b:
+; LINUX-I386-LABEL: test20b:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test20b:
+; LINUX-X64-LABEL: test20b:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test20b:
+; LINUX-KERNEL-X64-LABEL: test20b:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test20b:
+; DARWIN-X64-LABEL: test20b:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%a = alloca i32*, align 8
@@ -2408,19 +2408,19 @@ entry:
; Requires protector.
define void @test20c() nounwind uwtable sspstrong {
entry:
-; LINUX-I386: test20c:
+; LINUX-I386-LABEL: test20c:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test20c:
+; LINUX-X64-LABEL: test20c:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test20c:
+; LINUX-KERNEL-X64-LABEL: test20c:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test20c:
+; DARWIN-X64-LABEL: test20c:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%a = alloca i32*, align 8
@@ -2438,19 +2438,19 @@ entry:
; Requires protector.
define void @test20d() nounwind uwtable sspreq {
entry:
-; LINUX-I386: test20d:
+; LINUX-I386-LABEL: test20d:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test20d:
+; LINUX-X64-LABEL: test20d:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test20d:
+; LINUX-KERNEL-X64-LABEL: test20d:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test20d:
+; DARWIN-X64-LABEL: test20d:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%a = alloca i32*, align 8
@@ -2468,19 +2468,19 @@ entry:
; Requires no protector.
define void @test21a() nounwind uwtable {
entry:
-; LINUX-I386: test21a:
+; LINUX-I386-LABEL: test21a:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test21a:
+; LINUX-X64-LABEL: test21a:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test21a:
+; LINUX-KERNEL-X64-LABEL: test21a:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test21a:
+; DARWIN-X64-LABEL: test21a:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%a = alloca i32*, align 8
@@ -2499,19 +2499,19 @@ entry:
; Requires no protector.
define void @test21b() nounwind uwtable ssp {
entry:
-; LINUX-I386: test21b:
+; LINUX-I386-LABEL: test21b:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test21b:
+; LINUX-X64-LABEL: test21b:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test21b:
+; LINUX-KERNEL-X64-LABEL: test21b:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test21b:
+; DARWIN-X64-LABEL: test21b:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%a = alloca i32*, align 8
@@ -2530,19 +2530,19 @@ entry:
; Requires protector.
define void @test21c() nounwind uwtable sspstrong {
entry:
-; LINUX-I386: test21c:
+; LINUX-I386-LABEL: test21c:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test21c:
+; LINUX-X64-LABEL: test21c:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test21c:
+; LINUX-KERNEL-X64-LABEL: test21c:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test21c:
+; DARWIN-X64-LABEL: test21c:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%a = alloca i32*, align 8
@@ -2561,19 +2561,19 @@ entry:
; Requires protector.
define void @test21d() nounwind uwtable sspreq {
entry:
-; LINUX-I386: test21d:
+; LINUX-I386-LABEL: test21d:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test21d:
+; LINUX-X64-LABEL: test21d:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test21d:
+; LINUX-KERNEL-X64-LABEL: test21d:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test21d:
+; DARWIN-X64-LABEL: test21d:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%a = alloca i32*, align 8
@@ -2592,19 +2592,19 @@ entry:
; Requires no protector.
define signext i8 @test22a() nounwind uwtable {
entry:
-; LINUX-I386: test22a:
+; LINUX-I386-LABEL: test22a:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test22a:
+; LINUX-X64-LABEL: test22a:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test22a:
+; LINUX-KERNEL-X64-LABEL: test22a:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test22a:
+; DARWIN-X64-LABEL: test22a:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%a = alloca %class.A, align 1
@@ -2619,19 +2619,19 @@ entry:
; Requires no protector.
define signext i8 @test22b() nounwind uwtable ssp {
entry:
-; LINUX-I386: test22b:
+; LINUX-I386-LABEL: test22b:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test22b:
+; LINUX-X64-LABEL: test22b:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test22b:
+; LINUX-KERNEL-X64-LABEL: test22b:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test22b:
+; DARWIN-X64-LABEL: test22b:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%a = alloca %class.A, align 1
@@ -2646,19 +2646,19 @@ entry:
; Requires protector.
define signext i8 @test22c() nounwind uwtable sspstrong {
entry:
-; LINUX-I386: test22c:
+; LINUX-I386-LABEL: test22c:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test22c:
+; LINUX-X64-LABEL: test22c:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test22c:
+; LINUX-KERNEL-X64-LABEL: test22c:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test22c:
+; DARWIN-X64-LABEL: test22c:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%a = alloca %class.A, align 1
@@ -2673,19 +2673,19 @@ entry:
; Requires protector.
define signext i8 @test22d() nounwind uwtable sspreq {
entry:
-; LINUX-I386: test22d:
+; LINUX-I386-LABEL: test22d:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test22d:
+; LINUX-X64-LABEL: test22d:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test22d:
+; LINUX-KERNEL-X64-LABEL: test22d:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test22d:
+; DARWIN-X64-LABEL: test22d:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%a = alloca %class.A, align 1
@@ -2700,19 +2700,19 @@ entry:
; Requires no protector.
define signext i8 @test23a() nounwind uwtable {
entry:
-; LINUX-I386: test23a:
+; LINUX-I386-LABEL: test23a:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test23a:
+; LINUX-X64-LABEL: test23a:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test23a:
+; LINUX-KERNEL-X64-LABEL: test23a:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test23a:
+; DARWIN-X64-LABEL: test23a:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%x = alloca %struct.deep, align 1
@@ -2731,19 +2731,19 @@ entry:
; Requires no protector.
define signext i8 @test23b() nounwind uwtable ssp {
entry:
-; LINUX-I386: test23b:
+; LINUX-I386-LABEL: test23b:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test23b:
+; LINUX-X64-LABEL: test23b:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test23b:
+; LINUX-KERNEL-X64-LABEL: test23b:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test23b:
+; DARWIN-X64-LABEL: test23b:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%x = alloca %struct.deep, align 1
@@ -2762,19 +2762,19 @@ entry:
; Requires protector.
define signext i8 @test23c() nounwind uwtable sspstrong {
entry:
-; LINUX-I386: test23c:
+; LINUX-I386-LABEL: test23c:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test23c:
+; LINUX-X64-LABEL: test23c:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test23c:
+; LINUX-KERNEL-X64-LABEL: test23c:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test23c:
+; DARWIN-X64-LABEL: test23c:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%x = alloca %struct.deep, align 1
@@ -2793,19 +2793,19 @@ entry:
; Requires protector.
define signext i8 @test23d() nounwind uwtable sspreq {
entry:
-; LINUX-I386: test23d:
+; LINUX-I386-LABEL: test23d:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test23d:
+; LINUX-X64-LABEL: test23d:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test23d:
+; LINUX-KERNEL-X64-LABEL: test23d:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test23d:
+; DARWIN-X64-LABEL: test23d:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%x = alloca %struct.deep, align 1
@@ -2824,19 +2824,19 @@ entry:
; Requires no protector.
define void @test24a(i32 %n) nounwind uwtable {
entry:
-; LINUX-I386: test24a:
+; LINUX-I386-LABEL: test24a:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test24a:
+; LINUX-X64-LABEL: test24a:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test24a:
+; LINUX-KERNEL-X64-LABEL: test24a:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test24a:
+; DARWIN-X64-LABEL: test24a:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%n.addr = alloca i32, align 4
@@ -2855,19 +2855,19 @@ entry:
; Requires protector.
define void @test24b(i32 %n) nounwind uwtable ssp {
entry:
-; LINUX-I386: test24b:
+; LINUX-I386-LABEL: test24b:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test24b:
+; LINUX-X64-LABEL: test24b:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test24b:
+; LINUX-KERNEL-X64-LABEL: test24b:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test24b:
+; DARWIN-X64-LABEL: test24b:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%n.addr = alloca i32, align 4
@@ -2886,19 +2886,19 @@ entry:
; Requires protector.
define void @test24c(i32 %n) nounwind uwtable sspstrong {
entry:
-; LINUX-I386: test24c:
+; LINUX-I386-LABEL: test24c:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test24c:
+; LINUX-X64-LABEL: test24c:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test24c:
+; LINUX-KERNEL-X64-LABEL: test24c:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test24c:
+; DARWIN-X64-LABEL: test24c:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%n.addr = alloca i32, align 4
@@ -2917,19 +2917,19 @@ entry:
; Requires protector.
define void @test24d(i32 %n) nounwind uwtable sspreq {
entry:
-; LINUX-I386: test24d:
+; LINUX-I386-LABEL: test24d:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test24d:
+; LINUX-X64-LABEL: test24d:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test24d:
+; LINUX-KERNEL-X64-LABEL: test24d:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test24d:
+; DARWIN-X64-LABEL: test24d:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%n.addr = alloca i32, align 4
@@ -2948,19 +2948,19 @@ entry:
; Requires no protector.
define i32 @test25a() nounwind uwtable {
entry:
-; LINUX-I386: test25a:
+; LINUX-I386-LABEL: test25a:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test25a:
+; LINUX-X64-LABEL: test25a:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test25a:
+; LINUX-KERNEL-X64-LABEL: test25a:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test25a:
+; DARWIN-X64-LABEL: test25a:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%a = alloca [4 x i32], align 16
@@ -2974,19 +2974,19 @@ entry:
; Requires no protector, except for Darwin which _does_ require a protector.
define i32 @test25b() nounwind uwtable ssp {
entry:
-; LINUX-I386: test25b:
+; LINUX-I386-LABEL: test25b:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test25b:
+; LINUX-X64-LABEL: test25b:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test25b:
+; LINUX-KERNEL-X64-LABEL: test25b:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test25b:
+; DARWIN-X64-LABEL: test25b:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%a = alloca [4 x i32], align 16
@@ -3000,19 +3000,19 @@ entry:
; Requires protector.
define i32 @test25c() nounwind uwtable sspstrong {
entry:
-; LINUX-I386: test25c:
+; LINUX-I386-LABEL: test25c:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test25c:
+; LINUX-X64-LABEL: test25c:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test25c:
+; LINUX-KERNEL-X64-LABEL: test25c:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test25c:
+; DARWIN-X64-LABEL: test25c:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%a = alloca [4 x i32], align 16
@@ -3026,19 +3026,19 @@ entry:
; Requires protector.
define i32 @test25d() nounwind uwtable sspreq {
entry:
-; LINUX-I386: test25d:
+; LINUX-I386-LABEL: test25d:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test25d:
+; LINUX-X64-LABEL: test25d:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test25d:
+; LINUX-KERNEL-X64-LABEL: test25d:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test25d:
+; DARWIN-X64-LABEL: test25d:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%a = alloca [4 x i32], align 16
@@ -3054,19 +3054,19 @@ entry:
; Requires no protector.
define void @test26() nounwind uwtable sspstrong {
entry:
-; LINUX-I386: test26:
+; LINUX-I386-LABEL: test26:
; LINUX-I386-NOT: calll __stack_chk_fail
; LINUX-I386: .cfi_endproc
-; LINUX-X64: test26:
+; LINUX-X64-LABEL: test26:
; LINUX-X64-NOT: callq __stack_chk_fail
; LINUX-X64: .cfi_endproc
-; LINUX-KERNEL-X64: test26:
+; LINUX-KERNEL-X64-LABEL: test26:
; LINUX-KERNEL-X64-NOT: callq __stack_chk_fail
; LINUX-KERNEL-X64: .cfi_endproc
-; DARWIN-X64: test26:
+; DARWIN-X64-LABEL: test26:
; DARWIN-X64-NOT: callq ___stack_chk_fail
; DARWIN-X64: .cfi_endproc
%c = alloca %struct.nest, align 4
@@ -3085,19 +3085,19 @@ entry:
; Requires protector.
define i32 @test27(i32 %arg) nounwind uwtable sspstrong {
bb:
-; LINUX-I386: test27:
+; LINUX-I386-LABEL: test27:
; LINUX-I386: mov{{l|q}} %gs:
; LINUX-I386: calll __stack_chk_fail
-; LINUX-X64: test27:
+; LINUX-X64-LABEL: test27:
; LINUX-X64: mov{{l|q}} %fs:
; LINUX-X64: callq __stack_chk_fail
-; LINUX-KERNEL-X64: test27:
+; LINUX-KERNEL-X64-LABEL: test27:
; LINUX-KERNEL-X64: mov{{l|q}} %gs:
; LINUX-KERNEL-X64: callq __stack_chk_fail
-; DARWIN-X64: test27:
+; DARWIN-X64-LABEL: test27:
; DARWIN-X64: mov{{l|q}} ___stack_chk_guard
; DARWIN-X64: callq ___stack_chk_fail
%tmp = alloca %struct.small*, align 8
Modified: llvm/trunk/test/CodeGen/X86/stdcall-notailcall.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/stdcall-notailcall.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/stdcall-notailcall.ll (original)
+++ llvm/trunk/test/CodeGen/X86/stdcall-notailcall.ll Sun Jul 14 01:24:09 2013
@@ -2,7 +2,7 @@
%struct.I = type { i32 (...)** }
define x86_stdcallcc void @bar(%struct.I* nocapture %this) ssp align 2 {
-; CHECK: bar:
+; CHECK-LABEL: bar:
; CHECK-NOT: jmp
; CHECK: ret $4
entry:
Modified: llvm/trunk/test/CodeGen/X86/store_op_load_fold.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/store_op_load_fold.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/store_op_load_fold.ll (original)
+++ llvm/trunk/test/CodeGen/X86/store_op_load_fold.ll Sun Jul 14 01:24:09 2013
@@ -5,7 +5,7 @@
@X = internal global i16 0 ; <i16*> [#uses=2]
define void @foo() nounwind {
-; CHECK: foo:
+; CHECK-LABEL: foo:
; CHECK-NOT: mov
; CHECK: add
; CHECK-NEXT: ret
Modified: llvm/trunk/test/CodeGen/X86/sub-with-overflow.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sub-with-overflow.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sub-with-overflow.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sub-with-overflow.ll Sun Jul 14 01:24:09 2013
@@ -18,7 +18,7 @@ overflow:
%t2 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @no, i32 0, i32 0) ) nounwind
ret i1 false
-; CHECK: func1:
+; CHECK-LABEL: func1:
; CHECK: subl 20(%esp)
; CHECK-NEXT: jno
}
@@ -38,7 +38,7 @@ carry:
%t2 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @no, i32 0, i32 0) ) nounwind
ret i1 false
-; CHECK: func2:
+; CHECK-LABEL: func2:
; CHECK: subl 20(%esp)
; CHECK-NEXT: jae
}
@@ -53,7 +53,7 @@ entry:
%obit = extractvalue {i32, i1} %t, 1
ret i1 %obit
-; CHECK: func3:
+; CHECK-LABEL: func3:
; CHECK: decl
; CHECK-NEXT: seto
}
Modified: llvm/trunk/test/CodeGen/X86/tail-opts.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tail-opts.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tail-opts.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tail-opts.ll Sun Jul 14 01:24:09 2013
@@ -13,7 +13,7 @@ declare i1 @qux()
; BranchFolding should tail-merge the stores since they all precede
; direct branches to the same place.
-; CHECK: tail_merge_me:
+; CHECK-LABEL: tail_merge_me:
; CHECK-NOT: GHJK
; CHECK: movl $0, GHJK(%rip)
; CHECK-NEXT: movl $1, HABC(%rip)
@@ -60,7 +60,7 @@ declare i8* @choose(i8*, i8*)
; BranchFolding should tail-duplicate the indirect jump to avoid
; redundant branching.
-; CHECK: tail_duplicate_me:
+; CHECK-LABEL: tail_duplicate_me:
; CHECK: movl $0, GHJK(%rip)
; CHECK-NEXT: jmpq *%r
; CHECK: movl $0, GHJK(%rip)
@@ -107,7 +107,7 @@ altret:
; BranchFolding shouldn't try to merge the tails of two blocks
; with only a branch in common, regardless of the fallthrough situation.
-; CHECK: dont_merge_oddly:
+; CHECK-LABEL: dont_merge_oddly:
; CHECK-NOT: ret
; CHECK: ucomiss %xmm{{[0-2]}}, %xmm{{[0-2]}}
; CHECK-NEXT: jbe .LBB2_3
@@ -153,7 +153,7 @@ bb30:
; Do any-size tail-merging when two candidate blocks will both require
; an unconditional jump to complete a two-way conditional branch.
-; CHECK: c_expand_expr_stmt:
+; CHECK-LABEL: c_expand_expr_stmt:
;
; This test only works when register allocation happens to use %rax for both
; load addresses.
@@ -275,7 +275,7 @@ declare fastcc %union.tree_node* @defaul
; instructions are involved. This function should have only
; one ret instruction.
-; CHECK: foo:
+; CHECK-LABEL: foo:
; CHECK: callq func
; CHECK-NEXT: .LBB4_2:
; CHECK-NEXT: popq
@@ -298,7 +298,7 @@ declare void @func()
; one - One instruction may be tail-duplicated even with optsize.
-; CHECK: one:
+; CHECK-LABEL: one:
; CHECK: movl $0, XYZ(%rip)
; CHECK: movl $0, XYZ(%rip)
@@ -335,7 +335,7 @@ return:
; tail instead of one. This is too much to be merged, given
; the optsize attribute.
-; CHECK: two:
+; CHECK-LABEL: two:
; CHECK-NOT: XYZ
; CHECK: ret
; CHECK: movl $0, XYZ(%rip)
@@ -374,7 +374,7 @@ return:
; two_nosize - Same as two, but without the optsize attribute.
; Now two instructions are enough to be tail-duplicated.
-; CHECK: two_nosize:
+; CHECK-LABEL: two_nosize:
; CHECK: movl $0, XYZ(%rip)
; CHECK: movl $1, XYZ(%rip)
; CHECK: movl $0, XYZ(%rip)
@@ -412,7 +412,7 @@ return:
; Tail-merging should merge the two ret instructions since one side
; can fall-through into the ret and the other side has to branch anyway.
-; CHECK: TESTE:
+; CHECK-LABEL: TESTE:
; CHECK: ret
; CHECK-NOT: ret
; CHECK: size TESTE
Modified: llvm/trunk/test/CodeGen/X86/tailcall-cgp-dup.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tailcall-cgp-dup.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tailcall-cgp-dup.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tailcall-cgp-dup.ll Sun Jul 14 01:24:09 2013
@@ -4,7 +4,7 @@
; rdar://9147433
define i32 @foo(i32 %x) nounwind ssp {
-; CHECK: foo:
+; CHECK-LABEL: foo:
entry:
switch i32 %x, label %return [
i32 1, label %sw.bb
@@ -69,7 +69,7 @@ declare i8* @bar(i8*) uwtable optsize no
define hidden %0* @thingWithValue(i8* %self) uwtable ssp {
entry:
-; CHECK: thingWithValue:
+; CHECK-LABEL: thingWithValue:
; CHECK: jmp _bar
br i1 undef, label %if.then.i, label %if.else.i
Modified: llvm/trunk/test/CodeGen/X86/tailcallbyval64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tailcallbyval64.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tailcallbyval64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tailcallbyval64.ll Sun Jul 14 01:24:09 2013
@@ -3,7 +3,7 @@
; FIXME: Win64 does not support byval.
; Expect the entry point.
-; CHECK: tailcaller:
+; CHECK-LABEL: tailcaller:
; Expect 2 rep;movs because of tail call byval lowering.
; CHECK: rep;
Modified: llvm/trunk/test/CodeGen/X86/tailcallfp2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tailcallfp2.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tailcallfp2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tailcallfp2.ll Sun Jul 14 01:24:09 2013
@@ -3,7 +3,7 @@
declare i32 @putchar(i32)
define fastcc i32 @checktail(i32 %x, i32* %f, i32 %g) nounwind {
-; CHECK: checktail:
+; CHECK-LABEL: checktail:
%tmp1 = icmp sgt i32 %x, 0
br i1 %tmp1, label %if-then, label %if-else
Modified: llvm/trunk/test/CodeGen/X86/test-shrink.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/test-shrink.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/test-shrink.ll (original)
+++ llvm/trunk/test/CodeGen/X86/test-shrink.ll Sun Jul 14 01:24:09 2013
@@ -2,10 +2,10 @@
; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s --check-prefix=CHECK-64
; RUN: llc < %s -march=x86 | FileCheck %s --check-prefix=CHECK-32
-; CHECK-64: g64xh:
+; CHECK-64-LABEL: g64xh:
; CHECK-64: testb $8, {{%ah|%ch}}
; CHECK-64: ret
-; CHECK-32: g64xh:
+; CHECK-32-LABEL: g64xh:
; CHECK-32: testb $8, %ah
; CHECK-32: ret
define void @g64xh(i64 inreg %x) nounwind {
@@ -19,10 +19,10 @@ yes:
no:
ret void
}
-; CHECK-64: g64xl:
+; CHECK-64-LABEL: g64xl:
; CHECK-64: testb $8, [[A0L:%dil|%cl]]
; CHECK-64: ret
-; CHECK-32: g64xl:
+; CHECK-32-LABEL: g64xl:
; CHECK-32: testb $8, %al
; CHECK-32: ret
define void @g64xl(i64 inreg %x) nounwind {
@@ -36,10 +36,10 @@ yes:
no:
ret void
}
-; CHECK-64: g32xh:
+; CHECK-64-LABEL: g32xh:
; CHECK-64: testb $8, {{%ah|%ch}}
; CHECK-64: ret
-; CHECK-32: g32xh:
+; CHECK-32-LABEL: g32xh:
; CHECK-32: testb $8, %ah
; CHECK-32: ret
define void @g32xh(i32 inreg %x) nounwind {
@@ -53,10 +53,10 @@ yes:
no:
ret void
}
-; CHECK-64: g32xl:
+; CHECK-64-LABEL: g32xl:
; CHECK-64: testb $8, [[A0L]]
; CHECK-64: ret
-; CHECK-32: g32xl:
+; CHECK-32-LABEL: g32xl:
; CHECK-32: testb $8, %al
; CHECK-32: ret
define void @g32xl(i32 inreg %x) nounwind {
@@ -70,10 +70,10 @@ yes:
no:
ret void
}
-; CHECK-64: g16xh:
+; CHECK-64-LABEL: g16xh:
; CHECK-64: testb $8, {{%ah|%ch}}
; CHECK-64: ret
-; CHECK-32: g16xh:
+; CHECK-32-LABEL: g16xh:
; CHECK-32: testb $8, %ah
; CHECK-32: ret
define void @g16xh(i16 inreg %x) nounwind {
@@ -87,10 +87,10 @@ yes:
no:
ret void
}
-; CHECK-64: g16xl:
+; CHECK-64-LABEL: g16xl:
; CHECK-64: testb $8, [[A0L]]
; CHECK-64: ret
-; CHECK-32: g16xl:
+; CHECK-32-LABEL: g16xl:
; CHECK-32: testb $8, %al
; CHECK-32: ret
define void @g16xl(i16 inreg %x) nounwind {
@@ -104,10 +104,10 @@ yes:
no:
ret void
}
-; CHECK-64: g64x16:
+; CHECK-64-LABEL: g64x16:
; CHECK-64: testw $-32640, %[[A0W:di|cx]]
; CHECK-64: ret
-; CHECK-32: g64x16:
+; CHECK-32-LABEL: g64x16:
; CHECK-32: testw $-32640, %ax
; CHECK-32: ret
define void @g64x16(i64 inreg %x) nounwind {
@@ -121,10 +121,10 @@ yes:
no:
ret void
}
-; CHECK-64: g32x16:
+; CHECK-64-LABEL: g32x16:
; CHECK-64: testw $-32640, %[[A0W]]
; CHECK-64: ret
-; CHECK-32: g32x16:
+; CHECK-32-LABEL: g32x16:
; CHECK-32: testw $-32640, %ax
; CHECK-32: ret
define void @g32x16(i32 inreg %x) nounwind {
@@ -138,10 +138,10 @@ yes:
no:
ret void
}
-; CHECK-64: g64x32:
+; CHECK-64-LABEL: g64x32:
; CHECK-64: testl $268468352, %e[[A0W]]
; CHECK-64: ret
-; CHECK-32: g64x32:
+; CHECK-32-LABEL: g64x32:
; CHECK-32: testl $268468352, %eax
; CHECK-32: ret
define void @g64x32(i64 inreg %x) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/tls-local-dynamic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tls-local-dynamic.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tls-local-dynamic.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tls-local-dynamic.ll Sun Jul 14 01:24:09 2013
@@ -10,7 +10,7 @@ entry:
ret i32* @x
; FIXME: This function uses a single thread-local variable,
; so we might want to fall back to general-dynamic here.
-; CHECK: get_x:
+; CHECK-LABEL: get_x:
; CHECK: leaq x at TLSLD(%rip), %rdi
; CHECK-NEXT: callq __tls_get_addr at PLT
; CHECK: x at DTPOFF
@@ -26,7 +26,7 @@ entry:
%cmp = icmp eq i32 %i, 1
br i1 %cmp, label %return, label %if.else
; This bb does not access TLS, so should not call __tls_get_addr.
-; CHECK: f:
+; CHECK-LABEL: f:
; CHECK-NOT: __tls_get_addr
; CHECK: je
Modified: llvm/trunk/test/CodeGen/X86/tls-models.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tls-models.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tls-models.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tls-models.ll Sun Jul 14 01:24:09 2013
@@ -25,15 +25,15 @@ entry:
ret i32* @external_gd
; Non-PIC code can use initial-exec, PIC code has to use general dynamic.
- ; X64: f1:
+ ; X64-LABEL: f1:
; X64: external_gd at GOTTPOFF
- ; X32: f1:
+ ; X32-LABEL: f1:
; X32: external_gd at INDNTPOFF
- ; X64_PIC: f1:
+ ; X64_PIC-LABEL: f1:
; X64_PIC: external_gd at TLSGD
- ; X32_PIC: f1:
+ ; X32_PIC-LABEL: f1:
; X32_PIC: external_gd at TLSGD
- ; DARWIN: f1:
+ ; DARWIN-LABEL: f1:
; DARWIN: _external_gd at TLVP
}
@@ -42,15 +42,15 @@ entry:
ret i32* @internal_gd
; Non-PIC code can use local exec, PIC code can use local dynamic.
- ; X64: f2:
+ ; X64-LABEL: f2:
; X64: internal_gd at TPOFF
- ; X32: f2:
+ ; X32-LABEL: f2:
; X32: internal_gd at NTPOFF
- ; X64_PIC: f2:
+ ; X64_PIC-LABEL: f2:
; X64_PIC: internal_gd at TLSLD
- ; X32_PIC: f2:
+ ; X32_PIC-LABEL: f2:
; X32_PIC: internal_gd at TLSLDM
- ; DARWIN: f2:
+ ; DARWIN-LABEL: f2:
; DARWIN: _internal_gd at TLVP
}
@@ -62,15 +62,15 @@ entry:
ret i32* @external_ld
; Non-PIC code can use initial exec, PIC code use local dynamic as specified.
- ; X64: f3:
+ ; X64-LABEL: f3:
; X64: external_ld at GOTTPOFF
- ; X32: f3:
+ ; X32-LABEL: f3:
; X32: external_ld at INDNTPOFF
- ; X64_PIC: f3:
+ ; X64_PIC-LABEL: f3:
; X64_PIC: external_ld at TLSLD
- ; X32_PIC: f3:
+ ; X32_PIC-LABEL: f3:
; X32_PIC: external_ld at TLSLDM
- ; DARWIN: f3:
+ ; DARWIN-LABEL: f3:
; DARWIN: _external_ld at TLVP
}
@@ -79,15 +79,15 @@ entry:
ret i32* @internal_ld
; Non-PIC code can use local exec, PIC code can use local dynamic.
- ; X64: f4:
+ ; X64-LABEL: f4:
; X64: internal_ld at TPOFF
- ; X32: f4:
+ ; X32-LABEL: f4:
; X32: internal_ld at NTPOFF
- ; X64_PIC: f4:
+ ; X64_PIC-LABEL: f4:
; X64_PIC: internal_ld at TLSLD
- ; X32_PIC: f4:
+ ; X32_PIC-LABEL: f4:
; X32_PIC: internal_ld at TLSLDM
- ; DARWIN: f4:
+ ; DARWIN-LABEL: f4:
; DARWIN: _internal_ld at TLVP
}
@@ -99,15 +99,15 @@ entry:
ret i32* @external_ie
; Non-PIC and PIC code will use initial exec as specified.
- ; X64: f5:
+ ; X64-LABEL: f5:
; X64: external_ie at GOTTPOFF
- ; X32: f5:
+ ; X32-LABEL: f5:
; X32: external_ie at INDNTPOFF
- ; X64_PIC: f5:
+ ; X64_PIC-LABEL: f5:
; X64_PIC: external_ie at GOTTPOFF
- ; X32_PIC: f5:
+ ; X32_PIC-LABEL: f5:
; X32_PIC: external_ie at GOTNTPOFF
- ; DARWIN: f5:
+ ; DARWIN-LABEL: f5:
; DARWIN: _external_ie at TLVP
}
@@ -116,15 +116,15 @@ entry:
ret i32* @internal_ie
; Non-PIC code can use local exec, PIC code use initial exec as specified.
- ; X64: f6:
+ ; X64-LABEL: f6:
; X64: internal_ie at TPOFF
- ; X32: f6:
+ ; X32-LABEL: f6:
; X32: internal_ie at NTPOFF
- ; X64_PIC: f6:
+ ; X64_PIC-LABEL: f6:
; X64_PIC: internal_ie at GOTTPOFF
- ; X32_PIC: f6:
+ ; X32_PIC-LABEL: f6:
; X32_PIC: internal_ie at GOTNTPOFF
- ; DARWIN: f6:
+ ; DARWIN-LABEL: f6:
; DARWIN: _internal_ie at TLVP
}
@@ -136,15 +136,15 @@ entry:
ret i32* @external_le
; Non-PIC and PIC code will use local exec as specified.
- ; X64: f7:
+ ; X64-LABEL: f7:
; X64: external_le at TPOFF
- ; X32: f7:
+ ; X32-LABEL: f7:
; X32: external_le at NTPOFF
- ; X64_PIC: f7:
+ ; X64_PIC-LABEL: f7:
; X64_PIC: external_le at TPOFF
- ; X32_PIC: f7:
+ ; X32_PIC-LABEL: f7:
; X32_PIC: external_le at NTPOFF
- ; DARWIN: f7:
+ ; DARWIN-LABEL: f7:
; DARWIN: _external_le at TLVP
}
@@ -153,14 +153,14 @@ entry:
ret i32* @internal_le
; Non-PIC and PIC code will use local exec as specified.
- ; X64: f8:
+ ; X64-LABEL: f8:
; X64: internal_le at TPOFF
- ; X32: f8:
+ ; X32-LABEL: f8:
; X32: internal_le at NTPOFF
- ; X64_PIC: f8:
+ ; X64_PIC-LABEL: f8:
; X64_PIC: internal_le at TPOFF
- ; X32_PIC: f8:
+ ; X32_PIC-LABEL: f8:
; X32_PIC: internal_le at NTPOFF
- ; DARWIN: f8:
+ ; DARWIN-LABEL: f8:
; DARWIN: _internal_le at TLVP
}
Modified: llvm/trunk/test/CodeGen/X86/tls-pic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tls-pic.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tls-pic.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tls-pic.ll Sun Jul 14 01:24:09 2013
@@ -11,11 +11,11 @@ entry:
ret i32 %tmp1
}
-; X32: f1:
+; X32-LABEL: f1:
; X32: leal i at TLSGD(,%ebx), %eax
; X32: calll ___tls_get_addr at PLT
-; X64: f1:
+; X64-LABEL: f1:
; X64: leaq i at TLSGD(%rip), %rdi
; X64: callq __tls_get_addr at PLT
@@ -27,11 +27,11 @@ entry:
ret i32* @i
}
-; X32: f2:
+; X32-LABEL: f2:
; X32: leal i at TLSGD(,%ebx), %eax
; X32: calll ___tls_get_addr at PLT
-; X64: f2:
+; X64-LABEL: f2:
; X64: leaq i at TLSGD(%rip), %rdi
; X64: callq __tls_get_addr at PLT
@@ -43,11 +43,11 @@ entry:
ret i32 %tmp1
}
-; X32: f3:
+; X32-LABEL: f3:
; X32: leal i at TLSGD(,%ebx), %eax
; X32: calll ___tls_get_addr at PLT
-; X64: f3:
+; X64-LABEL: f3:
; X64: leaq i at TLSGD(%rip), %rdi
; X64: callq __tls_get_addr at PLT
@@ -57,11 +57,11 @@ entry:
ret i32* @i
}
-; X32: f4:
+; X32-LABEL: f4:
; X32: leal i at TLSGD(,%ebx), %eax
; X32: calll ___tls_get_addr at PLT
-; X64: f4:
+; X64-LABEL: f4:
; X64: leaq i at TLSGD(%rip), %rdi
; X64: callq __tls_get_addr at PLT
@@ -74,13 +74,13 @@ entry:
ret i32 %add
}
-; X32: f5:
+; X32-LABEL: f5:
; X32: leal {{[jk]}}@TLSLDM(%ebx)
; X32: calll ___tls_get_addr at PLT
; X32: movl {{[jk]}}@DTPOFF(%e
; X32: addl {{[jk]}}@DTPOFF(%e
-; X64: f5:
+; X64-LABEL: f5:
; X64: leaq {{[jk]}}@TLSLD(%rip), %rdi
; X64: callq __tls_get_addr at PLT
; X64: movl {{[jk]}}@DTPOFF(%r
Modified: llvm/trunk/test/CodeGen/X86/tls-pie.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tls-pie.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tls-pie.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tls-pie.ll Sun Jul 14 01:24:09 2013
@@ -7,10 +7,10 @@
@i2 = external thread_local global i32
define i32 @f1() {
-; X32: f1:
+; X32-LABEL: f1:
; X32: movl %gs:i at NTPOFF, %eax
; X32-NEXT: ret
-; X64: f1:
+; X64-LABEL: f1:
; X64: movl %fs:i at TPOFF, %eax
; X64-NEXT: ret
@@ -20,11 +20,11 @@ entry:
}
define i32* @f2() {
-; X32: f2:
+; X32-LABEL: f2:
; X32: movl %gs:0, %eax
; X32-NEXT: leal i at NTPOFF(%eax), %eax
; X32-NEXT: ret
-; X64: f2:
+; X64-LABEL: f2:
; X64: movq %fs:0, %rax
; X64-NEXT: leaq i at TPOFF(%rax), %rax
; X64-NEXT: ret
@@ -34,7 +34,7 @@ entry:
}
define i32 @f3() {
-; X32: f3:
+; X32-LABEL: f3:
; X32: calll .L{{[0-9]+}}$pb
; X32-NEXT: .L{{[0-9]+}}$pb:
; X32-NEXT: popl %eax
@@ -43,7 +43,7 @@ define i32 @f3() {
; X32-NEXT: movl i2 at GOTNTPOFF(%eax), %eax
; X32-NEXT: movl %gs:(%eax), %eax
; X32-NEXT: ret
-; X64: f3:
+; X64-LABEL: f3:
; X64: movq i2 at GOTTPOFF(%rip), %rax
; X64-NEXT: movl %fs:(%rax), %eax
; X64-NEXT: ret
@@ -54,7 +54,7 @@ entry:
}
define i32* @f4() {
-; X32: f4:
+; X32-LABEL: f4:
; X32: calll .L{{[0-9]+}}$pb
; X32-NEXT: .L{{[0-9]+}}$pb:
; X32-NEXT: popl %ecx
@@ -63,7 +63,7 @@ define i32* @f4() {
; X32-NEXT: movl %gs:0, %eax
; X32-NEXT: addl i2 at GOTNTPOFF(%ecx), %eax
; X32-NEXT: ret
-; X64: f4:
+; X64-LABEL: f4:
; X64: movq %fs:0, %rax
; X64-NEXT: addq i2 at GOTTPOFF(%rip), %rax
; X64-NEXT: ret
Modified: llvm/trunk/test/CodeGen/X86/tls.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tls.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tls.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tls.ll Sun Jul 14 01:24:09 2013
@@ -12,19 +12,19 @@
@b1 = thread_local global i8 0
define i32 @f1() {
-; X32_LINUX: f1:
+; X32_LINUX-LABEL: f1:
; X32_LINUX: movl %gs:i1 at NTPOFF, %eax
; X32_LINUX-NEXT: ret
-; X64_LINUX: f1:
+; X64_LINUX-LABEL: f1:
; X64_LINUX: movl %fs:i1 at TPOFF, %eax
; X64_LINUX-NEXT: ret
-; X32_WIN: f1:
+; X32_WIN-LABEL: f1:
; X32_WIN: movl __tls_index, %eax
; X32_WIN-NEXT: movl %fs:__tls_array, %ecx
; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax
; X32_WIN-NEXT: movl _i1 at SECREL32(%eax), %eax
; X32_WIN-NEXT: ret
-; X64_WIN: f1:
+; X64_WIN-LABEL: f1:
; X64_WIN: movl _tls_index(%rip), %eax
; X64_WIN-NEXT: movq %gs:88, %rcx
; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax
@@ -37,21 +37,21 @@ entry:
}
define i32* @f2() {
-; X32_LINUX: f2:
+; X32_LINUX-LABEL: f2:
; X32_LINUX: movl %gs:0, %eax
; X32_LINUX-NEXT: leal i1 at NTPOFF(%eax), %eax
; X32_LINUX-NEXT: ret
-; X64_LINUX: f2:
+; X64_LINUX-LABEL: f2:
; X64_LINUX: movq %fs:0, %rax
; X64_LINUX-NEXT: leaq i1 at TPOFF(%rax), %rax
; X64_LINUX-NEXT: ret
-; X32_WIN: f2:
+; X32_WIN-LABEL: f2:
; X32_WIN: movl __tls_index, %eax
; X32_WIN-NEXT: movl %fs:__tls_array, %ecx
; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax
; X32_WIN-NEXT: leal _i1 at SECREL32(%eax), %eax
; X32_WIN-NEXT: ret
-; X64_WIN: f2:
+; X64_WIN-LABEL: f2:
; X64_WIN: movl _tls_index(%rip), %eax
; X64_WIN-NEXT: movq %gs:88, %rcx
; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax
@@ -63,21 +63,21 @@ entry:
}
define i32 @f3() nounwind {
-; X32_LINUX: f3:
+; X32_LINUX-LABEL: f3:
; X32_LINUX: movl i2 at INDNTPOFF, %eax
; X32_LINUX-NEXT: movl %gs:(%eax), %eax
; X32_LINUX-NEXT: ret
-; X64_LINUX: f3:
+; X64_LINUX-LABEL: f3:
; X64_LINUX: movq i2 at GOTTPOFF(%rip), %rax
; X64_LINUX-NEXT: movl %fs:(%rax), %eax
; X64_LINUX-NEXT: ret
-; X32_WIN: f3:
+; X32_WIN-LABEL: f3:
; X32_WIN: movl __tls_index, %eax
; X32_WIN-NEXT: movl %fs:__tls_array, %ecx
; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax
; X32_WIN-NEXT: movl _i2 at SECREL32(%eax), %eax
; X32_WIN-NEXT: ret
-; X64_WIN: f3:
+; X64_WIN-LABEL: f3:
; X64_WIN: movl _tls_index(%rip), %eax
; X64_WIN-NEXT: movq %gs:88, %rcx
; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax
@@ -90,21 +90,21 @@ entry:
}
define i32* @f4() {
-; X32_LINUX: f4:
+; X32_LINUX-LABEL: f4:
; X32_LINUX: movl %gs:0, %eax
; X32_LINUX-NEXT: addl i2 at INDNTPOFF, %eax
; X32_LINUX-NEXT: ret
-; X64_LINUX: f4:
+; X64_LINUX-LABEL: f4:
; X64_LINUX: movq %fs:0, %rax
; X64_LINUX-NEXT: addq i2 at GOTTPOFF(%rip), %rax
; X64_LINUX-NEXT: ret
-; X32_WIN: f4:
+; X32_WIN-LABEL: f4:
; X32_WIN: movl __tls_index, %eax
; X32_WIN-NEXT: movl %fs:__tls_array, %ecx
; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax
; X32_WIN-NEXT: leal _i2 at SECREL32(%eax), %eax
; X32_WIN-NEXT: ret
-; X64_WIN: f4:
+; X64_WIN-LABEL: f4:
; X64_WIN: movl _tls_index(%rip), %eax
; X64_WIN-NEXT: movq %gs:88, %rcx
; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax
@@ -116,19 +116,19 @@ entry:
}
define i32 @f5() nounwind {
-; X32_LINUX: f5:
+; X32_LINUX-LABEL: f5:
; X32_LINUX: movl %gs:i3 at NTPOFF, %eax
; X32_LINUX-NEXT: ret
-; X64_LINUX: f5:
+; X64_LINUX-LABEL: f5:
; X64_LINUX: movl %fs:i3 at TPOFF, %eax
; X64_LINUX-NEXT: ret
-; X32_WIN: f5:
+; X32_WIN-LABEL: f5:
; X32_WIN: movl __tls_index, %eax
; X32_WIN-NEXT: movl %fs:__tls_array, %ecx
; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax
; X32_WIN-NEXT: movl _i3 at SECREL32(%eax), %eax
; X32_WIN-NEXT: ret
-; X64_WIN: f5:
+; X64_WIN-LABEL: f5:
; X64_WIN: movl _tls_index(%rip), %eax
; X64_WIN-NEXT: movq %gs:88, %rcx
; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax
@@ -141,21 +141,21 @@ entry:
}
define i32* @f6() {
-; X32_LINUX: f6:
+; X32_LINUX-LABEL: f6:
; X32_LINUX: movl %gs:0, %eax
; X32_LINUX-NEXT: leal i3 at NTPOFF(%eax), %eax
; X32_LINUX-NEXT: ret
-; X64_LINUX: f6:
+; X64_LINUX-LABEL: f6:
; X64_LINUX: movq %fs:0, %rax
; X64_LINUX-NEXT: leaq i3 at TPOFF(%rax), %rax
; X64_LINUX-NEXT: ret
-; X32_WIN: f6:
+; X32_WIN-LABEL: f6:
; X32_WIN: movl __tls_index, %eax
; X32_WIN-NEXT: movl %fs:__tls_array, %ecx
; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax
; X32_WIN-NEXT: leal _i3 at SECREL32(%eax), %eax
; X32_WIN-NEXT: ret
-; X64_WIN: f6:
+; X64_WIN-LABEL: f6:
; X64_WIN: movl _tls_index(%rip), %eax
; X64_WIN-NEXT: movq %gs:88, %rcx
; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax
@@ -167,10 +167,10 @@ entry:
}
define i32 @f7() {
-; X32_LINUX: f7:
+; X32_LINUX-LABEL: f7:
; X32_LINUX: movl %gs:i4 at NTPOFF, %eax
; X32_LINUX-NEXT: ret
-; X64_LINUX: f7:
+; X64_LINUX-LABEL: f7:
; X64_LINUX: movl %fs:i4 at TPOFF, %eax
; X64_LINUX-NEXT: ret
@@ -180,11 +180,11 @@ entry:
}
define i32* @f8() {
-; X32_LINUX: f8:
+; X32_LINUX-LABEL: f8:
; X32_LINUX: movl %gs:0, %eax
; X32_LINUX-NEXT: leal i4 at NTPOFF(%eax), %eax
; X32_LINUX-NEXT: ret
-; X64_LINUX: f8:
+; X64_LINUX-LABEL: f8:
; X64_LINUX: movq %fs:0, %rax
; X64_LINUX-NEXT: leaq i4 at TPOFF(%rax), %rax
; X64_LINUX-NEXT: ret
@@ -194,10 +194,10 @@ entry:
}
define i32 @f9() {
-; X32_LINUX: f9:
+; X32_LINUX-LABEL: f9:
; X32_LINUX: movl %gs:i5 at NTPOFF, %eax
; X32_LINUX-NEXT: ret
-; X64_LINUX: f9:
+; X64_LINUX-LABEL: f9:
; X64_LINUX: movl %fs:i5 at TPOFF, %eax
; X64_LINUX-NEXT: ret
@@ -207,11 +207,11 @@ entry:
}
define i32* @f10() {
-; X32_LINUX: f10:
+; X32_LINUX-LABEL: f10:
; X32_LINUX: movl %gs:0, %eax
; X32_LINUX-NEXT: leal i5 at NTPOFF(%eax), %eax
; X32_LINUX-NEXT: ret
-; X64_LINUX: f10:
+; X64_LINUX-LABEL: f10:
; X64_LINUX: movq %fs:0, %rax
; X64_LINUX-NEXT: leaq i5 at TPOFF(%rax), %rax
; X64_LINUX-NEXT: ret
@@ -221,23 +221,23 @@ entry:
}
define i16 @f11() {
-; X32_LINUX: f11:
+; X32_LINUX-LABEL: f11:
; X32_LINUX: movzwl %gs:s1 at NTPOFF, %eax
; Why is this kill line here, but no where else?
; X32_LINUX-NEXT: # kill
; X32_LINUX-NEXT: ret
-; X64_LINUX: f11:
+; X64_LINUX-LABEL: f11:
; X64_LINUX: movzwl %fs:s1 at TPOFF, %eax
; X64_LINUX-NEXT: # kill
; X64_LINUX-NEXT: ret
-; X32_WIN: f11:
+; X32_WIN-LABEL: f11:
; X32_WIN: movl __tls_index, %eax
; X32_WIN-NEXT: movl %fs:__tls_array, %ecx
; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax
; X32_WIN-NEXT: movzwl _s1 at SECREL32(%eax), %eax
; X32_WIN-NEXT: # kill
; X32_WIN-NEXT: ret
-; X64_WIN: f11:
+; X64_WIN-LABEL: f11:
; X64_WIN: movl _tls_index(%rip), %eax
; X64_WIN-NEXT: movq %gs:88, %rcx
; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax
@@ -251,19 +251,19 @@ entry:
}
define i32 @f12() {
-; X32_LINUX: f12:
+; X32_LINUX-LABEL: f12:
; X32_LINUX: movswl %gs:s1 at NTPOFF, %eax
; X32_LINUX-NEXT: ret
-; X64_LINUX: f12:
+; X64_LINUX-LABEL: f12:
; X64_LINUX: movswl %fs:s1 at TPOFF, %eax
; X64_LINUX-NEXT: ret
-; X32_WIN: f12:
+; X32_WIN-LABEL: f12:
; X32_WIN: movl __tls_index, %eax
; X32_WIN-NEXT: movl %fs:__tls_array, %ecx
; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax
; X32_WIN-NEXT: movswl _s1 at SECREL32(%eax), %eax
; X32_WIN-NEXT: ret
-; X64_WIN: f12:
+; X64_WIN-LABEL: f12:
; X64_WIN: movl _tls_index(%rip), %eax
; X64_WIN-NEXT: movq %gs:88, %rcx
; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax
@@ -277,19 +277,19 @@ entry:
}
define i8 @f13() {
-; X32_LINUX: f13:
+; X32_LINUX-LABEL: f13:
; X32_LINUX: movb %gs:b1 at NTPOFF, %al
; X32_LINUX-NEXT: ret
-; X64_LINUX: f13:
+; X64_LINUX-LABEL: f13:
; X64_LINUX: movb %fs:b1 at TPOFF, %al
; X64_LINUX-NEXT: ret
-; X32_WIN: f13:
+; X32_WIN-LABEL: f13:
; X32_WIN: movl __tls_index, %eax
; X32_WIN-NEXT: movl %fs:__tls_array, %ecx
; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax
; X32_WIN-NEXT: movb _b1 at SECREL32(%eax), %al
; X32_WIN-NEXT: ret
-; X64_WIN: f13:
+; X64_WIN-LABEL: f13:
; X64_WIN: movl _tls_index(%rip), %eax
; X64_WIN-NEXT: movq %gs:88, %rcx
; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax
@@ -302,19 +302,19 @@ entry:
}
define i32 @f14() {
-; X32_LINUX: f14:
+; X32_LINUX-LABEL: f14:
; X32_LINUX: movsbl %gs:b1 at NTPOFF, %eax
; X32_LINUX-NEXT: ret
-; X64_LINUX: f14:
+; X64_LINUX-LABEL: f14:
; X64_LINUX: movsbl %fs:b1 at TPOFF, %eax
; X64_LINUX-NEXT: ret
-; X32_WIN: f14:
+; X32_WIN-LABEL: f14:
; X32_WIN: movl __tls_index, %eax
; X32_WIN-NEXT: movl %fs:__tls_array, %ecx
; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax
; X32_WIN-NEXT: movsbl _b1 at SECREL32(%eax), %eax
; X32_WIN-NEXT: ret
-; X64_WIN: f14:
+; X64_WIN-LABEL: f14:
; X64_WIN: movl _tls_index(%rip), %eax
; X64_WIN-NEXT: movq %gs:88, %rcx
; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax
Modified: llvm/trunk/test/CodeGen/X86/tlv-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tlv-1.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tlv-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tlv-1.ll Sun Jul 14 01:24:09 2013
@@ -5,7 +5,7 @@
@c = external thread_local global %struct.A, align 4
define void @main() nounwind ssp {
-; CHECK: main:
+; CHECK-LABEL: main:
entry:
call void @llvm.memset.p0i8.i64(i8* getelementptr inbounds (%struct.A* @c, i32 0, i32 0, i32 0), i8 0, i64 60, i32 1, i1 false)
unreachable
Modified: llvm/trunk/test/CodeGen/X86/umul-with-overflow.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/umul-with-overflow.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/umul-with-overflow.ll (original)
+++ llvm/trunk/test/CodeGen/X86/umul-with-overflow.ll Sun Jul 14 01:24:09 2013
@@ -6,7 +6,7 @@ define zeroext i1 @a(i32 %x) nounwind {
%obil = extractvalue {i32, i1} %res, 1
ret i1 %obil
-; CHECK: a:
+; CHECK-LABEL: a:
; CHECK: mull
; CHECK: seto %al
; CHECK: movzbl %al, %eax
Modified: llvm/trunk/test/CodeGen/X86/unwind-init.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/unwind-init.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/unwind-init.ll (original)
+++ llvm/trunk/test/CodeGen/X86/unwind-init.ll Sun Jul 14 01:24:09 2013
@@ -12,7 +12,7 @@ define void @calls_unwind_init() {
ret void
}
-; X8664: calls_unwind_init:
+; X8664-LABEL: calls_unwind_init:
; X8664: pushq %rbp
; X8664: pushq %r15
; X8664: pushq %r14
@@ -25,7 +25,7 @@ define void @calls_unwind_init() {
; X8664: popq %r14
; X8664: popq %r15
-; X8632: calls_unwind_init:
+; X8632-LABEL: calls_unwind_init:
; X8632: pushl %ebp
; X8632: pushl %ebx
; X8632: pushl %edi
Modified: llvm/trunk/test/CodeGen/X86/vec-sign.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec-sign.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec-sign.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec-sign.ll Sun Jul 14 01:24:09 2013
@@ -2,7 +2,7 @@
define <4 x i32> @signd(<4 x i32> %a, <4 x i32> %b) nounwind {
entry:
-; CHECK: signd:
+; CHECK-LABEL: signd:
; CHECK: psignd
; CHECK-NOT: sub
; CHECK: ret
@@ -17,7 +17,7 @@ entry:
define <4 x i32> @blendvb(<4 x i32> %b, <4 x i32> %a, <4 x i32> %c) nounwind {
entry:
-; CHECK: blendvb:
+; CHECK-LABEL: blendvb:
; CHECK: pblendvb
; CHECK: ret
%b.lobit = ashr <4 x i32> %b, <i32 31, i32 31, i32 31, i32 31>
Modified: llvm/trunk/test/CodeGen/X86/vec_insert-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_insert-2.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_insert-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_insert-2.ll Sun Jul 14 01:24:09 2013
@@ -2,7 +2,7 @@
; RUN: llc < %s -march=x86-64 -mattr=+sse2,-sse41 | FileCheck --check-prefix=X64 %s
define <4 x float> @t1(float %s, <4 x float> %tmp) nounwind {
-; X32: t1:
+; X32-LABEL: t1:
; X32: shufps $36
; X32: ret
@@ -11,7 +11,7 @@ define <4 x float> @t1(float %s, <4 x fl
}
define <4 x i32> @t2(i32 %s, <4 x i32> %tmp) nounwind {
-; X32: t2:
+; X32-LABEL: t2:
; X32: shufps $36
; X32: ret
@@ -20,11 +20,11 @@ define <4 x i32> @t2(i32 %s, <4 x i32> %
}
define <2 x double> @t3(double %s, <2 x double> %tmp) nounwind {
-; X32: t3:
+; X32-LABEL: t3:
; X32: movhpd
; X32: ret
-; X64: t3:
+; X64-LABEL: t3:
; X64: unpcklpd
; X64: ret
@@ -33,7 +33,7 @@ define <2 x double> @t3(double %s, <2 x
}
define <8 x i16> @t4(i16 %s, <8 x i16> %tmp) nounwind {
-; X32: t4:
+; X32-LABEL: t4:
; X32: pinsrw
; X32: ret
Modified: llvm/trunk/test/CodeGen/X86/vec_insert-5.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_insert-5.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_insert-5.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_insert-5.ll Sun Jul 14 01:24:09 2013
@@ -9,7 +9,7 @@ define void @t1(i32 %a, x86_mmx* %P) no
store x86_mmx %tmp23, x86_mmx* %P
ret void
-; CHECK: t1:
+; CHECK-LABEL: t1:
; CHECK-NOT: %mm
; CHECK: shll $12
; CHECK-NOT: %mm
@@ -20,7 +20,7 @@ define <4 x float> @t2(<4 x float>* %P)
%tmp2 = shufflevector <4 x float> %tmp1, <4 x float> zeroinitializer, <4 x i32> < i32 4, i32 4, i32 4, i32 0 >
ret <4 x float> %tmp2
-; CHECK: t2:
+; CHECK-LABEL: t2:
; CHECK: pslldq $12
}
@@ -29,7 +29,7 @@ define <4 x float> @t3(<4 x float>* %P)
%tmp2 = shufflevector <4 x float> %tmp1, <4 x float> zeroinitializer, <4 x i32> < i32 2, i32 3, i32 4, i32 4 >
ret <4 x float> %tmp2
-; CHECK: t3:
+; CHECK-LABEL: t3:
; CHECK: psrldq $8
}
@@ -38,7 +38,7 @@ define <4 x float> @t4(<4 x float>* %P)
%tmp2 = shufflevector <4 x float> zeroinitializer, <4 x float> %tmp1, <4 x i32> < i32 7, i32 0, i32 0, i32 0 >
ret <4 x float> %tmp2
-; CHECK: t4:
+; CHECK-LABEL: t4:
; CHECK: psrldq $12
}
@@ -46,7 +46,7 @@ define <16 x i8> @t5(<16 x i8> %x) nounw
%s = shufflevector <16 x i8> %x, <16 x i8> zeroinitializer, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 17>
ret <16 x i8> %s
-; CHECK: t5:
+; CHECK-LABEL: t5:
; CHECK: psrldq $1
}
@@ -54,7 +54,7 @@ define <16 x i8> @t6(<16 x i8> %x) nounw
%s = shufflevector <16 x i8> %x, <16 x i8> undef, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
ret <16 x i8> %s
-; CHECK: t6:
+; CHECK-LABEL: t6:
; CHECK: palignr $1
}
@@ -62,6 +62,6 @@ define <16 x i8> @t7(<16 x i8> %x) nounw
%s = shufflevector <16 x i8> %x, <16 x i8> undef, <16 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 1, i32 2>
ret <16 x i8> %s
-; CHECK: t7:
+; CHECK-LABEL: t7:
; CHECK: pslldq $13
}
Modified: llvm/trunk/test/CodeGen/X86/vec_shuffle-14.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_shuffle-14.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_shuffle-14.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_shuffle-14.ll Sun Jul 14 01:24:09 2013
@@ -7,10 +7,10 @@ entry:
%tmp6 = shufflevector <4 x i32> zeroinitializer, <4 x i32> %tmp, <4 x i32> < i32 4, i32 1, i32 2, i32 3 > ; <<4 x i32>> [#uses=1]
ret <4 x i32> %tmp6
-; X86-32: t1:
+; X86-32-LABEL: t1:
; X86-32: movd 4(%esp), %xmm0
-; X86-64: t1:
+; X86-64-LABEL: t1:
; X86-64: movd %e{{..}}, %xmm0
}
@@ -20,10 +20,10 @@ entry:
%tmp6 = shufflevector <2 x i64> zeroinitializer, <2 x i64> %tmp, <2 x i32> < i32 2, i32 1 > ; <<4 x i32>> [#uses=1]
ret <2 x i64> %tmp6
-; X86-32: t2:
+; X86-32-LABEL: t2:
; X86-32: movq 4(%esp), %xmm0
-; X86-64: t2:
+; X86-64-LABEL: t2:
; X86-64: movd %r{{..}}, %xmm0
}
@@ -35,11 +35,11 @@ entry:
%tmp8 = bitcast <4 x i32> %tmp7 to <2 x i64> ; <<2 x i64>> [#uses=1]
ret <2 x i64> %tmp8
-; X86-32: t3:
+; X86-32-LABEL: t3:
; X86-32: movl 4(%esp)
; X86-32: movq
-; X86-64: t3:
+; X86-64-LABEL: t3:
; X86-64: movq ({{.*}}), %xmm0
}
@@ -50,10 +50,10 @@ entry:
%tmp7 = bitcast <4 x i32> %tmp6 to <2 x i64> ; <<2 x i64>> [#uses=1]
ret <2 x i64> %tmp7
-; X86-32: t4:
+; X86-32-LABEL: t4:
; X86-32: movq %xmm0, %xmm0
-; X86-64: t4:
+; X86-64-LABEL: t4:
; X86-64: movq {{.*}}, %xmm0
}
@@ -62,9 +62,9 @@ entry:
%tmp6 = shufflevector <2 x i64> zeroinitializer, <2 x i64> %a, <2 x i32> < i32 2, i32 1 > ; <<4 x i32>> [#uses=1]
ret <2 x i64> %tmp6
-; X86-32: t5:
+; X86-32-LABEL: t5:
; X86-32: movq %xmm0, %xmm0
-; X86-64: t5:
+; X86-64-LABEL: t5:
; X86-64: movq {{.*}}, %xmm0
}
Modified: llvm/trunk/test/CodeGen/X86/vec_shuffle-16.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_shuffle-16.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_shuffle-16.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_shuffle-16.ll Sun Jul 14 01:24:09 2013
@@ -1,8 +1,8 @@
; RUN: llc < %s -march=x86 -mcpu=penryn -mattr=+sse,-sse2 -mtriple=i386-apple-darwin | FileCheck %s -check-prefix=sse
; RUN: llc < %s -march=x86 -mcpu=penryn -mattr=+sse2 -mtriple=i386-apple-darwin | FileCheck %s -check-prefix=sse2
-; sse: t1:
-; sse2: t1:
+; sse-LABEL: t1:
+; sse2-LABEL: t1:
define <4 x float> @t1(<4 x float> %a, <4 x float> %b) nounwind {
; sse: shufps
; sse2: pshufd
@@ -11,8 +11,8 @@ define <4 x float> @t1(<4 x float> %a, <
ret <4 x float> %tmp1
}
-; sse: t2:
-; sse2: t2:
+; sse-LABEL: t2:
+; sse2-LABEL: t2:
define <4 x float> @t2(<4 x float> %A, <4 x float> %B) nounwind {
; sse: shufps
; sse2: pshufd
@@ -21,8 +21,8 @@ define <4 x float> @t2(<4 x float> %A, <
ret <4 x float> %tmp
}
-; sse: t3:
-; sse2: t3:
+; sse-LABEL: t3:
+; sse2-LABEL: t3:
define <4 x float> @t3(<4 x float> %A, <4 x float> %B) nounwind {
; sse: shufps
; sse2: pshufd
@@ -31,8 +31,8 @@ define <4 x float> @t3(<4 x float> %A, <
ret <4 x float> %tmp
}
-; sse: t4:
-; sse2: t4:
+; sse-LABEL: t4:
+; sse2-LABEL: t4:
define <4 x float> @t4(<4 x float> %A, <4 x float> %B) nounwind {
; sse: shufps
Modified: llvm/trunk/test/CodeGen/X86/vec_shuffle-39.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_shuffle-39.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_shuffle-39.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_shuffle-39.ll Sun Jul 14 01:24:09 2013
@@ -3,7 +3,7 @@
define <4 x float> @t1(<4 x float> %a, <1 x i64>* nocapture %p) nounwind {
entry:
-; CHECK: t1:
+; CHECK-LABEL: t1:
; CHECK: movlps (%rdi), %xmm0
; CHECK: ret
%p.val = load <1 x i64>* %p, align 1
@@ -15,7 +15,7 @@ entry:
define <4 x float> @t1a(<4 x float> %a, <1 x i64>* nocapture %p) nounwind {
entry:
-; CHECK: t1a:
+; CHECK-LABEL: t1a:
; CHECK: movlps (%rdi), %xmm0
; CHECK: ret
%0 = bitcast <1 x i64>* %p to double*
@@ -28,7 +28,7 @@ entry:
define void @t2(<1 x i64>* nocapture %p, <4 x float> %a) nounwind {
entry:
-; CHECK: t2:
+; CHECK-LABEL: t2:
; CHECK: movlps %xmm0, (%rdi)
; CHECK: ret
%cast.i = bitcast <4 x float> %a to <2 x i64>
@@ -40,7 +40,7 @@ entry:
define void @t2a(<1 x i64>* nocapture %p, <4 x float> %a) nounwind {
entry:
-; CHECK: t2a:
+; CHECK-LABEL: t2a:
; CHECK: movlps %xmm0, (%rdi)
; CHECK: ret
%0 = bitcast <1 x i64>* %p to double*
@@ -53,7 +53,7 @@ entry:
; rdar://10436044
define <2 x double> @t3() nounwind readonly {
bb:
-; CHECK: t3:
+; CHECK-LABEL: t3:
; CHECK: punpcklqdq %xmm1, %xmm0
; CHECK: movq (%rax), %xmm1
; CHECK: movsd %xmm1, %xmm0
@@ -71,7 +71,7 @@ bb:
; rdar://10450317
define <2 x i64> @t4() nounwind readonly {
bb:
-; CHECK: t4:
+; CHECK-LABEL: t4:
; CHECK: punpcklqdq %xmm0, %xmm1
; CHECK: movq (%rax), %xmm0
; CHECK: movsd %xmm1, %xmm0
Modified: llvm/trunk/test/CodeGen/X86/vec_splat-3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_splat-3.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_splat-3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_splat-3.ll Sun Jul 14 01:24:09 2013
@@ -5,7 +5,7 @@ define <8 x i16> @shuf_8i16_0(<8 x i16>
%tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> <i32 0, i32 undef, i32 undef, i32 0, i32 undef, i32 undef, i32 undef, i32 undef>
ret <8 x i16> %tmp6
-; CHECK: shuf_8i16_0:
+; CHECK-LABEL: shuf_8i16_0:
; CHECK: pshuflw $0
}
@@ -13,7 +13,7 @@ define <8 x i16> @shuf_8i16_1(<8 x i16>
%tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> <i32 1, i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
ret <8 x i16> %tmp6
-; CHECK: shuf_8i16_1:
+; CHECK-LABEL: shuf_8i16_1:
; CHECK: pshuflw $5
}
@@ -21,7 +21,7 @@ define <8 x i16> @shuf_8i16_2(<8 x i16>
%tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> <i32 2, i32 undef, i32 undef, i32 2, i32 undef, i32 2, i32 undef, i32 undef>
ret <8 x i16> %tmp6
-; CHECK: shuf_8i16_2:
+; CHECK-LABEL: shuf_8i16_2:
; CHECK: punpcklwd
; CHECK-NEXT: pshufd $-86
}
@@ -30,7 +30,7 @@ define <8 x i16> @shuf_8i16_3(<8 x i16>
%tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> <i32 3, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
ret <8 x i16> %tmp6
-; CHECK: shuf_8i16_3:
+; CHECK-LABEL: shuf_8i16_3:
; CHECK: pshuflw $15
}
@@ -38,7 +38,7 @@ define <8 x i16> @shuf_8i16_4(<8 x i16>
%tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> <i32 4, i32 undef, i32 undef, i32 undef, i32 4, i32 undef, i32 undef, i32 undef>
ret <8 x i16> %tmp6
-; CHECK: shuf_8i16_4:
+; CHECK-LABEL: shuf_8i16_4:
; CHECK: movhlps
}
@@ -46,7 +46,7 @@ define <8 x i16> @shuf_8i16_5(<8 x i16>
%tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> <i32 5, i32 undef, i32 undef, i32 5, i32 undef, i32 undef, i32 undef, i32 undef>
ret <8 x i16> %tmp6
-; CHECK: shuf_8i16_5:
+; CHECK-LABEL: shuf_8i16_5:
; CHECK: punpckhwd
; CHECK-NEXT: pshufd $85
}
@@ -55,7 +55,7 @@ define <8 x i16> @shuf_8i16_6(<8 x i16>
%tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> <i32 6, i32 6, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
ret <8 x i16> %tmp6
-; CHECK: shuf_8i16_6:
+; CHECK-LABEL: shuf_8i16_6:
; CHECK: punpckhwd
; CHECK-NEXT: pshufd $-86
}
@@ -64,7 +64,7 @@ define <8 x i16> @shuf_8i16_7(<8 x i16>
%tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> <i32 7, i32 undef, i32 undef, i32 7, i32 undef, i32 undef, i32 undef, i32 undef>
ret <8 x i16> %tmp6
-; CHECK: shuf_8i16_7:
+; CHECK-LABEL: shuf_8i16_7:
; CHECK: punpckhwd
; CHECK-NEXT: pshufd $-1
}
@@ -74,7 +74,7 @@ define <16 x i8> @shuf_16i8_8(<16 x i8>
%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 0, i32 undef, i32 undef, i32 0, i32 undef, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
ret <16 x i8> %tmp6
-; CHECK: shuf_16i8_8:
+; CHECK-LABEL: shuf_16i8_8:
; CHECK: punpcklbw
; CHECK-NEXT: punpcklbw
; CHECK-NEXT: pshufd $0
@@ -84,7 +84,7 @@ define <16 x i8> @shuf_16i8_9(<16 x i8>
%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 1, i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef >
ret <16 x i8> %tmp6
-; CHECK: shuf_16i8_9:
+; CHECK-LABEL: shuf_16i8_9:
; CHECK: punpcklbw
; CHECK-NEXT: punpcklbw
; CHECK-NEXT: pshufd $85
@@ -94,7 +94,7 @@ define <16 x i8> @shuf_16i8_10(<16 x i8>
%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 2, i32 undef, i32 undef, i32 2, i32 undef, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2>
ret <16 x i8> %tmp6
-; CHECK: shuf_16i8_10:
+; CHECK-LABEL: shuf_16i8_10:
; CHECK: punpcklbw
; CHECK-NEXT: punpcklbw
; CHECK-NEXT: pshufd $-86
@@ -104,7 +104,7 @@ define <16 x i8> @shuf_16i8_11(<16 x i8>
%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 3, i32 undef, i32 undef, i32 3, i32 undef, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3>
ret <16 x i8> %tmp6
-; CHECK: shuf_16i8_11:
+; CHECK-LABEL: shuf_16i8_11:
; CHECK: punpcklbw
; CHECK-NEXT: punpcklbw
; CHECK-NEXT: pshufd $-1
@@ -115,7 +115,7 @@ define <16 x i8> @shuf_16i8_12(<16 x i8>
%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 4, i32 undef, i32 undef, i32 undef, i32 4, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef >
ret <16 x i8> %tmp6
-; CHECK: shuf_16i8_12:
+; CHECK-LABEL: shuf_16i8_12:
; CHECK: pshufd $5
}
@@ -123,7 +123,7 @@ define <16 x i8> @shuf_16i8_13(<16 x i8>
%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 5, i32 undef, i32 undef, i32 5, i32 undef, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5>
ret <16 x i8> %tmp6
-; CHECK: shuf_16i8_13:
+; CHECK-LABEL: shuf_16i8_13:
; CHECK: punpcklbw
; CHECK-NEXT: punpckhbw
; CHECK-NEXT: pshufd $85
@@ -133,7 +133,7 @@ define <16 x i8> @shuf_16i8_14(<16 x i8>
%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 6, i32 undef, i32 undef, i32 6, i32 undef, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6>
ret <16 x i8> %tmp6
-; CHECK: shuf_16i8_14:
+; CHECK-LABEL: shuf_16i8_14:
; CHECK: punpcklbw
; CHECK-NEXT: punpckhbw
; CHECK-NEXT: pshufd $-86
@@ -143,7 +143,7 @@ define <16 x i8> @shuf_16i8_15(<16 x i8>
%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 7, i32 undef, i32 undef, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef >
ret <16 x i8> %tmp6
-; CHECK: shuf_16i8_15:
+; CHECK-LABEL: shuf_16i8_15:
; CHECK: punpcklbw
; CHECK-NEXT: punpckhbw
; CHECK-NEXT: pshufd $-1
@@ -153,7 +153,7 @@ define <16 x i8> @shuf_16i8_16(<16 x i8>
%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 8, i32 undef, i32 undef, i32 8, i32 undef, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8>
ret <16 x i8> %tmp6
-; CHECK: shuf_16i8_16:
+; CHECK-LABEL: shuf_16i8_16:
; CHECK: punpckhbw
; CHECK-NEXT: punpcklbw
; CHECK-NEXT: pshufd $0
@@ -163,7 +163,7 @@ define <16 x i8> @shuf_16i8_17(<16 x i8>
%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 9, i32 undef, i32 undef, i32 9, i32 undef, i32 9, i32 9, i32 9, i32 9, i32 9, i32 9, i32 9, i32 9, i32 9, i32 9, i32 9>
ret <16 x i8> %tmp6
-; CHECK: shuf_16i8_17:
+; CHECK-LABEL: shuf_16i8_17:
; CHECK: punpckhbw
; CHECK-NEXT: punpcklbw
; CHECK-NEXT: pshufd $85
@@ -173,7 +173,7 @@ define <16 x i8> @shuf_16i8_18(<16 x i8>
%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 10, i32 undef, i32 undef, i32 10, i32 undef, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10>
ret <16 x i8> %tmp6
-; CHECK: shuf_16i8_18:
+; CHECK-LABEL: shuf_16i8_18:
; CHECK: punpckhbw
; CHECK-NEXT: punpcklbw
; CHECK-NEXT: pshufd $-86
@@ -183,7 +183,7 @@ define <16 x i8> @shuf_16i8_19(<16 x i8>
%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 11, i32 undef, i32 undef, i32 11, i32 undef, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11>
ret <16 x i8> %tmp6
-; CHECK: shuf_16i8_19:
+; CHECK-LABEL: shuf_16i8_19:
; CHECK: punpckhbw
; CHECK-NEXT: punpcklbw
; CHECK-NEXT: pshufd $-1
@@ -193,7 +193,7 @@ define <16 x i8> @shuf_16i8_20(<16 x i8>
%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 12, i32 undef, i32 undef, i32 12, i32 undef, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12>
ret <16 x i8> %tmp6
-; CHECK: shuf_16i8_20:
+; CHECK-LABEL: shuf_16i8_20:
; CHECK: punpckhbw
; CHECK-NEXT: punpckhbw
; CHECK-NEXT: pshufd $0
@@ -203,7 +203,7 @@ define <16 x i8> @shuf_16i8_21(<16 x i8>
%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 13, i32 undef, i32 undef, i32 13, i32 undef, i32 13, i32 13, i32 13, i32 13, i32 13, i32 13, i32 13, i32 13, i32 13, i32 13, i32 13>
ret <16 x i8> %tmp6
-; CHECK: shuf_16i8_21:
+; CHECK-LABEL: shuf_16i8_21:
; CHECK: punpckhbw
; CHECK-NEXT: punpckhbw
; CHECK-NEXT: pshufd $85
@@ -213,7 +213,7 @@ define <16 x i8> @shuf_16i8_22(<16 x i8>
%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 14, i32 undef, i32 undef, i32 14, i32 undef, i32 14, i32 14, i32 14, i32 14, i32 14, i32 14, i32 14, i32 14, i32 14, i32 14, i32 14>
ret <16 x i8> %tmp6
-; CHECK: shuf_16i8_22:
+; CHECK-LABEL: shuf_16i8_22:
; CHECK: punpckhbw
; CHECK-NEXT: punpckhbw
; CHECK-NEXT: pshufd $-86
@@ -223,7 +223,7 @@ define <16 x i8> @shuf_16i8_23(<16 x i8>
%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 15, i32 undef, i32 undef, i32 15, i32 undef, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15>
ret <16 x i8> %tmp6
-; CHECK: shuf_16i8_23:
+; CHECK-LABEL: shuf_16i8_23:
; CHECK: punpckhbw
; CHECK-NEXT: punpckhbw
; CHECK-NEXT: pshufd $-1
Modified: llvm/trunk/test/CodeGen/X86/vector-gep.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-gep.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-gep.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-gep.ll Sun Jul 14 01:24:09 2013
@@ -1,7 +1,7 @@
; RUN: llc < %s -march=x86 -mcpu=corei7-avx | FileCheck %s
; RUN: opt -instsimplify -disable-output < %s
-;CHECK: AGEP0:
+;CHECK-LABEL: AGEP0:
define <4 x i32*> @AGEP0(i32* %ptr) nounwind {
entry:
%vecinit.i = insertelement <4 x i32*> undef, i32* %ptr, i32 0
@@ -16,7 +16,7 @@ entry:
;CHECK: ret
}
-;CHECK: AGEP1:
+;CHECK-LABEL: AGEP1:
define i32 @AGEP1(<4 x i32*> %param) nounwind {
entry:
;CHECK: padd
@@ -27,7 +27,7 @@ entry:
;CHECK: ret
}
-;CHECK: AGEP2:
+;CHECK-LABEL: AGEP2:
define i32 @AGEP2(<4 x i32*> %param, <4 x i32> %off) nounwind {
entry:
;CHECK: pslld $2
@@ -39,7 +39,7 @@ entry:
;CHECK: ret
}
-;CHECK: AGEP3:
+;CHECK-LABEL: AGEP3:
define <4 x i32*> @AGEP3(<4 x i32*> %param, <4 x i32> %off) nounwind {
entry:
;CHECK: pslld $2
@@ -51,7 +51,7 @@ entry:
;CHECK: ret
}
-;CHECK: AGEP4:
+;CHECK-LABEL: AGEP4:
define <4 x i16*> @AGEP4(<4 x i16*> %param, <4 x i32> %off) nounwind {
entry:
; Multiply offset by two (add it to itself).
@@ -63,7 +63,7 @@ entry:
;CHECK: ret
}
-;CHECK: AGEP5:
+;CHECK-LABEL: AGEP5:
define <4 x i8*> @AGEP5(<4 x i8*> %param, <4 x i8> %off) nounwind {
entry:
;CHECK: paddd
@@ -74,7 +74,7 @@ entry:
; The size of each element is 1 byte. No need to multiply by element size.
-;CHECK: AGEP6:
+;CHECK-LABEL: AGEP6:
define <4 x i8*> @AGEP6(<4 x i8*> %param, <4 x i32> %off) nounwind {
entry:
;CHECK-NOT: pslld
Modified: llvm/trunk/test/CodeGen/X86/vshift-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vshift-1.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vshift-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vshift-1.ll Sun Jul 14 01:24:09 2013
@@ -5,7 +5,7 @@
define void @shift1a(<2 x i64> %val, <2 x i64>* %dst) nounwind {
entry:
-; CHECK: shift1a:
+; CHECK-LABEL: shift1a:
; CHECK: psllq
%shl = shl <2 x i64> %val, < i64 32, i64 32 >
store <2 x i64> %shl, <2 x i64>* %dst
@@ -14,7 +14,7 @@ entry:
define void @shift1b(<2 x i64> %val, <2 x i64>* %dst, i64 %amt) nounwind {
entry:
-; CHECK: shift1b:
+; CHECK-LABEL: shift1b:
; CHECK: movd
; CHECK: psllq
%0 = insertelement <2 x i64> undef, i64 %amt, i32 0
@@ -27,7 +27,7 @@ entry:
define void @shift2a(<4 x i32> %val, <4 x i32>* %dst) nounwind {
entry:
-; CHECK: shift2a:
+; CHECK-LABEL: shift2a:
; CHECK: pslld
%shl = shl <4 x i32> %val, < i32 5, i32 5, i32 5, i32 5 >
store <4 x i32> %shl, <4 x i32>* %dst
@@ -36,7 +36,7 @@ entry:
define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind {
entry:
-; CHECK: shift2b:
+; CHECK-LABEL: shift2b:
; CHECK: movd
; CHECK: pslld
%0 = insertelement <4 x i32> undef, i32 %amt, i32 0
@@ -50,7 +50,7 @@ entry:
define void @shift3a(<8 x i16> %val, <8 x i16>* %dst) nounwind {
entry:
-; CHECK: shift3a:
+; CHECK-LABEL: shift3a:
; CHECK: psllw
%shl = shl <8 x i16> %val, < i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5 >
store <8 x i16> %shl, <8 x i16>* %dst
@@ -60,7 +60,7 @@ entry:
; Make sure the shift amount is properly zero extended.
define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind {
entry:
-; CHECK: shift3b:
+; CHECK-LABEL: shift3b:
; CHECK: movzwl
; CHECK: movd
; CHECK-NEXT: psllw
Modified: llvm/trunk/test/CodeGen/X86/vshift-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vshift-2.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vshift-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vshift-2.ll Sun Jul 14 01:24:09 2013
@@ -5,7 +5,7 @@
define void @shift1a(<2 x i64> %val, <2 x i64>* %dst) nounwind {
entry:
-; CHECK: shift1a:
+; CHECK-LABEL: shift1a:
; CHECK: psrlq
%lshr = lshr <2 x i64> %val, < i64 32, i64 32 >
store <2 x i64> %lshr, <2 x i64>* %dst
@@ -14,7 +14,7 @@ entry:
define void @shift1b(<2 x i64> %val, <2 x i64>* %dst, i64 %amt) nounwind {
entry:
-; CHECK: shift1b:
+; CHECK-LABEL: shift1b:
; CHECK: movd
; CHECK: psrlq
%0 = insertelement <2 x i64> undef, i64 %amt, i32 0
@@ -26,7 +26,7 @@ entry:
define void @shift2a(<4 x i32> %val, <4 x i32>* %dst) nounwind {
entry:
-; CHECK: shift2a:
+; CHECK-LABEL: shift2a:
; CHECK: psrld
%lshr = lshr <4 x i32> %val, < i32 17, i32 17, i32 17, i32 17 >
store <4 x i32> %lshr, <4 x i32>* %dst
@@ -35,7 +35,7 @@ entry:
define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind {
entry:
-; CHECK: shift2b:
+; CHECK-LABEL: shift2b:
; CHECK: movd
; CHECK: psrld
%0 = insertelement <4 x i32> undef, i32 %amt, i32 0
@@ -50,7 +50,7 @@ entry:
define void @shift3a(<8 x i16> %val, <8 x i16>* %dst) nounwind {
entry:
-; CHECK: shift3a:
+; CHECK-LABEL: shift3a:
; CHECK: psrlw
%lshr = lshr <8 x i16> %val, < i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5 >
store <8 x i16> %lshr, <8 x i16>* %dst
@@ -60,7 +60,7 @@ entry:
; properly zero extend the shift amount
define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind {
entry:
-; CHECK: shift3b:
+; CHECK-LABEL: shift3b:
; CHECK: movzwl
; CHECK: movd
; CHECK: psrlw
Modified: llvm/trunk/test/CodeGen/X86/vshift-3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vshift-3.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vshift-3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vshift-3.ll Sun Jul 14 01:24:09 2013
@@ -8,7 +8,7 @@
; shift1a can't use a packed shift
define void @shift1a(<2 x i64> %val, <2 x i64>* %dst) nounwind {
entry:
-; CHECK: shift1a:
+; CHECK-LABEL: shift1a:
; CHECK: sarl
%ashr = ashr <2 x i64> %val, < i64 32, i64 32 >
store <2 x i64> %ashr, <2 x i64>* %dst
@@ -17,7 +17,7 @@ entry:
define void @shift2a(<4 x i32> %val, <4 x i32>* %dst) nounwind {
entry:
-; CHECK: shift2a:
+; CHECK-LABEL: shift2a:
; CHECK: psrad $5
%ashr = ashr <4 x i32> %val, < i32 5, i32 5, i32 5, i32 5 >
store <4 x i32> %ashr, <4 x i32>* %dst
@@ -26,7 +26,7 @@ entry:
define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind {
entry:
-; CHECK: shift2b:
+; CHECK-LABEL: shift2b:
; CHECK: movd
; CHECK: psrad
%0 = insertelement <4 x i32> undef, i32 %amt, i32 0
@@ -40,7 +40,7 @@ entry:
define void @shift3a(<8 x i16> %val, <8 x i16>* %dst) nounwind {
entry:
-; CHECK: shift3a:
+; CHECK-LABEL: shift3a:
; CHECK: psraw $5
%ashr = ashr <8 x i16> %val, < i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5 >
store <8 x i16> %ashr, <8 x i16>* %dst
@@ -49,7 +49,7 @@ entry:
define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind {
entry:
-; CHECK: shift3b:
+; CHECK-LABEL: shift3b:
; CHECK: movzwl
; CHECK: movd
; CHECK: psraw
Modified: llvm/trunk/test/CodeGen/X86/vshift-4.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vshift-4.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vshift-4.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vshift-4.ll Sun Jul 14 01:24:09 2013
@@ -5,7 +5,7 @@
define void @shift1a(<2 x i64> %val, <2 x i64>* %dst, <2 x i64> %sh) nounwind {
entry:
-; CHECK: shift1a:
+; CHECK-LABEL: shift1a:
; CHECK: psllq
%shamt = shufflevector <2 x i64> %sh, <2 x i64> undef, <2 x i32> <i32 0, i32 0>
%shl = shl <2 x i64> %val, %shamt
@@ -16,7 +16,7 @@ entry:
; shift1b can't use a packed shift
define void @shift1b(<2 x i64> %val, <2 x i64>* %dst, <2 x i64> %sh) nounwind {
entry:
-; CHECK: shift1b:
+; CHECK-LABEL: shift1b:
; CHECK: shll
%shamt = shufflevector <2 x i64> %sh, <2 x i64> undef, <2 x i32> <i32 0, i32 1>
%shl = shl <2 x i64> %val, %shamt
@@ -26,7 +26,7 @@ entry:
define void @shift2a(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind {
entry:
-; CHECK: shift2a:
+; CHECK-LABEL: shift2a:
; CHECK: pslld
%shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
%shl = shl <4 x i32> %val, %shamt
@@ -36,7 +36,7 @@ entry:
define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind {
entry:
-; CHECK: shift2b:
+; CHECK-LABEL: shift2b:
; CHECK: pslld
%shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 1, i32 1>
%shl = shl <4 x i32> %val, %shamt
@@ -46,7 +46,7 @@ entry:
define void @shift2c(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind {
entry:
-; CHECK: shift2c:
+; CHECK-LABEL: shift2c:
; CHECK: pslld
%shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
%shl = shl <4 x i32> %val, %shamt
@@ -56,7 +56,7 @@ entry:
define void @shift3a(<8 x i16> %val, <8 x i16>* %dst, <8 x i16> %amt) nounwind {
entry:
-; CHECK: shift3a:
+; CHECK-LABEL: shift3a:
; CHECK: movzwl
; CHECK: psllw
%shamt = shufflevector <8 x i16> %amt, <8 x i16> undef, <8 x i32> <i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6>
@@ -67,7 +67,7 @@ entry:
define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind {
entry:
-; CHECK: shift3b:
+; CHECK-LABEL: shift3b:
; CHECK: movzwl
; CHECK: psllw
%0 = insertelement <8 x i16> undef, i16 %amt, i32 0
Modified: llvm/trunk/test/CodeGen/X86/vshift-5.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vshift-5.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vshift-5.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vshift-5.ll Sun Jul 14 01:24:09 2013
@@ -4,7 +4,7 @@
define void @shift5a(<4 x i32> %val, <4 x i32>* %dst, i32* %pamt) nounwind {
entry:
-; CHECK: shift5a:
+; CHECK-LABEL: shift5a:
; CHECK: movd
; CHECK: pslld
%amt = load i32* %pamt
@@ -18,7 +18,7 @@ entry:
define void @shift5b(<4 x i32> %val, <4 x i32>* %dst, i32* %pamt) nounwind {
entry:
-; CHECK: shift5b:
+; CHECK-LABEL: shift5b:
; CHECK: movd
; CHECK: psrad
%amt = load i32* %pamt
@@ -32,7 +32,7 @@ entry:
define void @shift5c(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind {
entry:
-; CHECK: shift5c:
+; CHECK-LABEL: shift5c:
; CHECK: movd
; CHECK: pslld
%tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0
@@ -45,7 +45,7 @@ entry:
define void @shift5d(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind {
entry:
-; CHECK: shift5d:
+; CHECK-LABEL: shift5d:
; CHECK: movd
; CHECK: psrad
%tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0
Modified: llvm/trunk/test/CodeGen/X86/widen_extract-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/widen_extract-1.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/widen_extract-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/widen_extract-1.ll Sun Jul 14 01:24:09 2013
@@ -3,7 +3,7 @@
define void @convert(<2 x double>* %dst.addr, <3 x double> %src) {
entry:
-; CHECK: convert:
+; CHECK-LABEL: convert:
; CHECK: unpcklpd {{%xmm[0-7]}}, {{%xmm[0-7]}}
; CHECK-NEXT: movapd
%val = shufflevector <3 x double> %src, <3 x double> undef, <2 x i32> < i32 0, i32 1>
Modified: llvm/trunk/test/CodeGen/X86/widen_load-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/widen_load-2.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/widen_load-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/widen_load-2.ll Sun Jul 14 01:24:09 2013
@@ -148,7 +148,7 @@ define void @add3i8(%i8vec3* nocapture s
ret void
}
-; CHECK: add31i8:
+; CHECK-LABEL: add31i8:
%i8vec31 = type <31 x i8>
define void @add31i8(%i8vec31* nocapture sret %ret, %i8vec31* %ap, %i8vec31* %bp) nounwind {
; CHECK: movdqa
Modified: llvm/trunk/test/CodeGen/X86/widen_shuffle-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/widen_shuffle-1.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/widen_shuffle-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/widen_shuffle-1.ll Sun Jul 14 01:24:09 2013
@@ -3,7 +3,7 @@
; widening shuffle v3float and then a add
define void @shuf(<3 x float>* %dst.addr, <3 x float> %src1,<3 x float> %src2) nounwind {
entry:
-; CHECK: shuf:
+; CHECK-LABEL: shuf:
; CHECK: extractps
; CHECK: extractps
%x = shufflevector <3 x float> %src1, <3 x float> %src2, <3 x i32> < i32 0, i32 1, i32 2>
@@ -17,7 +17,7 @@ entry:
; widening shuffle v3float with a different mask and then a add
define void @shuf2(<3 x float>* %dst.addr, <3 x float> %src1,<3 x float> %src2) nounwind {
entry:
-; CHECK: shuf2:
+; CHECK-LABEL: shuf2:
; CHECK: extractps
; CHECK: extractps
%x = shufflevector <3 x float> %src1, <3 x float> %src2, <3 x i32> < i32 0, i32 4, i32 2>
@@ -32,7 +32,7 @@ entry:
; opA with opB, the DAG will produce new operations with opA.
define void @shuf3(<4 x float> %tmp10, <4 x float> %vecinit15, <4 x float>* %dst) nounwind {
entry:
-; CHECK: shuf3:
+; CHECK-LABEL: shuf3:
; CHECK: shufps
%shuffle.i.i.i12 = shufflevector <4 x float> %tmp10, <4 x float> %vecinit15, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
%tmp25.i.i = shufflevector <4 x float> %shuffle.i.i.i12, <4 x float> undef, <3 x i32> <i32 0, i32 1, i32 2>
@@ -52,7 +52,7 @@ entry:
; PR10421: make sure we correctly handle extreme widening with CONCAT_VECTORS
define <8 x i8> @shuf4(<4 x i8> %a, <4 x i8> %b) nounwind readnone {
-; CHECK: shuf4:
+; CHECK-LABEL: shuf4:
; CHECK-NOT: punpckldq
%vshuf = shufflevector <4 x i8> %a, <4 x i8> %b, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
ret <8 x i8> %vshuf
@@ -61,7 +61,7 @@ define <8 x i8> @shuf4(<4 x i8> %a, <4 x
; PR11389: another CONCAT_VECTORS case
define void @shuf5(<8 x i8>* %p) nounwind {
-; CHECK: shuf5:
+; CHECK-LABEL: shuf5:
%v = shufflevector <2 x i8> <i8 4, i8 33>, <2 x i8> undef, <8 x i32> <i32 1, i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
store <8 x i8> %v, <8 x i8>* %p, align 8
ret void
Modified: llvm/trunk/test/CodeGen/X86/win64_vararg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/win64_vararg.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/win64_vararg.ll (original)
+++ llvm/trunk/test/CodeGen/X86/win64_vararg.ll Sun Jul 14 01:24:09 2013
@@ -19,7 +19,7 @@ entry:
declare void @llvm.va_start(i8*) nounwind
-; CHECK: f5:
+; CHECK-LABEL: f5:
; CHECK: pushq
; CHECK: leaq 56(%rsp),
define i8* @f5(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, ...) nounwind {
@@ -30,7 +30,7 @@ entry:
ret i8* %ap1
}
-; CHECK: f4:
+; CHECK-LABEL: f4:
; CHECK: pushq
; CHECK: leaq 48(%rsp),
define i8* @f4(i64 %a0, i64 %a1, i64 %a2, i64 %a3, ...) nounwind {
@@ -41,7 +41,7 @@ entry:
ret i8* %ap1
}
-; CHECK: f3:
+; CHECK-LABEL: f3:
; CHECK: pushq
; CHECK: leaq 40(%rsp),
define i8* @f3(i64 %a0, i64 %a1, i64 %a2, ...) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/x86-64-and-mask.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-64-and-mask.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x86-64-and-mask.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x86-64-and-mask.ll Sun Jul 14 01:24:09 2013
@@ -14,7 +14,7 @@ entry:
}
; This copy can't be coalesced away because it needs the implicit zero-extend.
-; CHECK: bbb:
+; CHECK-LABEL: bbb:
; CHECK: movl %edi, %edi
define void @bbb(i64 %x) nounwind {
@@ -26,7 +26,7 @@ define void @bbb(i64 %x) nounwind {
; This should use a 32-bit and with implicit zero-extension, not a 64-bit and
; with a separate mov to materialize the mask.
; rdar://7527390
-; CHECK: ccc:
+; CHECK-LABEL: ccc:
; CHECK: andl $-1048593, %edi
declare void @foo(i64 %x) nounwind
@@ -38,7 +38,7 @@ define void @ccc(i64 %x) nounwind {
}
; This requires a mov and a 64-bit and.
-; CHECK: ddd:
+; CHECK-LABEL: ddd:
; CHECK: movabsq $4294967296, %r
; CHECK: andq %rax, %rdi
Modified: llvm/trunk/test/CodeGen/X86/x86-64-sret-return.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-64-sret-return.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x86-64-sret-return.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x86-64-sret-return.ll Sun Jul 14 01:24:09 2013
@@ -4,11 +4,11 @@
%struct.foo = type { [4 x i64] }
-; CHECK: bar:
+; CHECK-LABEL: bar:
; CHECK: movq %rdi, %rax
; For the x32 ABI, pointers are 32-bit so 32-bit instructions will be used
-; X32ABI: bar:
+; X32ABI-LABEL: bar:
; X32ABI: movl %edi, %eax
define void @bar(%struct.foo* noalias sret %agg.result, %struct.foo* %d) nounwind {
@@ -60,11 +60,11 @@ return: ; preds = %entry
ret void
}
-; CHECK: foo:
+; CHECK-LABEL: foo:
; CHECK: movq %rdi, %rax
; For the x32 ABI, pointers are 32-bit so 32-bit instructions will be used
-; X32ABI: foo:
+; X32ABI-LABEL: foo:
; X32ABI: movl %edi, %eax
define void @foo({ i64 }* noalias nocapture sret %agg.result) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/x86-shifts.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-shifts.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x86-shifts.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x86-shifts.ll Sun Jul 14 01:24:09 2013
@@ -156,7 +156,7 @@ entry:
define <16 x i8> @shl9(<16 x i8> %A) nounwind {
%B = shl <16 x i8> %A, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>
ret <16 x i8> %B
-; CHECK: shl9:
+; CHECK-LABEL: shl9:
; CHECK: psllw $3
; CHECK: pand
; CHECK: ret
@@ -165,7 +165,7 @@ define <16 x i8> @shl9(<16 x i8> %A) nou
define <16 x i8> @shr9(<16 x i8> %A) nounwind {
%B = lshr <16 x i8> %A, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>
ret <16 x i8> %B
-; CHECK: shr9:
+; CHECK-LABEL: shr9:
; CHECK: psrlw $3
; CHECK: pand
; CHECK: ret
@@ -174,7 +174,7 @@ define <16 x i8> @shr9(<16 x i8> %A) nou
define <16 x i8> @sra_v16i8_7(<16 x i8> %A) nounwind {
%B = ashr <16 x i8> %A, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
ret <16 x i8> %B
-; CHECK: sra_v16i8_7:
+; CHECK-LABEL: sra_v16i8_7:
; CHECK: pxor
; CHECK: pcmpgtb
; CHECK: ret
@@ -183,7 +183,7 @@ define <16 x i8> @sra_v16i8_7(<16 x i8>
define <16 x i8> @sra_v16i8(<16 x i8> %A) nounwind {
%B = ashr <16 x i8> %A, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>
ret <16 x i8> %B
-; CHECK: sra_v16i8:
+; CHECK-LABEL: sra_v16i8:
; CHECK: psrlw $3
; CHECK: pand
; CHECK: pxor
Modified: llvm/trunk/test/CodeGen/X86/xmulo.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/xmulo.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/xmulo.ll (original)
+++ llvm/trunk/test/CodeGen/X86/xmulo.ll Sun Jul 14 01:24:09 2013
@@ -8,7 +8,7 @@ declare i32 @printf(i8*, ...)
@.str = private unnamed_addr constant [10 x i8] c"%llx, %d\0A\00", align 1
define i32 @t1() nounwind {
-; CHECK: t1:
+; CHECK-LABEL: t1:
; CHECK: movl $0, 12(%esp)
; CHECK: movl $0, 8(%esp)
; CHECK: movl $72, 4(%esp)
@@ -22,7 +22,7 @@ define i32 @t1() nounwind {
}
define i32 @t2() nounwind {
-; CHECK: t2:
+; CHECK-LABEL: t2:
; CHECK: movl $0, 12(%esp)
; CHECK: movl $0, 8(%esp)
; CHECK: movl $0, 4(%esp)
@@ -36,7 +36,7 @@ define i32 @t2() nounwind {
}
define i32 @t3() nounwind {
-; CHECK: t3:
+; CHECK-LABEL: t3:
; CHECK: movl $1, 12(%esp)
; CHECK: movl $-1, 8(%esp)
; CHECK: movl $-9, 4(%esp)
Modified: llvm/trunk/test/CodeGen/X86/xor-icmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/xor-icmp.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/xor-icmp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/xor-icmp.ll Sun Jul 14 01:24:09 2013
@@ -4,14 +4,14 @@
define i32 @t(i32 %a, i32 %b) nounwind ssp {
entry:
-; X32: t:
+; X32-LABEL: t:
; X32: xorb
; X32-NOT: andb
; X32-NOT: shrb
; X32: testb $64
; X32: je
-; X64: t:
+; X64-LABEL: t:
; X64-NOT: setne
; X64: xorl
; X64: testb $64
@@ -37,7 +37,7 @@ declare i32 @foo(...)
declare i32 @bar(...)
define i32 @t2(i32 %x, i32 %y) nounwind ssp {
-; X32: t2:
+; X32-LABEL: t2:
; X32: cmpl
; X32: sete
; X32: cmpl
@@ -45,7 +45,7 @@ define i32 @t2(i32 %x, i32 %y) nounwind
; X32-NOT: xor
; X32: je
-; X64: t2:
+; X64-LABEL: t2:
; X64: testl
; X64: sete
; X64: testl
Modified: llvm/trunk/test/CodeGen/X86/zero-remat.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/zero-remat.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/zero-remat.ll (original)
+++ llvm/trunk/test/CodeGen/X86/zero-remat.ll Sun Jul 14 01:24:09 2013
@@ -11,12 +11,12 @@ define double @foo() nounwind {
call void @bar(double 0.0)
ret double 0.0
-;CHECK-32: foo:
+;CHECK-32-LABEL: foo:
;CHECK-32: call
;CHECK-32: fldz
;CHECK-32: ret
-;CHECK-64: foo:
+;CHECK-64-LABEL: foo:
;CHECK-64: xorps
;CHECK-64: call
;CHECK-64: xorps
@@ -28,12 +28,12 @@ define float @foof() nounwind {
call void @barf(float 0.0)
ret float 0.0
-;CHECK-32: foof:
+;CHECK-32-LABEL: foof:
;CHECK-32: call
;CHECK-32: fldz
;CHECK-32: ret
-;CHECK-64: foof:
+;CHECK-64-LABEL: foof:
;CHECK-64: xorps
;CHECK-64: call
;CHECK-64: xorps
Modified: llvm/trunk/test/CodeGen/X86/zext-extract_subreg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/zext-extract_subreg.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/zext-extract_subreg.ll (original)
+++ llvm/trunk/test/CodeGen/X86/zext-extract_subreg.ll Sun Jul 14 01:24:09 2013
@@ -1,7 +1,7 @@
; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
define void @t() nounwind ssp {
-; CHECK: t:
+; CHECK-LABEL: t:
entry:
br i1 undef, label %return, label %if.end.i
Modified: llvm/trunk/test/CodeGen/X86/zext-shl.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/zext-shl.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/zext-shl.ll (original)
+++ llvm/trunk/test/CodeGen/X86/zext-shl.ll Sun Jul 14 01:24:09 2013
@@ -2,7 +2,7 @@
define i32 @t1(i8 zeroext %x) nounwind readnone ssp {
entry:
-; CHECK: t1:
+; CHECK-LABEL: t1:
; CHECK: shll
; CHECK-NOT: movzwl
; CHECK: ret
@@ -14,7 +14,7 @@ entry:
define i32 @t2(i8 zeroext %x) nounwind readnone ssp {
entry:
-; CHECK: t2:
+; CHECK-LABEL: t2:
; CHECK: shrl
; CHECK-NOT: movzwl
; CHECK: ret
Modified: llvm/trunk/test/CodeGen/X86/zext-trunc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/zext-trunc.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/zext-trunc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/zext-trunc.ll Sun Jul 14 01:24:09 2013
@@ -2,7 +2,7 @@
; rdar://7570931
define i64 @foo(i64 %a, i64 %b) nounwind {
-; CHECK: foo:
+; CHECK-LABEL: foo:
; CHECK: leal
; CHECK-NOT: movl
; CHECK: ret
Modified: llvm/trunk/test/CodeGen/XCore/2011-08-01-DynamicAllocBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/2011-08-01-DynamicAllocBug.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/2011-08-01-DynamicAllocBug.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/2011-08-01-DynamicAllocBug.ll Sun Jul 14 01:24:09 2013
@@ -13,7 +13,7 @@ allocas:
call void @llvm.stackrestore(i8* %0)
ret void
}
-; CHECK: f:
+; CHECK-LABEL: f:
; CHECK: ldaw [[REGISTER:r[0-9]+]], {{r[0-9]+}}[-r1]
; CHECK: set sp, [[REGISTER]]
; CHECK: extsp 1
Modified: llvm/trunk/test/CodeGen/XCore/2011-08-01-VarargsBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/2011-08-01-VarargsBug.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/2011-08-01-VarargsBug.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/2011-08-01-VarargsBug.ll Sun Jul 14 01:24:09 2013
@@ -1,7 +1,7 @@
; RUN: llc < %s -march=xcore | FileCheck %s
define void @_Z1fz(...) {
entry:
-; CHECK: _Z1fz:
+; CHECK-LABEL: _Z1fz:
; CHECK: extsp 3
; CHECK: stw r[[REG:[0-3]{1,1}]]
; CHECK: , sp{{\[}}[[REG]]{{\]}}
Modified: llvm/trunk/test/CodeGen/XCore/addsub64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/addsub64.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/addsub64.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/addsub64.ll Sun Jul 14 01:24:09 2013
@@ -27,7 +27,7 @@ entry:
%3 = add i64 %2, %a
ret i64 %3
}
-; CHECK: maccu:
+; CHECK-LABEL: maccu:
; CHECK: maccu r1, r0, r3, r2
; CHECK-NEXT: retsp 0
@@ -39,7 +39,7 @@ entry:
%3 = add i64 %2, %a
ret i64 %3
}
-; CHECK: maccs:
+; CHECK-LABEL: maccs:
; CHECK: maccs r1, r0, r3, r2
; CHECK-NEXT: retsp 0
@@ -54,6 +54,6 @@ entry:
%6 = add i64 %5, %3
ret i64 %6
}
-; CHECK: lmul:
+; CHECK-LABEL: lmul:
; CHECK: lmul r1, r0, r1, r0, r2, r3
; CHECK-NEXT: retsp 0
Modified: llvm/trunk/test/CodeGen/XCore/aliases.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/aliases.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/aliases.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/aliases.ll Sun Jul 14 01:24:09 2013
@@ -7,7 +7,7 @@ declare void @a_val() nounwind
@b = alias i32* @b_val
@c = alias i32* @c_val
-; CHECK: a_addr:
+; CHECK-LABEL: a_addr:
; CHECK: ldap r11, a
; CHECK: retsp
define void ()* @a_addr() nounwind {
@@ -15,7 +15,7 @@ entry:
ret void ()* @a
}
-; CHECK: b_addr:
+; CHECK-LABEL: b_addr:
; CHECK: ldaw r11, cp[b]
; CHECK: retsp
define i32 *@b_addr() nounwind {
@@ -23,7 +23,7 @@ entry:
ret i32* @b
}
-; CHECK: c_addr:
+; CHECK-LABEL: c_addr:
; CHECK: ldaw r0, dp[c]
; CHECK: retsp
define i32 *@c_addr() nounwind {
Modified: llvm/trunk/test/CodeGen/XCore/ashr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/ashr.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/ashr.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/ashr.ll Sun Jul 14 01:24:09 2013
@@ -3,21 +3,21 @@ define i32 @ashr(i32 %a, i32 %b) {
%1 = ashr i32 %a, %b
ret i32 %1
}
-; CHECK: ashr:
+; CHECK-LABEL: ashr:
; CHECK-NEXT: ashr r0, r0, r1
define i32 @ashri1(i32 %a) {
%1 = ashr i32 %a, 24
ret i32 %1
}
-; CHECK: ashri1:
+; CHECK-LABEL: ashri1:
; CHECK-NEXT: ashr r0, r0, 24
define i32 @ashri2(i32 %a) {
%1 = ashr i32 %a, 31
ret i32 %1
}
-; CHECK: ashri2:
+; CHECK-LABEL: ashri2:
; CHECK-NEXT: ashr r0, r0, 32
define i32 @f1(i32 %a) {
@@ -28,7 +28,7 @@ less:
not_less:
ret i32 17
}
-; CHECK: f1:
+; CHECK-LABEL: f1:
; CHECK-NEXT: ashr r0, r0, 32
; CHECK-NEXT: bt r0
@@ -40,7 +40,7 @@ greater:
not_greater:
ret i32 17
}
-; CHECK: f2:
+; CHECK-LABEL: f2:
; CHECK-NEXT: ashr r0, r0, 32
; CHECK-NEXT: bt r0
@@ -49,7 +49,7 @@ define i32 @f3(i32 %a) {
%2 = select i1 %1, i32 10, i32 17
ret i32 %2
}
-; CHECK: f3:
+; CHECK-LABEL: f3:
; CHECK-NEXT: ashr r0, r0, 32
; CHECK-NEXT: bt r0
; CHECK-NEXT: ldc r0, 17
@@ -60,7 +60,7 @@ define i32 @f4(i32 %a) {
%2 = select i1 %1, i32 10, i32 17
ret i32 %2
}
-; CHECK: f4:
+; CHECK-LABEL: f4:
; CHECK-NEXT: ashr r0, r0, 32
; CHECK-NEXT: bt r0
; CHECK-NEXT: ldc r0, 10
@@ -71,6 +71,6 @@ define i32 @f5(i32 %a) {
%2 = zext i1 %1 to i32
ret i32 %2
}
-; CHECK: f5:
+; CHECK-LABEL: f5:
; CHECK-NEXT: ashr r0, r0, 32
; CHECK-NEXT: eq r0, r0, 0
Modified: llvm/trunk/test/CodeGen/XCore/bigstructret.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/bigstructret.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/bigstructret.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/bigstructret.ll Sun Jul 14 01:24:09 2013
@@ -12,7 +12,7 @@ entry:
%3 = insertvalue %0 %2, i32 24601, 3
ret %0 %3
}
-; CHECK: ReturnBigStruct:
+; CHECK-LABEL: ReturnBigStruct:
; CHECK: ldc r0, 12
; CHECK: ldc r1, 24
; CHECK: ldc r2, 48
@@ -29,7 +29,7 @@ entry:
%4 = insertvalue %1 %3, i32 4321, 4
ret %1 %4
}
-; CHECK: ReturnBigStruct2:
+; CHECK-LABEL: ReturnBigStruct2:
; CHECK: ldc r1, 4321
; CHECK: stw r1, r0[4]
; CHECK: ldc r1, 24601
Modified: llvm/trunk/test/CodeGen/XCore/constants.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/constants.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/constants.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/constants.ll Sun Jul 14 01:24:09 2013
@@ -3,7 +3,7 @@
; CHECK: .section .cp.rodata.cst4,"aMc", at progbits,4
; CHECK: .LCPI0_0:
; CHECK: .long 12345678
-; CHECK: f:
+; CHECK-LABEL: f:
; CHECK: ldw r0, cp[.LCPI0_0]
define i32 @f() {
entry:
@@ -12,7 +12,7 @@ entry:
define i32 @g() {
entry:
-; CHECK: g:
+; CHECK-LABEL: g:
; CHECK: mkmsk r0, 1
; CHECK: retsp 0
ret i32 1;
Modified: llvm/trunk/test/CodeGen/XCore/events.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/events.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/events.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/events.ll Sun Jul 14 01:24:09 2013
@@ -6,7 +6,7 @@ declare i8* @llvm.xcore.checkevent(i8*)
declare void @llvm.xcore.clre()
define i32 @f(i8 addrspace(1)* %r) nounwind {
-; CHECK: f:
+; CHECK-LABEL: f:
entry:
; CHECK: clre
call void @llvm.xcore.clre()
@@ -25,7 +25,7 @@ ret:
}
define i32 @g(i8 addrspace(1)* %r) nounwind {
-; CHECK: g:
+; CHECK-LABEL: g:
entry:
; CHECK: clre
call void @llvm.xcore.clre()
Modified: llvm/trunk/test/CodeGen/XCore/float-intrinsics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/float-intrinsics.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/float-intrinsics.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/float-intrinsics.ll Sun Jul 14 01:24:09 2013
@@ -11,7 +11,7 @@ declare double @llvm.sin.f64(double)
declare double @llvm.sqrt.f64(double)
define double @cos(double %F) {
-; CHECK: cos:
+; CHECK-LABEL: cos:
; CHECK: bl cos
%result = call double @llvm.cos.f64(double %F)
ret double %result
@@ -19,7 +19,7 @@ define double @cos(double %F) {
declare float @llvm.cos.f32(float)
-; CHECK: cosf:
+; CHECK-LABEL: cosf:
; CHECK: bl cosf
define float @cosf(float %F) {
%result = call float @llvm.cos.f32(float %F)
@@ -27,7 +27,7 @@ define float @cosf(float %F) {
}
define double @exp(double %F) {
-; CHECK: exp:
+; CHECK-LABEL: exp:
; CHECK: bl exp
%result = call double @llvm.exp.f64(double %F)
ret double %result
@@ -36,14 +36,14 @@ define double @exp(double %F) {
declare float @llvm.exp.f32(float)
define float @expf(float %F) {
-; CHECK: expf:
+; CHECK-LABEL: expf:
; CHECK: bl expf
%result = call float @llvm.exp.f32(float %F)
ret float %result
}
define double @exp2(double %F) {
-; CHECK: exp2:
+; CHECK-LABEL: exp2:
; CHECK: bl exp2
%result = call double @llvm.exp2.f64(double %F)
ret double %result
@@ -52,14 +52,14 @@ define double @exp2(double %F) {
declare float @llvm.exp2.f32(float)
define float @exp2f(float %F) {
-; CHECK: exp2f:
+; CHECK-LABEL: exp2f:
; CHECK: bl exp2f
%result = call float @llvm.exp2.f32(float %F)
ret float %result
}
define double @log(double %F) {
-; CHECK: log:
+; CHECK-LABEL: log:
; CHECK: bl log
%result = call double @llvm.log.f64(double %F)
ret double %result
@@ -68,14 +68,14 @@ define double @log(double %F) {
declare float @llvm.log.f32(float)
define float @logf(float %F) {
-; CHECK: logf:
+; CHECK-LABEL: logf:
; CHECK: bl logf
%result = call float @llvm.log.f32(float %F)
ret float %result
}
define double @log10(double %F) {
-; CHECK: log10:
+; CHECK-LABEL: log10:
; CHECK: bl log10
%result = call double @llvm.log10.f64(double %F)
ret double %result
@@ -84,14 +84,14 @@ define double @log10(double %F) {
declare float @llvm.log10.f32(float)
define float @log10f(float %F) {
-; CHECK: log10f:
+; CHECK-LABEL: log10f:
; CHECK: bl log10f
%result = call float @llvm.log10.f32(float %F)
ret float %result
}
define double @log2(double %F) {
-; CHECK: log2:
+; CHECK-LABEL: log2:
; CHECK: bl log2
%result = call double @llvm.log2.f64(double %F)
ret double %result
@@ -100,14 +100,14 @@ define double @log2(double %F) {
declare float @llvm.log2.f32(float)
define float @log2f(float %F) {
-; CHECK: log2f:
+; CHECK-LABEL: log2f:
; CHECK: bl log2f
%result = call float @llvm.log2.f32(float %F)
ret float %result
}
define double @pow(double %F, double %power) {
-; CHECK: pow:
+; CHECK-LABEL: pow:
; CHECK: bl pow
%result = call double @llvm.pow.f64(double %F, double %power)
ret double %result
@@ -116,14 +116,14 @@ define double @pow(double %F, double %po
declare float @llvm.pow.f32(float, float)
define float @powf(float %F, float %power) {
-; CHECK: powf:
+; CHECK-LABEL: powf:
; CHECK: bl powf
%result = call float @llvm.pow.f32(float %F, float %power)
ret float %result
}
define double @powi(double %F, i32 %power) {
-; CHECK: powi:
+; CHECK-LABEL: powi:
; CHECK: bl __powidf2
%result = call double @llvm.powi.f64(double %F, i32 %power)
ret double %result
@@ -132,14 +132,14 @@ define double @powi(double %F, i32 %powe
declare float @llvm.powi.f32(float, i32)
define float @powif(float %F, i32 %power) {
-; CHECK: powif:
+; CHECK-LABEL: powif:
; CHECK: bl __powisf2
%result = call float @llvm.powi.f32(float %F, i32 %power)
ret float %result
}
define double @sin(double %F) {
-; CHECK: sin:
+; CHECK-LABEL: sin:
; CHECK: bl sin
%result = call double @llvm.sin.f64(double %F)
ret double %result
@@ -148,14 +148,14 @@ define double @sin(double %F) {
declare float @llvm.sin.f32(float)
define float @sinf(float %F) {
-; CHECK: sinf:
+; CHECK-LABEL: sinf:
; CHECK: bl sinf
%result = call float @llvm.sin.f32(float %F)
ret float %result
}
define double @sqrt(double %F) {
-; CHECK: sqrt:
+; CHECK-LABEL: sqrt:
; CHECK: bl sqrt
%result = call double @llvm.sqrt.f64(double %F)
ret double %result
@@ -164,7 +164,7 @@ define double @sqrt(double %F) {
declare float @llvm.sqrt.f32(float)
define float @sqrtf(float %F) {
-; CHECK: sqrtf:
+; CHECK-LABEL: sqrtf:
; CHECK: bl sqrtf
%result = call float @llvm.sqrt.f32(float %F)
ret float %result
Modified: llvm/trunk/test/CodeGen/XCore/globals.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/globals.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/globals.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/globals.ll Sun Jul 14 01:24:09 2013
@@ -2,21 +2,21 @@
define i32 *@addr_G1() {
entry:
-; CHECK: addr_G1:
+; CHECK-LABEL: addr_G1:
; CHECK: ldaw r0, dp[G1]
ret i32* @G1
}
define i32 *@addr_G2() {
entry:
-; CHECK: addr_G2:
+; CHECK-LABEL: addr_G2:
; CHECK: ldaw r0, dp[G2]
ret i32* @G2
}
define i32 *@addr_G3() {
entry:
-; CHECK: addr_G3:
+; CHECK-LABEL: addr_G3:
; CHECK: ldaw r11, cp[G3]
; CHECK: mov r0, r11
ret i32* @G3
@@ -24,14 +24,14 @@ entry:
define i32 **@addr_G4() {
entry:
-; CHECK: addr_G4:
+; CHECK-LABEL: addr_G4:
; CHECK: ldaw r0, dp[G4]
ret i32** @G4
}
define i32 **@addr_G5() {
entry:
-; CHECK: addr_G5:
+; CHECK-LABEL: addr_G5:
; CHECK: ldaw r11, cp[G5]
; CHECK: mov r0, r11
ret i32** @G5
@@ -39,14 +39,14 @@ entry:
define i32 **@addr_G6() {
entry:
-; CHECK: addr_G6:
+; CHECK-LABEL: addr_G6:
; CHECK: ldaw r0, dp[G6]
ret i32** @G6
}
define i32 **@addr_G7() {
entry:
-; CHECK: addr_G7:
+; CHECK-LABEL: addr_G7:
; CHECK: ldaw r11, cp[G7]
; CHECK: mov r0, r11
ret i32** @G7
@@ -54,7 +54,7 @@ entry:
define i32 *@addr_G8() {
entry:
-; CHECK: addr_G8:
+; CHECK-LABEL: addr_G8:
; CHECK: ldaw r0, dp[G8]
ret i32* @G8
}
Modified: llvm/trunk/test/CodeGen/XCore/indirectbr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/indirectbr.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/indirectbr.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/indirectbr.ll Sun Jul 14 01:24:09 2013
@@ -4,7 +4,7 @@
@C.0.2070 = private constant [5 x i8*] [i8* blockaddress(@foo, %L1), i8* blockaddress(@foo, %L2), i8* blockaddress(@foo, %L3), i8* blockaddress(@foo, %L4), i8* blockaddress(@foo, %L5)] ; <[5 x i8*]*> [#uses=1]
define internal i32 @foo(i32 %i) nounwind {
-; CHECK: foo:
+; CHECK-LABEL: foo:
entry:
%0 = load i8** @nextaddr, align 4 ; <i8*> [#uses=2]
%1 = icmp eq i8* %0, null ; <i1> [#uses=1]
Modified: llvm/trunk/test/CodeGen/XCore/ladd_lsub_combine.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/ladd_lsub_combine.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/ladd_lsub_combine.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/ladd_lsub_combine.ll Sun Jul 14 01:24:09 2013
@@ -8,7 +8,7 @@ entry:
%2 = add i64 %1, %0 ; <i64> [#uses=1]
ret i64 %2
}
-; CHECK: f1:
+; CHECK-LABEL: f1:
; CHECK: ldc r2, 0
; CHECK-NEXT: ladd r1, r0, r1, r0, r2
; CHECK-NEXT: retsp 0
@@ -21,7 +21,7 @@ entry:
%2 = sub i64 %1, %0 ; <i64> [#uses=1]
ret i64 %2
}
-; CHECK: f2:
+; CHECK-LABEL: f2:
; CHECK: ldc r2, 0
; CHECK-NEXT: lsub r1, r0, r1, r0, r2
; CHECK-NEXT: neg r1, r1
@@ -34,7 +34,7 @@ entry:
%1 = add i64 %x, %0 ; <i64> [#uses=1]
ret i64 %1
}
-; CHECK: f3:
+; CHECK-LABEL: f3:
; CHECK: ldc r3, 0
; CHECK-NEXT: ladd r2, r0, r0, r2, r3
; CHECK-NEXT: add r1, r1, r2
@@ -47,7 +47,7 @@ entry:
%1 = add i64 %0, %y ; <i64> [#uses=1]
ret i64 %1
}
-; CHECK: f4:
+; CHECK-LABEL: f4:
; CHECK: ldc r3, 0
; CHECK-NEXT: ladd r1, r0, r0, r1, r3
; CHECK-NEXT: add r1, r2, r1
@@ -60,7 +60,7 @@ entry:
%1 = sub i64 %x, %0 ; <i64> [#uses=1]
ret i64 %1
}
-; CHECK: f5:
+; CHECK-LABEL: f5:
; CHECK: ldc r3, 0
; CHECK-NEXT: lsub r2, r0, r0, r2, r3
; CHECK-NEXT: sub r1, r1, r2
Modified: llvm/trunk/test/CodeGen/XCore/licm-ldwcp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/licm-ldwcp.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/licm-ldwcp.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/licm-ldwcp.ll Sun Jul 14 01:24:09 2013
@@ -2,7 +2,7 @@
; MachineLICM should hoist the LDWCP out of the loop.
-; CHECK: f:
+; CHECK-LABEL: f:
; CHECK-NEXT: ldw [[REG:r[0-9]+]], cp[.LCPI0_0]
; CHECK-NEXT: .LBB0_1:
; CHECK-NEXT: stw [[REG]], r0[0]
Modified: llvm/trunk/test/CodeGen/XCore/load.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/load.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/load.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/load.ll Sun Jul 14 01:24:09 2013
@@ -2,7 +2,7 @@
define i32 @load32(i32* %p, i32 %offset) nounwind {
entry:
-; CHECK: load32:
+; CHECK-LABEL: load32:
; CHECK: ldw r0, r0[r1]
%0 = getelementptr i32* %p, i32 %offset
%1 = load i32* %0, align 4
@@ -11,7 +11,7 @@ entry:
define i32 @load32_imm(i32* %p) nounwind {
entry:
-; CHECK: load32_imm:
+; CHECK-LABEL: load32_imm:
; CHECK: ldw r0, r0[11]
%0 = getelementptr i32* %p, i32 11
%1 = load i32* %0, align 4
@@ -20,7 +20,7 @@ entry:
define i32 @load16(i16* %p, i32 %offset) nounwind {
entry:
-; CHECK: load16:
+; CHECK-LABEL: load16:
; CHECK: ld16s r0, r0[r1]
; CHECK-NOT: sext
%0 = getelementptr i16* %p, i32 %offset
@@ -31,7 +31,7 @@ entry:
define i32 @load8(i8* %p, i32 %offset) nounwind {
entry:
-; CHECK: load8:
+; CHECK-LABEL: load8:
; CHECK: ld8u r0, r0[r1]
; CHECK-NOT: zext
%0 = getelementptr i8* %p, i32 %offset
@@ -43,7 +43,7 @@ entry:
@GConst = external constant i32
define i32 @load_cp() nounwind {
entry:
-; CHECK: load_cp:
+; CHECK-LABEL: load_cp:
; CHECK: ldw r0, cp[GConst]
%0 = load i32* @GConst
ret i32 %0
Modified: llvm/trunk/test/CodeGen/XCore/misc-intrinsics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/misc-intrinsics.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/misc-intrinsics.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/misc-intrinsics.ll Sun Jul 14 01:24:09 2013
@@ -10,56 +10,56 @@ declare i32 @llvm.xcore.geted()
declare i32 @llvm.xcore.getet()
define i32 @bitrev(i32 %val) {
-; CHECK: bitrev:
+; CHECK-LABEL: bitrev:
; CHECK: bitrev r0, r0
%result = call i32 @llvm.xcore.bitrev(i32 %val)
ret i32 %result
}
define i32 @crc32(i32 %crc, i32 %data, i32 %poly) {
-; CHECK: crc32:
+; CHECK-LABEL: crc32:
; CHECK: crc32 r0, r1, r2
%result = call i32 @llvm.xcore.crc32(i32 %crc, i32 %data, i32 %poly)
ret i32 %result
}
define %0 @crc8(i32 %crc, i32 %data, i32 %poly) {
-; CHECK: crc8:
+; CHECK-LABEL: crc8:
; CHECK: crc8 r0, r1, r1, r2
%result = call %0 @llvm.xcore.crc8(i32 %crc, i32 %data, i32 %poly)
ret %0 %result
}
define i32 @zext(i32 %a, i32 %b) {
-; CHECK: zext:
+; CHECK-LABEL: zext:
; CHECK: zext r0, r1
%result = call i32 @llvm.xcore.zext(i32 %a, i32 %b)
ret i32 %result
}
define i32 @zexti(i32 %a) {
-; CHECK: zexti:
+; CHECK-LABEL: zexti:
; CHECK: zext r0, 4
%result = call i32 @llvm.xcore.zext(i32 %a, i32 4)
ret i32 %result
}
define i32 @sext(i32 %a, i32 %b) {
-; CHECK: sext:
+; CHECK-LABEL: sext:
; CHECK: sext r0, r1
%result = call i32 @llvm.xcore.sext(i32 %a, i32 %b)
ret i32 %result
}
define i32 @sexti(i32 %a) {
-; CHECK: sexti:
+; CHECK-LABEL: sexti:
; CHECK: sext r0, 4
%result = call i32 @llvm.xcore.sext(i32 %a, i32 4)
ret i32 %result
}
define i32 @geted() {
-; CHECK: geted:
+; CHECK-LABEL: geted:
; CHECK: get r11, ed
; CHECK-NEXT: mov r0, r11
%result = call i32 @llvm.xcore.geted()
@@ -67,7 +67,7 @@ define i32 @geted() {
}
define i32 @getet() {
-; CHECK: getet:
+; CHECK-LABEL: getet:
; CHECK: get r11, et
; CHECK-NEXT: mov r0, r11
%result = call i32 @llvm.xcore.getet()
Modified: llvm/trunk/test/CodeGen/XCore/mkmsk.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/mkmsk.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/mkmsk.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/mkmsk.ll Sun Jul 14 01:24:09 2013
@@ -1,7 +1,7 @@
; RUN: llc < %s -march=xcore | FileCheck %s
define i32 @f(i32) nounwind {
-; CHECK: f:
+; CHECK-LABEL: f:
; CHECK: mkmsk r0, r0
; CHECK-NEXT: retsp 0
entry:
Modified: llvm/trunk/test/CodeGen/XCore/mul64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/mul64.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/mul64.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/mul64.ll Sun Jul 14 01:24:09 2013
@@ -7,7 +7,7 @@ entry:
%2 = mul i64 %1, %0
ret i64 %2
}
-; CHECK: umul_lohi:
+; CHECK-LABEL: umul_lohi:
; CHECK: ldc [[REG:r[0-9]+]], 0
; CHECK-NEXT: lmul {{.*}}, [[REG]], [[REG]]
; CHECK-NEXT: retsp 0
@@ -19,7 +19,7 @@ entry:
%2 = mul i64 %1, %0
ret i64 %2
}
-; CHECK: smul_lohi:
+; CHECK-LABEL: smul_lohi:
; CHECK: ldc
; CHECK-NEXT: mov
; CHECK-NEXT: maccs
@@ -30,7 +30,7 @@ entry:
%0 = mul i64 %a, %b
ret i64 %0
}
-; CHECK: mul64:
+; CHECK-LABEL: mul64:
; CHECK: ldc
; CHECK-NEXT: lmul
; CHECK-NEXT: mul
@@ -42,7 +42,7 @@ entry:
%1 = mul i64 %a, %0
ret i64 %1
}
-; CHECK: mul64_2:
+; CHECK-LABEL: mul64_2:
; CHECK: ldc
; CHECK-NEXT: lmul
; CHECK-NEXT: mul
Modified: llvm/trunk/test/CodeGen/XCore/offset_folding.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/offset_folding.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/offset_folding.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/offset_folding.ll Sun Jul 14 01:24:09 2013
@@ -5,7 +5,7 @@
define i32 *@f1() nounwind {
entry:
-; CHECK: f1:
+; CHECK-LABEL: f1:
; CHECK: ldaw r11, cp[a+4]
; CHECK: mov r0, r11
%0 = getelementptr [0 x i32]* @a, i32 0, i32 1
@@ -14,7 +14,7 @@ entry:
define i32 *@f2() nounwind {
entry:
-; CHECK: f2:
+; CHECK-LABEL: f2:
; CHECK: ldaw r0, dp[b+4]
%0 = getelementptr [0 x i32]* @b, i32 0, i32 1
ret i32* %0
@@ -25,7 +25,7 @@ entry:
define i32 *@f3() nounwind {
entry:
-; CHECK: f3:
+; CHECK-LABEL: f3:
; CHECK: ldaw r11, cp[a]
; CHECK: sub r0, r11, 4
%0 = getelementptr [0 x i32]* @a, i32 0, i32 -1
@@ -34,7 +34,7 @@ entry:
define i32 *@f4() nounwind {
entry:
-; CHECK: f4:
+; CHECK-LABEL: f4:
; CHECK: ldaw [[REG:r[0-9]+]], dp[b]
; CHECK: sub r0, [[REG]], 4
%0 = getelementptr [0 x i32]* @b, i32 0, i32 -1
Modified: llvm/trunk/test/CodeGen/XCore/private.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/private.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/private.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/private.ll Sun Jul 14 01:24:09 2013
@@ -10,7 +10,7 @@ define private void @foo() {
@baz = private global i32 4
define i32 @bar() {
-; CHECK: bar:
+; CHECK-LABEL: bar:
; CHECK: bl .Lfoo
; CHECK: ldw r0, dp[.Lbaz]
call void @foo()
Modified: llvm/trunk/test/CodeGen/XCore/ps-intrinsics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/ps-intrinsics.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/ps-intrinsics.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/ps-intrinsics.ll Sun Jul 14 01:24:09 2013
@@ -3,7 +3,7 @@ declare i32 @llvm.xcore.getps(i32)
declare void @llvm.xcore.setps(i32, i32)
define i32 @getps(i32 %reg) nounwind {
-; CHECK: getps:
+; CHECK-LABEL: getps:
; CHECK: get r0, ps[r0]
%result = call i32 @llvm.xcore.getps(i32 %reg)
ret i32 %result
@@ -11,7 +11,7 @@ define i32 @getps(i32 %reg) nounwind {
define void @setps(i32 %reg, i32 %value) nounwind {
-; CHECK: setps:
+; CHECK-LABEL: setps:
; CHECK: set ps[r0], r1
call void @llvm.xcore.setps(i32 %reg, i32 %value)
ret void
Modified: llvm/trunk/test/CodeGen/XCore/resources.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/resources.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/resources.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/resources.ll Sun Jul 14 01:24:09 2013
@@ -29,147 +29,147 @@ declare i32 @llvm.xcore.peek.p1i8(i8 add
declare i32 @llvm.xcore.endin.p1i8(i8 addrspace(1)* %r)
define i8 addrspace(1)* @getr() {
-; CHECK: getr:
+; CHECK-LABEL: getr:
; CHECK: getr r0, 5
%result = call i8 addrspace(1)* @llvm.xcore.getr.p1i8(i32 5)
ret i8 addrspace(1)* %result
}
define void @freer(i8 addrspace(1)* %r) {
-; CHECK: freer:
+; CHECK-LABEL: freer:
; CHECK: freer res[r0]
call void @llvm.xcore.freer.p1i8(i8 addrspace(1)* %r)
ret void
}
define i32 @in(i8 addrspace(1)* %r) {
-; CHECK: in:
+; CHECK-LABEL: in:
; CHECK: in r0, res[r0]
%result = call i32 @llvm.xcore.in.p1i8(i8 addrspace(1)* %r)
ret i32 %result
}
define i32 @int(i8 addrspace(1)* %r) {
-; CHECK: int:
+; CHECK-LABEL: int:
; CHECK: int r0, res[r0]
%result = call i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
ret i32 %result
}
define i32 @inct(i8 addrspace(1)* %r) {
-; CHECK: inct:
+; CHECK-LABEL: inct:
; CHECK: inct r0, res[r0]
%result = call i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
ret i32 %result
}
define void @out(i8 addrspace(1)* %r, i32 %value) {
-; CHECK: out:
+; CHECK-LABEL: out:
; CHECK: out res[r0], r1
call void @llvm.xcore.out.p1i8(i8 addrspace(1)* %r, i32 %value)
ret void
}
define void @outt(i8 addrspace(1)* %r, i32 %value) {
-; CHECK: outt:
+; CHECK-LABEL: outt:
; CHECK: outt res[r0], r1
call void @llvm.xcore.outt.p1i8(i8 addrspace(1)* %r, i32 %value)
ret void
}
define void @outct(i8 addrspace(1)* %r, i32 %value) {
-; CHECK: outct:
+; CHECK-LABEL: outct:
; CHECK: outct res[r0], r1
call void @llvm.xcore.outct.p1i8(i8 addrspace(1)* %r, i32 %value)
ret void
}
define void @outcti(i8 addrspace(1)* %r) {
-; CHECK: outcti:
+; CHECK-LABEL: outcti:
; CHECK: outct res[r0], 11
call void @llvm.xcore.outct.p1i8(i8 addrspace(1)* %r, i32 11)
ret void
}
define void @chkct(i8 addrspace(1)* %r, i32 %value) {
-; CHECK: chkct:
+; CHECK-LABEL: chkct:
; CHECK: chkct res[r0], r1
call void @llvm.xcore.chkct.p1i8(i8 addrspace(1)* %r, i32 %value)
ret void
}
define void @chkcti(i8 addrspace(1)* %r) {
-; CHECK: chkcti:
+; CHECK-LABEL: chkcti:
; CHECK: chkct res[r0], 11
call void @llvm.xcore.chkct.p1i8(i8 addrspace(1)* %r, i32 11)
ret void
}
define void @setd(i8 addrspace(1)* %r, i32 %value) {
-; CHECK: setd:
+; CHECK-LABEL: setd:
; CHECK: setd res[r0], r1
call void @llvm.xcore.setd.p1i8(i8 addrspace(1)* %r, i32 %value)
ret void
}
define void @setc(i8 addrspace(1)* %r, i32 %value) {
-; CHECK: setc:
+; CHECK-LABEL: setc:
; CHECK: setc res[r0], r1
call void @llvm.xcore.setc.p1i8(i8 addrspace(1)* %r, i32 %value)
ret void
}
define void @setci(i8 addrspace(1)* %r) {
-; CHECK: setci:
+; CHECK-LABEL: setci:
; CHECK: setc res[r0], 2
call void @llvm.xcore.setc.p1i8(i8 addrspace(1)* %r, i32 2)
ret void
}
define i32 @inshr(i32 %value, i8 addrspace(1)* %r) {
-; CHECK: inshr:
+; CHECK-LABEL: inshr:
; CHECK: inshr r0, res[r1]
%result = call i32 @llvm.xcore.inshr.p1i8(i8 addrspace(1)* %r, i32 %value)
ret i32 %result
}
define i32 @outshr(i32 %value, i8 addrspace(1)* %r) {
-; CHECK: outshr:
+; CHECK-LABEL: outshr:
; CHECK: outshr res[r1], r0
%result = call i32 @llvm.xcore.outshr.p1i8(i8 addrspace(1)* %r, i32 %value)
ret i32 %result
}
define void @setpt(i8 addrspace(1)* %r, i32 %value) {
-; CHECK: setpt:
+; CHECK-LABEL: setpt:
; CHECK: setpt res[r0], r1
call void @llvm.xcore.setpt.p1i8(i8 addrspace(1)* %r, i32 %value)
ret void
}
define i32 @getts(i8 addrspace(1)* %r) {
-; CHECK: getts:
+; CHECK-LABEL: getts:
; CHECK: getts r0, res[r0]
%result = call i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
ret i32 %result
}
define void @syncr(i8 addrspace(1)* %r) {
-; CHECK: syncr:
+; CHECK-LABEL: syncr:
; CHECK: syncr res[r0]
call void @llvm.xcore.syncr.p1i8(i8 addrspace(1)* %r)
ret void
}
define void @settw(i8 addrspace(1)* %r, i32 %value) {
-; CHECK: settw:
+; CHECK-LABEL: settw:
; CHECK: settw res[r0], r1
call void @llvm.xcore.settw.p1i8(i8 addrspace(1)* %r, i32 %value)
ret void
}
define void @setv(i8 addrspace(1)* %r, i8* %p) {
-; CHECK: setv:
+; CHECK-LABEL: setv:
; CHECK: mov r11, r1
; CHECK-NEXT: setv res[r0], r11
call void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* %p)
@@ -177,7 +177,7 @@ define void @setv(i8 addrspace(1)* %r, i
}
define void @setev(i8 addrspace(1)* %r, i8* %p) {
-; CHECK: setev:
+; CHECK-LABEL: setev:
; CHECK: mov r11, r1
; CHECK-NEXT: setev res[r0], r11
call void @llvm.xcore.setev.p1i8(i8 addrspace(1)* %r, i8* %p)
@@ -185,7 +185,7 @@ define void @setev(i8 addrspace(1)* %r,
}
define void @eeu(i8 addrspace(1)* %r) {
-; CHECK: eeu:
+; CHECK-LABEL: eeu:
; CHECK: eeu res[r0]
call void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r)
ret void
@@ -213,14 +213,14 @@ define void @setpsc(i8 addrspace(1)* %r,
}
define i32 @peek(i8 addrspace(1)* %r) {
-; CHECK: peek:
+; CHECK-LABEL: peek:
; CHECK: peek r0, res[r0]
%result = call i32 @llvm.xcore.peek.p1i8(i8 addrspace(1)* %r)
ret i32 %result
}
define i32 @endin(i8 addrspace(1)* %r) {
-; CHECK: endin:
+; CHECK-LABEL: endin:
; CHECK: endin r0, res[r0]
%result = call i32 @llvm.xcore.endin.p1i8(i8 addrspace(1)* %r)
ret i32 %result
Modified: llvm/trunk/test/CodeGen/XCore/sext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/sext.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/sext.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/sext.ll Sun Jul 14 01:24:09 2013
@@ -4,7 +4,7 @@ define i32 @sext1(i32 %a) {
%2 = sext i1 %1 to i32
ret i32 %2
}
-; CHECK: sext1:
+; CHECK-LABEL: sext1:
; CHECK: sext r0, 1
define i32 @sext2(i32 %a) {
@@ -12,7 +12,7 @@ define i32 @sext2(i32 %a) {
%2 = sext i2 %1 to i32
ret i32 %2
}
-; CHECK: sext2:
+; CHECK-LABEL: sext2:
; CHECK: sext r0, 2
define i32 @sext8(i32 %a) {
@@ -20,7 +20,7 @@ define i32 @sext8(i32 %a) {
%2 = sext i8 %1 to i32
ret i32 %2
}
-; CHECK: sext8:
+; CHECK-LABEL: sext8:
; CHECK: sext r0, 8
define i32 @sext16(i32 %a) {
@@ -28,5 +28,5 @@ define i32 @sext16(i32 %a) {
%2 = sext i16 %1 to i32
ret i32 %2
}
-; CHECK: sext16:
+; CHECK-LABEL: sext16:
; CHECK: sext r0, 16
Modified: llvm/trunk/test/CodeGen/XCore/sr-intrinsics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/sr-intrinsics.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/sr-intrinsics.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/sr-intrinsics.ll Sun Jul 14 01:24:09 2013
@@ -3,7 +3,7 @@ declare void @llvm.xcore.setsr(i32)
declare void @llvm.xcore.clrsr(i32)
define void @setsr() nounwind {
-; CHECK: setsr:
+; CHECK-LABEL: setsr:
; CHECK: setsr 128
call void @llvm.xcore.setsr(i32 128)
ret void
@@ -11,7 +11,7 @@ define void @setsr() nounwind {
define void @clrsr() nounwind {
-; CHECK: clrsr:
+; CHECK-LABEL: clrsr:
; CHECK: clrsr 128
call void @llvm.xcore.clrsr(i32 128)
ret void
Modified: llvm/trunk/test/CodeGen/XCore/store.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/store.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/store.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/store.ll Sun Jul 14 01:24:09 2013
@@ -2,7 +2,7 @@
define void @store32(i32* %p, i32 %offset, i32 %val) nounwind {
entry:
-; CHECK: store32:
+; CHECK-LABEL: store32:
; CHECK: stw r2, r0[r1]
%0 = getelementptr i32* %p, i32 %offset
store i32 %val, i32* %0, align 4
@@ -11,7 +11,7 @@ entry:
define void @store32_imm(i32* %p, i32 %val) nounwind {
entry:
-; CHECK: store32_imm:
+; CHECK-LABEL: store32_imm:
; CHECK: stw r1, r0[11]
%0 = getelementptr i32* %p, i32 11
store i32 %val, i32* %0, align 4
@@ -20,7 +20,7 @@ entry:
define void @store16(i16* %p, i32 %offset, i16 %val) nounwind {
entry:
-; CHECK: store16:
+; CHECK-LABEL: store16:
; CHECK: st16 r2, r0[r1]
%0 = getelementptr i16* %p, i32 %offset
store i16 %val, i16* %0, align 2
@@ -29,7 +29,7 @@ entry:
define void @store8(i8* %p, i32 %offset, i8 %val) nounwind {
entry:
-; CHECK: store8:
+; CHECK-LABEL: store8:
; CHECK: st8 r2, r0[r1]
%0 = getelementptr i8* %p, i32 %offset
store i8 %val, i8* %0, align 1
Modified: llvm/trunk/test/CodeGen/XCore/threads.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/threads.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/threads.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/threads.ll Sun Jul 14 01:24:09 2013
@@ -11,56 +11,56 @@ declare void @llvm.xcore.initcp.p1i8(i8
declare void @llvm.xcore.initdp.p1i8(i8 addrspace(1)* %r, i8* %value)
define i8 addrspace(1)* @getst(i8 addrspace(1)* %r) {
-; CHECK: getst:
+; CHECK-LABEL: getst:
; CHECK: getst r0, res[r0]
%result = call i8 addrspace(1)* @llvm.xcore.getst.p1i8.p1i8(i8 addrspace(1)* %r)
ret i8 addrspace(1)* %result
}
define void @ssync() {
-; CHECK: ssync:
+; CHECK-LABEL: ssync:
; CHECK: ssync
call void @llvm.xcore.ssync()
ret void
}
define void @mjoin(i8 addrspace(1)* %r) {
-; CHECK: mjoin:
+; CHECK-LABEL: mjoin:
; CHECK: mjoin res[r0]
call void @llvm.xcore.mjoin.p1i8(i8 addrspace(1)* %r)
ret void
}
define void @initsp(i8 addrspace(1)* %t, i8* %src) {
-; CHECK: initsp:
+; CHECK-LABEL: initsp:
; CHECK: init t[r0]:sp, r1
call void @llvm.xcore.initsp.p1i8(i8 addrspace(1)* %t, i8* %src)
ret void
}
define void @initpc(i8 addrspace(1)* %t, i8* %src) {
-; CHECK: initpc:
+; CHECK-LABEL: initpc:
; CHECK: init t[r0]:pc, r1
call void @llvm.xcore.initpc.p1i8(i8 addrspace(1)* %t, i8* %src)
ret void
}
define void @initlr(i8 addrspace(1)* %t, i8* %src) {
-; CHECK: initlr:
+; CHECK-LABEL: initlr:
; CHECK: init t[r0]:lr, r1
call void @llvm.xcore.initlr.p1i8(i8 addrspace(1)* %t, i8* %src)
ret void
}
define void @initcp(i8 addrspace(1)* %t, i8* %src) {
-; CHECK: initcp:
+; CHECK-LABEL: initcp:
; CHECK: init t[r0]:cp, r1
call void @llvm.xcore.initcp.p1i8(i8 addrspace(1)* %t, i8* %src)
ret void
}
define void @initdp(i8 addrspace(1)* %t, i8* %src) {
-; CHECK: initdp:
+; CHECK-LABEL: initdp:
; CHECK: init t[r0]:dp, r1
call void @llvm.xcore.initdp.p1i8(i8 addrspace(1)* %t, i8* %src)
ret void
Modified: llvm/trunk/test/CodeGen/XCore/tls.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/tls.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/tls.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/tls.ll Sun Jul 14 01:24:09 2013
@@ -2,7 +2,7 @@
define i32 *@addr_G() {
entry:
-; CHECK: addr_G:
+; CHECK-LABEL: addr_G:
; CHECK: get r11, id
ret i32* @G
}
Modified: llvm/trunk/test/CodeGen/XCore/trampoline.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/trampoline.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/trampoline.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/trampoline.ll Sun Jul 14 01:24:09 2013
@@ -4,7 +4,7 @@
define void @f() nounwind {
entry:
-; CHECK: f:
+; CHECK-LABEL: f:
; CHECK: ldap r11, g.1101
; CHECK: stw r11, sp[7]
%TRAMP.23 = alloca [20 x i8], align 2
Modified: llvm/trunk/test/CodeGen/XCore/unaligned_load.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/unaligned_load.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/unaligned_load.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/unaligned_load.ll Sun Jul 14 01:24:09 2013
@@ -10,7 +10,7 @@ entry:
}
; Half word aligned load.
-; CHECK: align2:
+; CHECK-LABEL: align2:
; CHECK: ld16s
; CHECK: ld16s
; CHECK: or
@@ -23,7 +23,7 @@ entry:
@a = global [5 x i8] zeroinitializer, align 4
; Constant offset from word aligned base.
-; CHECK: align3:
+; CHECK-LABEL: align3:
; CHECK: ldw {{r[0-9]+}}, dp
; CHECK: ldw {{r[0-9]+}}, dp
; CHECK: or
Modified: llvm/trunk/test/CodeGen/XCore/unaligned_store.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/unaligned_store.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/unaligned_store.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/unaligned_store.ll Sun Jul 14 01:24:09 2013
@@ -1,7 +1,7 @@
; RUN: llc < %s -march=xcore | FileCheck %s
; Byte aligned store.
-; CHECK: align1:
+; CHECK-LABEL: align1:
; CHECK: bl __misaligned_store
define void @align1(i32* %p, i32 %val) nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/XCore/unaligned_store_combine.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/unaligned_store_combine.ll?rev=186280&r1=186279&r2=186280&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/unaligned_store_combine.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/unaligned_store_combine.ll Sun Jul 14 01:24:09 2013
@@ -4,7 +4,7 @@
; of size 8
define void @f(i64* %dst, i64* %src) nounwind {
entry:
-; CHECK: f:
+; CHECK-LABEL: f:
; CHECK: ldc r2, 8
; CHECK: bl memmove
%0 = load i64* %src, align 1
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