[llvm] r186178 - R600/SI: SI support for 64bit ConstantFP

[Benjamin Kramer]

On 12.07.2013, at 20:15, Tom Stellard <thomas.stellard at amd.com> wrote:

> Author: tstellar
> Date: Fri Jul 12 13:15:02 2013
> New Revision: 186178
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=186178&view=rev
> Log:
> R600/SI: SI support for 64bit ConstantFP
> 
> Patch by: Niels Ole Salscheider
> 
> Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
> 
> Added:
>    llvm/trunk/test/CodeGen/R600/fconst64.ll
> Modified:
>    llvm/trunk/lib/Target/R600/SIInstrInfo.td
>    llvm/trunk/lib/Target/R600/SIInstructions.td
> 
> Modified: llvm/trunk/lib/Target/R600/SIInstrInfo.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SIInstrInfo.td?rev=186178&r1=186177&r2=186178&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/R600/SIInstrInfo.td (original)
> +++ llvm/trunk/lib/Target/R600/SIInstrInfo.td Fri Jul 12 13:15:02 2013
> @@ -21,11 +21,23 @@ def LO32 : SDNodeXForm<imm, [{
>   return CurDAG->getTargetConstant(N->getZExtValue() & 0xffffffff, MVT::i32);
> }]>;
> 
> +def LO32f : SDNodeXForm<fpimm, [{
> +  uint64_t val = N->getValueAPF().bitcastToAPInt().getZExtValue() & 0xffffffff;
> +  float *fval = reinterpret_cast<float *>(&val);
> +  return CurDAG->getTargetConstantFP(*fval, MVT::f32);

This is a strict aliasing violation and adds an unnecessary float->double conversion. Can you just perform the arithmetic on the APInt, stash the result in a new APFloat and use that to create the constant?

- Ben

> +}]>;
> +
> // Transformation function, extract the upper 32bit of a 64bit immediate
> def HI32 : SDNodeXForm<imm, [{
>   return CurDAG->getTargetConstant(N->getZExtValue() >> 32, MVT::i32);
> }]>;
> 
> +def HI32f : SDNodeXForm<fpimm, [{
> +  uint64_t val = N->getValueAPF().bitcastToAPInt().getZExtValue() >> 32;
> +  float *fval = reinterpret_cast<float *>(&val);
> +  return CurDAG->getTargetConstantFP(*fval, MVT::f32);
> +}]>;
> +
> def IMM8bitDWORD : ImmLeaf <
>   i32, [{
>     return (Imm & ~0x3FC) == 0;
> 
> Modified: llvm/trunk/lib/Target/R600/SIInstructions.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SIInstructions.td?rev=186178&r1=186177&r2=186178&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/R600/SIInstructions.td (original)
> +++ llvm/trunk/lib/Target/R600/SIInstructions.td Fri Jul 12 13:15:02 2013
> @@ -1509,6 +1509,13 @@ def : Pat <
>     (S_MOV_B32 (i32 (HI32 imm:$imm))), sub1)
>> ;
> 
> +def : Pat <
> +  (f64 fpimm:$imm),
> +  (INSERT_SUBREG (INSERT_SUBREG (f64 (IMPLICIT_DEF)),
> +    (V_MOV_B32_e32 (f32 (LO32f fpimm:$imm))), sub0),
> +    (V_MOV_B32_e32 (f32 (HI32f fpimm:$imm))), sub1)
> +>;
> +
> /********** ===================== **********/
> /********** Interpolation Paterns **********/
> /********** ===================== **********/
> 
> Added: llvm/trunk/test/CodeGen/R600/fconst64.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fconst64.ll?rev=186178&view=auto
> ==============================================================================
> --- llvm/trunk/test/CodeGen/R600/fconst64.ll (added)
> +++ llvm/trunk/test/CodeGen/R600/fconst64.ll Fri Jul 12 13:15:02 2013
> @@ -0,0 +1,12 @@
> +; RUN: llc < %s -march=r600 -mcpu=tahiti | FileCheck %s
> +
> +; CHECK: @fconst_f64
> +; CHECK: V_MOV_B32_e32 {{VGPR[0-9]+}}, 0.000000e+00
> +; CHECK-NEXT: V_MOV_B32_e32 {{VGPR[0-9]+}}, 2.312500e+00
> +
> +define void @fconst_f64(double addrspace(1)* %out, double addrspace(1)* %in) {
> +   %r1 = load double addrspace(1)* %in
> +   %r2 = fadd double %r1, 5.000000e+00
> +   store double %r2, double addrspace(1)* %out
> +   ret void
> +}
> 
> 
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