[llvm] r185794 - Fix PromoteIntRes_BUILD_VECTOR crash with i1 vectors
Hal Finkel
hfinkel at anl.gov
Sun Jul 7 23:16:58 PDT 2013
Author: hfinkel
Date: Mon Jul 8 01:16:58 2013
New Revision: 185794
URL: http://llvm.org/viewvc/llvm-project?rev=185794&view=rev
Log:
Fix PromoteIntRes_BUILD_VECTOR crash with i1 vectors
This fixes a bug (found by llvm-stress) in
DAGTypeLegalizer::PromoteIntRes_BUILD_VECTOR where it assumed that the result
type would always be larger than the original operands. This is not always
true, however, with boolean vectors. For example, promoting a node of type v8i1
(where the operands will be of type i32, the type to which i1 is promoted) will
yield a node with a result vector element type of i16 (and operands of type
i32). As a result, we cannot blindly assume that we can ANY_EXTEND the operands
to the result type.
Added:
llvm/trunk/test/CodeGen/PowerPC/bv-pres-v8i1.ll
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=185794&r1=185793&r2=185794&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Mon Jul 8 01:16:58 2013
@@ -2930,7 +2930,13 @@ SDValue DAGTypeLegalizer::PromoteIntRes_
SmallVector<SDValue, 8> Ops;
Ops.reserve(NumElems);
for (unsigned i = 0; i != NumElems; ++i) {
- SDValue Op = DAG.getNode(ISD::ANY_EXTEND, dl, NOutVTElem, N->getOperand(i));
+ SDValue Op;
+ // It is possible for the operands to be larger than the result, for example,
+ // when the operands are promoted booleans and the result was an i1 vector.
+ if (N->getOperand(i).getValueType().bitsLT(NOutVTElem))
+ Op = DAG.getNode(ISD::ANY_EXTEND, dl, NOutVTElem, N->getOperand(i));
+ else
+ Op = N->getOperand(i);
Ops.push_back(Op);
}
Added: llvm/trunk/test/CodeGen/PowerPC/bv-pres-v8i1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/bv-pres-v8i1.ll?rev=185794&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/bv-pres-v8i1.ll (added)
+++ llvm/trunk/test/CodeGen/PowerPC/bv-pres-v8i1.ll Mon Jul 8 01:16:58 2013
@@ -0,0 +1,39 @@
+; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s
+target triple = "powerpc64-unknown-linux-gnu"
+
+define void @autogen_SD70() {
+BB:
+ br label %CF78
+
+CF78: ; preds = %CF87, %CF78, %BB
+ br i1 undef, label %CF78, label %CF87
+
+CF87: ; preds = %CF78
+ %Cmp19 = icmp sge <8 x i1> zeroinitializer, zeroinitializer
+ %Cmp26 = icmp slt i32 -1, undef
+ br i1 %Cmp26, label %CF78, label %CF79
+
+CF79: ; preds = %CF79, %CF87
+ br i1 undef, label %CF79, label %CF82
+
+CF82: ; preds = %CF82, %CF79
+ br i1 undef, label %CF82, label %CF84
+
+CF84: ; preds = %CF82
+ br label %CF
+
+CF: ; preds = %CF88, %CF, %CF84
+ br i1 undef, label %CF, label %CF85
+
+CF85: ; preds = %CF85, %CF
+ %I52 = insertelement <8 x i1> %Cmp19, i1 %Cmp26, i32 6
+ %Cmp61 = icmp ult i32 477567, undef
+ br i1 %Cmp61, label %CF85, label %CF88
+
+CF88: ; preds = %CF85
+ %E63 = extractelement <8 x i1> %I52, i32 5
+ br i1 %E63, label %CF, label %CF80
+
+CF80: ; preds = %CF80, %CF88
+ br label %CF80
+}
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