[llvm] r185712 - ARM: Fix incorrect pack pattern

[Jim Grosbach]

Would we not also want to add a pattern which matches an arithmetic shift of [17..31]?

-Jim

On Jul 5, 2013, at 11:28 AM, Arnold Schwaighofer <aschwaighofer at apple.com> wrote:

> Author: arnolds
> Date: Fri Jul  5 13:28:39 2013
> New Revision: 185712
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=185712&view=rev
> Log:
> ARM: Fix incorrect pack pattern
> 
> A "pkhtb x, x, y asr #num" uses the lower 16 bits of "y asr #num" and packs them
> in the bottom half of "x". An arithmetic and logic shift are only equivalent in
> this context if the shift amount is 16. We would be shifting in ones into the
> bottom 16bits instead of zeros if "y" is negative.
> 
> radar://14338767
> 
> Modified:
>    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
>    llvm/trunk/test/CodeGen/ARM/pack.ll
> 
> Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=185712&r1=185711&r2=185712&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
> +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Fri Jul  5 13:28:39 2013
> @@ -4011,9 +4011,11 @@ def PKHTB : APKHI<0b01101000, 1, (outs G
> 
> // Alternate cases for PKHTB where identities eliminate some nodes.  Note that
> // a shift amount of 0 is *not legal* here, it is PKHBT instead.
> +// We also can not replace a srl (17..31) by an arithmetic shift we would use in
> +// pkhtb src1, src2, asr (17..31).
> def : ARMV6Pat<(or (and GPRnopc:$src1, 0xFFFF0000),
> -                   (srl GPRnopc:$src2, imm16_31:$sh)),
> -               (PKHTB GPRnopc:$src1, GPRnopc:$src2, imm16_31:$sh)>;
> +                   (srl GPRnopc:$src2, imm16:$sh)),
> +               (PKHTB GPRnopc:$src1, GPRnopc:$src2, imm16:$sh)>;
> def : ARMV6Pat<(or (and GPRnopc:$src1, 0xFFFF0000),
>                    (and (srl GPRnopc:$src2, imm1_15:$sh), 0xFFFF)),
>                (PKHTB GPRnopc:$src1, GPRnopc:$src2, imm1_15:$sh)>;
> 
> Modified: llvm/trunk/test/CodeGen/ARM/pack.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/pack.ll?rev=185712&r1=185711&r2=185712&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/ARM/pack.ll (original)
> +++ llvm/trunk/test/CodeGen/ARM/pack.ll Fri Jul  5 13:28:39 2013
> @@ -78,11 +78,24 @@ define i32 @test7(i32 %X, i32 %Y) {
> 	ret i32 %tmp57
> }
> 
> +; Arithmetic and logic right shift does not have the same semantics if shifting
> +; by more than 16 in this context.
> +
> ; CHECK: test8
> -; CHECK: pkhtb   r0, r0, r1, asr #22
> +; CHECK-NOT: pkhtb   r0, r0, r1, asr #22
> define i32 @test8(i32 %X, i32 %Y) {
> 	%tmp1 = and i32 %X, -65536
> 	%tmp3 = lshr i32 %Y, 22
> 	%tmp57 = or i32 %tmp3, %tmp1
> 	ret i32 %tmp57
> }
> +
> +; CHECK: test9:
> +; CHECK: pkhtb r0, r0, r1, asr #16
> +define i32 @test9(i32 %src1, i32 %src2) {
> +entry:
> +    %tmp = and i32 %src1, -65536
> +    %tmp2 = lshr i32 %src2, 16
> +    %tmp3 = or i32 %tmp, %tmp2
> +    ret i32 %tmp3
> +}
> 
> 
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