[llvm] r185700 - [PowerPC] Add some special @got at tprel fixup cases

[Ulrich Weigand]

Author: uweigand
Date: Fri Jul  5 08:49:46 2013
New Revision: 185700

URL: http://llvm.org/viewvc/llvm-project?rev=185700&view=rev
Log:

[PowerPC] Add some special @got at tprel fixup cases

When a target at got@tprel or target at got@tprel at l symbol variant is used in
a fixup_ppc_half16 (*not* fixup_ppc_half16ds) context, we currently fail,
since the corresponding R_PPC64_GOT_TPREL16 / R_PPC64_GOT_TPREL16_LO
relocation types do not exist.

However, since such symbol variants resolve to GOT offsets which are
always 4-aligned, we can simply instead use the _DS variants of the
relocation types, which *do* exist.

The same applies for the @got at dtprel variants.


Modified:
    llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
    llvm/trunk/test/MC/PowerPC/ppc64-fixups.s

Modified: llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp?rev=185700&r1=185699&r2=185700&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp Fri Jul  5 08:49:46 2013
@@ -228,9 +228,29 @@ unsigned PPCELFObjectWriter::getRelocTyp
       case MCSymbolRefExpr::VK_PPC_GOT_TLSLD_HA:
         Type = ELF::R_PPC64_GOT_TLSLD16_HA;
         break;
+      case MCSymbolRefExpr::VK_PPC_GOT_TPREL:
+        /* We don't have R_PPC64_GOT_TPREL16, but since GOT offsets
+           are always 4-aligned, we can use R_PPC64_GOT_TPREL16_DS.  */
+        Type = ELF::R_PPC64_GOT_TPREL16_DS;
+        break;
+      case MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO:
+        /* We don't have R_PPC64_GOT_TPREL16_LO, but since GOT offsets
+           are always 4-aligned, we can use R_PPC64_GOT_TPREL16_LO_DS.  */
+        Type = ELF::R_PPC64_GOT_TPREL16_LO_DS;
+        break;
       case MCSymbolRefExpr::VK_PPC_GOT_TPREL_HI:
         Type = ELF::R_PPC64_GOT_TPREL16_HI;
         break;
+      case MCSymbolRefExpr::VK_PPC_GOT_DTPREL:
+        /* We don't have R_PPC64_GOT_DTPREL16, but since GOT offsets
+           are always 4-aligned, we can use R_PPC64_GOT_DTPREL16_DS.  */
+        Type = ELF::R_PPC64_GOT_DTPREL16_DS;
+        break;
+      case MCSymbolRefExpr::VK_PPC_GOT_DTPREL_LO:
+        /* We don't have R_PPC64_GOT_DTPREL16_LO, but since GOT offsets
+           are always 4-aligned, we can use R_PPC64_GOT_DTPREL16_LO_DS.  */
+        Type = ELF::R_PPC64_GOT_DTPREL16_LO_DS;
+        break;
       case MCSymbolRefExpr::VK_PPC_GOT_TPREL_HA:
         Type = ELF::R_PPC64_GOT_TPREL16_HA;
         break;

Modified: llvm/trunk/test/MC/PowerPC/ppc64-fixups.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/ppc64-fixups.s?rev=185700&r1=185699&r2=185700&view=diff
==============================================================================
--- llvm/trunk/test/MC/PowerPC/ppc64-fixups.s (original)
+++ llvm/trunk/test/MC/PowerPC/ppc64-fixups.s Fri Jul  5 08:49:46 2013
@@ -318,6 +318,16 @@ base:
 # CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_HI target 0x0
          addis 3, 2, target at got@tprel at h
 
+# CHECK: addis 3, 2, target at got@tprel at l  # encoding: [0x3c,0x62,A,A]
+# CHECK-NEXT:                            #   fixup A - offset: 2, value: target at got@tprel at l, kind: fixup_ppc_half16
+# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_LO_DS target 0x0
+         addis 3, 2, target at got@tprel at l
+
+# CHECK: addis 3, 2, target at got@tprel    # encoding: [0x3c,0x62,A,A]
+# CHECK-NEXT:                            #   fixup A - offset: 2, value: target at got@tprel, kind: fixup_ppc_half16
+# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_DS target 0x0
+         addis 3, 2, target at got@tprel
+
 # CHECK: ld 1, target at got@tprel(3)       # encoding: [0xe8,0x23,A,0bAAAAAA00]
 # CHECK-NEXT:                            #   fixup A - offset: 2, value: target at got@tprel, kind: fixup_ppc_half16ds
 # CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_DS target 0x0
@@ -338,6 +348,16 @@ base:
 # CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_HI target 0x0
          addis 3, 2, target at got@dtprel at h
 
+# CHECK: addis 3, 2, target at got@dtprel at l # encoding: [0x3c,0x62,A,A]
+# CHECK-NEXT:                            #   fixup A - offset: 2, value: target at got@dtprel at l, kind: fixup_ppc_half16
+# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_LO_DS target 0x0
+         addis 3, 2, target at got@dtprel at l
+
+# CHECK: addis 3, 2, target at got@dtprel   # encoding: [0x3c,0x62,A,A]
+# CHECK-NEXT:                            #   fixup A - offset: 2, value: target at got@dtprel, kind: fixup_ppc_half16
+# CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_DS target 0x0
+         addis 3, 2, target at got@dtprel
+
 # CHECK: ld 1, target at got@dtprel(3)      # encoding: [0xe8,0x23,A,0bAAAAAA00]
 # CHECK-NEXT:                            #   fixup A - offset: 2, value: target at got@dtprel, kind: fixup_ppc_half16ds
 # CHECK-REL:                             0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_DS target 0x0