[llvm] r185526 - [SystemZ] Rename mapping table fields
Richard Sandiford
rsandifo at linux.vnet.ibm.com
Wed Jul 3 02:19:59 PDT 2013
Author: rsandifo
Date: Wed Jul 3 04:19:58 2013
New Revision: 185526
URL: http://llvm.org/viewvc/llvm-project?rev=185526&view=rev
Log:
[SystemZ] Rename mapping table fields
Rename Function->DispKey and PairType->DispSize. I'd originally used
"Function" because I thought it might be useful for other InstMappings.
However, it turns out that having two very similar instructions with the
same Function makes it pretty useless for anything other than the displacement
size key. Other InstMappings will want the key to be defined for only one
instruction in the pair.
No behavioural change intended.
Modified:
llvm/trunk/lib/Target/SystemZ/SystemZInstrFormats.td
llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td
Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZInstrFormats.td?rev=185526&r1=185525&r2=185526&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZInstrFormats.td (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZInstrFormats.td Wed Jul 3 04:19:58 2013
@@ -21,12 +21,12 @@ class InstSystemZ<int size, dag outs, da
let Pattern = pattern;
let AsmString = asmstr;
- // Used to identify a group of related instructions, such as ST and STY.
- string Function = "";
-
- // "12" for an instruction that has a ...Y equivalent, "20" for that
- // ...Y equivalent.
- string PairType = "none";
+ // Some instructions come in pairs, one having a 12-bit displacement
+ // and the other having a 20-bit displacement. Both instructions in
+ // the pair have the same DispKey and their DispSizes are "12" and "20"
+ // respectively.
+ string DispKey = "";
+ string DispSize = "none";
// True if this instruction is a simple D(X,B) load of a register
// (with no sign or zero extension).
@@ -61,8 +61,8 @@ class InstSystemZ<int size, dag outs, da
// displacement.
def getDisp12Opcode : InstrMapping {
let FilterClass = "InstSystemZ";
- let RowFields = ["Function"];
- let ColFields = ["PairType"];
+ let RowFields = ["DispKey"];
+ let ColFields = ["DispSize"];
let KeyCol = ["20"];
let ValueCols = [["12"]];
}
@@ -70,8 +70,8 @@ def getDisp12Opcode : InstrMapping {
// Return the version of an instruction that has a signed 20-bit displacement.
def getDisp20Opcode : InstrMapping {
let FilterClass = "InstSystemZ";
- let RowFields = ["Function"];
- let ColFields = ["PairType"];
+ let RowFields = ["DispKey"];
+ let ColFields = ["DispSize"];
let KeyCol = ["12"];
let ValueCols = [["20"]];
}
@@ -509,10 +509,10 @@ class StoreRXY<string mnemonic, bits<16>
multiclass StoreRXPair<string mnemonic, bits<8> rxOpcode, bits<16> rxyOpcode,
SDPatternOperator operator, RegisterOperand cls> {
- let Function = mnemonic ## #cls in {
- let PairType = "12" in
+ let DispKey = mnemonic ## #cls in {
+ let DispSize = "12" in
def "" : StoreRX<mnemonic, rxOpcode, operator, cls, bdxaddr12pair>;
- let PairType = "20" in
+ let DispSize = "20" in
def Y : StoreRXY<mnemonic#"y", rxyOpcode, operator, cls, bdxaddr20pair>;
}
}
@@ -549,10 +549,10 @@ class StoreSIL<string mnemonic, bits<16>
multiclass StoreSIPair<string mnemonic, bits<8> siOpcode, bits<16> siyOpcode,
SDPatternOperator operator, Immediate imm> {
- let Function = mnemonic in {
- let PairType = "12" in
+ let DispKey = mnemonic in {
+ let DispSize = "12" in
def "" : StoreSI<mnemonic, siOpcode, operator, imm, bdaddr12pair>;
- let PairType = "20" in
+ let DispSize = "20" in
def Y : StoreSIY<mnemonic#"y", siyOpcode, operator, imm, bdaddr20pair>;
}
}
@@ -624,10 +624,10 @@ class UnaryRXY<string mnemonic, bits<16>
multiclass UnaryRXPair<string mnemonic, bits<8> rxOpcode, bits<16> rxyOpcode,
SDPatternOperator operator, RegisterOperand cls> {
- let Function = mnemonic ## #cls in {
- let PairType = "12" in
+ let DispKey = mnemonic ## #cls in {
+ let DispSize = "12" in
def "" : UnaryRX<mnemonic, rxOpcode, operator, cls, bdxaddr12pair>;
- let PairType = "20" in
+ let DispSize = "20" in
def Y : UnaryRXY<mnemonic#"y", rxyOpcode, operator, cls, bdxaddr20pair>;
}
}
@@ -710,10 +710,10 @@ class BinaryRXY<string mnemonic, bits<16
multiclass BinaryRXPair<string mnemonic, bits<8> rxOpcode, bits<16> rxyOpcode,
SDPatternOperator operator, RegisterOperand cls,
SDPatternOperator load> {
- let Function = mnemonic ## #cls in {
- let PairType = "12" in
+ let DispKey = mnemonic ## #cls in {
+ let DispSize = "12" in
def "" : BinaryRX<mnemonic, rxOpcode, operator, cls, load, bdxaddr12pair>;
- let PairType = "20" in
+ let DispSize = "20" in
def Y : BinaryRXY<mnemonic#"y", rxyOpcode, operator, cls, load,
bdxaddr20pair>;
}
@@ -740,10 +740,10 @@ class BinarySIY<string mnemonic, bits<16
multiclass BinarySIPair<string mnemonic, bits<8> siOpcode,
bits<16> siyOpcode, SDPatternOperator operator,
Operand imm> {
- let Function = mnemonic ## #cls in {
- let PairType = "12" in
+ let DispKey = mnemonic ## #cls in {
+ let DispSize = "12" in
def "" : BinarySI<mnemonic, siOpcode, operator, imm, bdaddr12pair>;
- let PairType = "20" in
+ let DispSize = "20" in
def Y : BinarySIY<mnemonic#"y", siyOpcode, operator, imm, bdaddr20pair>;
}
}
@@ -829,11 +829,11 @@ class CompareRXY<string mnemonic, bits<1
multiclass CompareRXPair<string mnemonic, bits<8> rxOpcode, bits<16> rxyOpcode,
SDPatternOperator operator, RegisterOperand cls,
SDPatternOperator load> {
- let Function = mnemonic ## #cls in {
- let PairType = "12" in
+ let DispKey = mnemonic ## #cls in {
+ let DispSize = "12" in
def "" : CompareRX<mnemonic, rxOpcode, operator, cls,
load, bdxaddr12pair>;
- let PairType = "20" in
+ let DispSize = "20" in
def Y : CompareRXY<mnemonic#"y", rxyOpcode, operator, cls,
load, bdxaddr20pair>;
}
@@ -868,10 +868,10 @@ class CompareSIY<string mnemonic, bits<1
multiclass CompareSIPair<string mnemonic, bits<8> siOpcode, bits<16> siyOpcode,
SDPatternOperator operator, SDPatternOperator load,
Immediate imm> {
- let Function = mnemonic in {
- let PairType = "12" in
+ let DispKey = mnemonic in {
+ let DispSize = "12" in
def "" : CompareSI<mnemonic, siOpcode, operator, load, imm, bdaddr12pair>;
- let PairType = "20" in
+ let DispSize = "20" in
def Y : CompareSIY<mnemonic#"y", siyOpcode, operator, load, imm,
bdaddr20pair>;
}
@@ -922,10 +922,10 @@ class CmpSwapRSY<string mnemonic, bits<1
multiclass CmpSwapRSPair<string mnemonic, bits<8> rsOpcode, bits<16> rsyOpcode,
SDPatternOperator operator, RegisterOperand cls> {
- let Function = mnemonic ## #cls in {
- let PairType = "12" in
+ let DispKey = mnemonic ## #cls in {
+ let DispSize = "12" in
def "" : CmpSwapRS<mnemonic, rsOpcode, operator, cls, bdaddr12pair>;
- let PairType = "20" in
+ let DispSize = "20" in
def Y : CmpSwapRSY<mnemonic#"y", rsyOpcode, operator, cls, bdaddr20pair>;
}
}
Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td?rev=185526&r1=185525&r2=185526&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td Wed Jul 3 04:19:58 2013
@@ -424,12 +424,12 @@ def STRVG : StoreRXY<"strvg", 0xE32F, st
// Load BDX-style addresses.
let neverHasSideEffects = 1, isAsCheapAsAMove = 1, isReMaterializable = 1,
- Function = "la" in {
- let PairType = "12" in
+ DispKey = "la" in {
+ let DispSize = "12" in
def LA : InstRX<0x41, (outs GR64:$R1), (ins laaddr12pair:$XBD2),
"la\t$R1, $XBD2",
[(set GR64:$R1, laaddr12pair:$XBD2)]>;
- let PairType = "20" in
+ let DispSize = "20" in
def LAY : InstRXY<0xE371, (outs GR64:$R1), (ins laaddr20pair:$XBD2),
"lay\t$R1, $XBD2",
[(set GR64:$R1, laaddr20pair:$XBD2)]>;
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