[llvm] r184579 - [NVPTX] Add support for selecting CUDA vs OCL mode based on triple
Justin Holewinski
justin.holewinski at gmail.com
Fri Jun 21 15:19:21 PDT 2013
Also, this should be an issue with clang commit r184578, not LLVM commit
r184579.
On Fri, Jun 21, 2013 at 6:09 PM, Renato Golin <renato.golin at linaro.org>wrote:
> You just need to put that file into a target-specific directory, because
> the triple doesn't exist on all targets.
>
> cheers,
> --renato
>
>
> On 21 June 2013 23:05, Michael Gottesman <mgottesman at apple.com> wrote:
>
>> Renato,
>>
>> We are also running into buildbot issues that looks similar to your
>> error. (I am still looking).
>>
>> Michael
>>
>> On Jun 21, 2013, at 2:46 PM, Renato Golin <renato.golin at linaro.org>
>> wrote:
>>
>> Hi Justin,
>>
>> This commit is braking on ARM bots:
>>
>>
>> http://lab.llvm.org:8011/builders/clang-native-arm-cortex-a9/builds/8969/steps/check-all/logs/Clang%3A%3Anvptx-inlineasm-ptx.c
>>
>> cheers,
>> --renato
>>
>>
>>
>>
>> On 21 June 2013 19:51, Justin Holewinski <jholewinski at nvidia.com> wrote:
>>
>>> Author: jholewinski
>>> Date: Fri Jun 21 13:51:49 2013
>>> New Revision: 184579
>>>
>>> URL: http://llvm.org/viewvc/llvm-project?rev=184579&view=rev
>>> Log:
>>> [NVPTX] Add support for selecting CUDA vs OCL mode based on triple
>>>
>>> IR for CUDA should use "nvptx[64]-nvidia-cuda", and IR for NV OpenCL
>>> should use "nvptx[64]-nvidia-nvcl"
>>>
>>> Modified:
>>> llvm/trunk/include/llvm/ADT/Triple.h
>>> llvm/trunk/lib/Support/Triple.cpp
>>> llvm/trunk/lib/Target/NVPTX/NVPTX.h
>>> llvm/trunk/lib/Target/NVPTX/NVPTXSubtarget.cpp
>>> llvm/trunk/test/CodeGen/NVPTX/generic-to-nvvm.ll
>>> llvm/trunk/test/CodeGen/NVPTX/i1-global.ll
>>> llvm/trunk/test/CodeGen/NVPTX/i1-param.ll
>>> llvm/trunk/test/CodeGen/NVPTX/load-sext-i1.ll
>>> llvm/trunk/test/CodeGen/NVPTX/refl1.ll
>>>
>>> Modified: llvm/trunk/include/llvm/ADT/Triple.h
>>> URL:
>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/Triple.h?rev=184579&r1=184578&r2=184579&view=diff
>>>
>>> ==============================================================================
>>> --- llvm/trunk/include/llvm/ADT/Triple.h (original)
>>> +++ llvm/trunk/include/llvm/ADT/Triple.h Fri Jun 21 13:51:49 2013
>>> @@ -81,7 +81,8 @@ public:
>>> BGP,
>>> BGQ,
>>> Freescale,
>>> - IBM
>>> + IBM,
>>> + NVIDIA
>>> };
>>> enum OSType {
>>> UnknownOS,
>>> @@ -107,7 +108,9 @@ public:
>>> NaCl, // Native Client
>>> CNK, // BG/P Compute-Node Kernel
>>> Bitrig,
>>> - AIX
>>> + AIX,
>>> + CUDA, // NVIDIA CUDA
>>> + NVCL // NVIDIA OpenCL
>>> };
>>> enum EnvironmentType {
>>> UnknownEnvironment,
>>>
>>> Modified: llvm/trunk/lib/Support/Triple.cpp
>>> URL:
>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Triple.cpp?rev=184579&r1=184578&r2=184579&view=diff
>>>
>>> ==============================================================================
>>> --- llvm/trunk/lib/Support/Triple.cpp (original)
>>> +++ llvm/trunk/lib/Support/Triple.cpp Fri Jun 21 13:51:49 2013
>>> @@ -104,6 +104,7 @@ const char *Triple::getVendorTypeName(Ve
>>> case BGQ: return "bgq";
>>> case Freescale: return "fsl";
>>> case IBM: return "ibm";
>>> + case NVIDIA: return "nvidia";
>>> }
>>>
>>> llvm_unreachable("Invalid VendorType!");
>>> @@ -135,6 +136,8 @@ const char *Triple::getOSTypeName(OSType
>>> case CNK: return "cnk";
>>> case Bitrig: return "bitrig";
>>> case AIX: return "aix";
>>> + case CUDA: return "cuda";
>>> + case NVCL: return "nvcl";
>>> }
>>>
>>> llvm_unreachable("Invalid OSType");
>>> @@ -260,6 +263,7 @@ static Triple::VendorType parseVendor(St
>>> .Case("bgq", Triple::BGQ)
>>> .Case("fsl", Triple::Freescale)
>>> .Case("ibm", Triple::IBM)
>>> + .Case("nvidia", Triple::NVIDIA)
>>> .Default(Triple::UnknownVendor);
>>> }
>>>
>>> @@ -287,6 +291,8 @@ static Triple::OSType parseOS(StringRef
>>> .StartsWith("cnk", Triple::CNK)
>>> .StartsWith("bitrig", Triple::Bitrig)
>>> .StartsWith("aix", Triple::AIX)
>>> + .StartsWith("cuda", Triple::CUDA)
>>> + .StartsWith("nvcl", Triple::NVCL)
>>> .Default(Triple::UnknownOS);
>>> }
>>>
>>>
>>> Modified: llvm/trunk/lib/Target/NVPTX/NVPTX.h
>>> URL:
>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTX.h?rev=184579&r1=184578&r2=184579&view=diff
>>>
>>> ==============================================================================
>>> --- llvm/trunk/lib/Target/NVPTX/NVPTX.h (original)
>>> +++ llvm/trunk/lib/Target/NVPTX/NVPTX.h Fri Jun 21 13:51:49 2013
>>> @@ -77,8 +77,7 @@ extern Target TheNVPTXTarget64;
>>> namespace NVPTX {
>>> enum DrvInterface {
>>> NVCL,
>>> - CUDA,
>>> - TEST
>>> + CUDA
>>> };
>>>
>>> // A field inside TSFlags needs a shift and a mask. The usage is
>>>
>>> Modified: llvm/trunk/lib/Target/NVPTX/NVPTXSubtarget.cpp
>>> URL:
>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXSubtarget.cpp?rev=184579&r1=184578&r2=184579&view=diff
>>>
>>> ==============================================================================
>>> --- llvm/trunk/lib/Target/NVPTX/NVPTXSubtarget.cpp (original)
>>> +++ llvm/trunk/lib/Target/NVPTX/NVPTXSubtarget.cpp Fri Jun 21 13:51:49
>>> 2013
>>> @@ -19,23 +19,18 @@
>>>
>>> using namespace llvm;
>>>
>>> -// Select Driver Interface
>>> -#include "llvm/Support/CommandLine.h"
>>> -namespace {
>>> -cl::opt<NVPTX::DrvInterface> DriverInterface(
>>> - cl::desc("Choose driver interface:"),
>>> - cl::values(clEnumValN(NVPTX::NVCL, "drvnvcl", "Nvidia OpenCL
>>> driver"),
>>> - clEnumValN(NVPTX::CUDA, "drvcuda", "Nvidia CUDA driver"),
>>> - clEnumValN(NVPTX::TEST, "drvtest", "Plain Test"),
>>> clEnumValEnd),
>>> - cl::init(NVPTX::NVCL));
>>> -}
>>>
>>> NVPTXSubtarget::NVPTXSubtarget(const std::string &TT, const std::string
>>> &CPU,
>>> const std::string &FS, bool is64Bit)
>>> : NVPTXGenSubtargetInfo(TT, CPU, FS), Is64Bit(is64Bit),
>>> PTXVersion(0),
>>> SmVersion(20) {
>>>
>>> - drvInterface = DriverInterface;
>>> + Triple T(TT);
>>> +
>>> + if (T.getOS() == Triple::NVCL)
>>> + drvInterface = NVPTX::NVCL;
>>> + else
>>> + drvInterface = NVPTX::CUDA;
>>>
>>> // Provide the default CPU if none
>>> std::string defCPU = "sm_20";
>>>
>>> Modified: llvm/trunk/test/CodeGen/NVPTX/generic-to-nvvm.ll
>>> URL:
>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/NVPTX/generic-to-nvvm.ll?rev=184579&r1=184578&r2=184579&view=diff
>>>
>>> ==============================================================================
>>> --- llvm/trunk/test/CodeGen/NVPTX/generic-to-nvvm.ll (original)
>>> +++ llvm/trunk/test/CodeGen/NVPTX/generic-to-nvvm.ll Fri Jun 21 13:51:49
>>> 2013
>>> @@ -1,6 +1,7 @@
>>> -; RUN: llc < %s -march=nvptx -mcpu=sm_20 -drvcuda | FileCheck %s
>>> +; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
>>>
>>> target datalayout =
>>> "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
>>> +target triple = "nvptx-nvidia-cuda"
>>>
>>> ; Ensure global variables in address space 0 are promoted to address
>>> space 1
>>>
>>>
>>> Modified: llvm/trunk/test/CodeGen/NVPTX/i1-global.ll
>>> URL:
>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/NVPTX/i1-global.ll?rev=184579&r1=184578&r2=184579&view=diff
>>>
>>> ==============================================================================
>>> --- llvm/trunk/test/CodeGen/NVPTX/i1-global.ll (original)
>>> +++ llvm/trunk/test/CodeGen/NVPTX/i1-global.ll Fri Jun 21 13:51:49 2013
>>> @@ -1,7 +1,7 @@
>>> -; RUN: llc < %s -march=nvptx -mcpu=sm_20 -drvcuda | FileCheck %s
>>> +; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
>>>
>>> target datalayout =
>>> "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
>>> -
>>> +target triple = "nvptx-nvidia-cuda"
>>>
>>> ; CHECK: .visible .global .align 1 .u8 mypred
>>> @mypred = addrspace(1) global i1 true, align 1
>>>
>>> Modified: llvm/trunk/test/CodeGen/NVPTX/i1-param.ll
>>> URL:
>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/NVPTX/i1-param.ll?rev=184579&r1=184578&r2=184579&view=diff
>>>
>>> ==============================================================================
>>> --- llvm/trunk/test/CodeGen/NVPTX/i1-param.ll (original)
>>> +++ llvm/trunk/test/CodeGen/NVPTX/i1-param.ll Fri Jun 21 13:51:49 2013
>>> @@ -1,6 +1,7 @@
>>> -; RUN: llc < %s -march=nvptx -mcpu=sm_20 -drvcuda | FileCheck %s
>>> +; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
>>>
>>> target datalayout =
>>> "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
>>> +target triple = "nvptx-nvidia-cuda"
>>>
>>> ; Make sure predicate (i1) operands to kernels get expanded out to .u8
>>>
>>>
>>> Modified: llvm/trunk/test/CodeGen/NVPTX/load-sext-i1.ll
>>> URL:
>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/NVPTX/load-sext-i1.ll?rev=184579&r1=184578&r2=184579&view=diff
>>>
>>> ==============================================================================
>>> --- llvm/trunk/test/CodeGen/NVPTX/load-sext-i1.ll (original)
>>> +++ llvm/trunk/test/CodeGen/NVPTX/load-sext-i1.ll Fri Jun 21 13:51:49
>>> 2013
>>> @@ -1,7 +1,7 @@
>>> -; RUN: llc < %s -march=nvptx -mcpu=sm_20 -drvcuda | FileCheck %s
>>> +; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
>>>
>>> target datalayout =
>>> "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
>>> -
>>> +target triple = "nvptx-nvidia-cuda"
>>>
>>> define void @main(i1* %a1, i32 %a2, i32* %arg3) {
>>> ; CHECK: ld.u8
>>>
>>> Modified: llvm/trunk/test/CodeGen/NVPTX/refl1.ll
>>> URL:
>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/NVPTX/refl1.ll?rev=184579&r1=184578&r2=184579&view=diff
>>>
>>> ==============================================================================
>>> --- llvm/trunk/test/CodeGen/NVPTX/refl1.ll (original)
>>> +++ llvm/trunk/test/CodeGen/NVPTX/refl1.ll Fri Jun 21 13:51:49 2013
>>> @@ -1,4 +1,6 @@
>>> -; RUN: llc < %s -march=nvptx -mcpu=sm_20 -drvcuda | FileCheck %s
>>> +; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
>>> +
>>> +target triple = "nvptx-nvidia-cuda"
>>>
>>> ; Function Attrs: nounwind
>>> ; CHECK: .entry foo
>>>
>>>
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>>
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--
Thanks,
Justin Holewinski
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