[PATCH] [PATCH] ARM cdp2 invalid encoding

Renato Golin renato.golin at linaro.org
Thu Jun 20 06:53:30 PDT 2013


Hi Joey,

Can you elaborate on what "other" instructions use it?

cheers,
-renato


On 19 June 2013 15:04, Joey Gouly <joey.gouly at arm.com> wrote:

> This essentially reverts r155000.
> The restriction on the coprocessor number does actually exist for this
> instruction, as some new instructions use this encoding.
>
> http://llvm-reviews.chandlerc.com/D1008
>
> Files:
>   lib/Target/ARM/ARMInstrInfo.td
>   test/MC/ARM/basic-arm-instructions.s
>   test/MC/Disassembler/ARM/arm-tests.txt
>   test/MC/Disassembler/ARM/invalid-CDP2-arm.txt
>
> Index: lib/Target/ARM/ARMInstrInfo.td
> ===================================================================
> --- lib/Target/ARM/ARMInstrInfo.td
> +++ lib/Target/ARM/ARMInstrInfo.td
> @@ -1007,11 +1007,6 @@
>    let DecoderMethod = "DecodeCoprocessor";
>  }
>
> -def pf_imm : Operand<i32> {
> -  let PrintMethod = "printPImmediate";
> -  let ParserMatchClass = CoprocNumAsmOperand;
> -}
> -
>  def CoprocRegAsmOperand : AsmOperandClass {
>    let Name = "CoprocReg";
>    let ParserMethod = "parseCoprocRegOperand";
> @@ -4413,7 +4408,7 @@
>    let Inst{23-20} = opc1;
>  }
>
> -def CDP2 : ABXI<0b1110, (outs), (ins pf_imm:$cop, imm0_15:$opc1,
> +def CDP2 : ABXI<0b1110, (outs), (ins p_imm:$cop, imm0_15:$opc1,
>                 c_imm:$CRd, c_imm:$CRn, c_imm:$CRm, imm0_7:$opc2),
>                 NoItinerary, "cdp2\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2",
>                 [(int_arm_cdp2 imm:$cop, imm:$opc1, imm:$CRd, imm:$CRn,
> Index: test/MC/ARM/basic-arm-instructions.s
> ===================================================================
> --- test/MC/ARM/basic-arm-instructions.s
> +++ test/MC/ARM/basic-arm-instructions.s
> @@ -459,9 +459,11 @@
>
>  @------------------------------------------------------------------------------
>          cdp  p7, #1, c1, c1, c1, #4
>          cdp2  p7, #1, c1, c1, c1, #4
> +        cdp2   p10, #0, c6, c12, c0, #7
>
>  @ CHECK: cdp  p7, #1, c1, c1, c1, #4     @ encoding: [0x81,0x17,0x11,0xee]
>  @ CHECK: cdp2  p7, #1, c1, c1, c1, #4    @ encoding: [0x81,0x17,0x11,0xfe]
> +@ CHECK: cdp2  p10, #0, c6, c12, c0, #7   @ encoding:
> [0xe0,0x6a,0x0c,0xfe]
>
>
>
>  @------------------------------------------------------------------------------
> Index: test/MC/Disassembler/ARM/arm-tests.txt
> ===================================================================
> --- test/MC/Disassembler/ARM/arm-tests.txt
> +++ test/MC/Disassembler/ARM/arm-tests.txt
> @@ -363,6 +363,3 @@
>  # CHECK: ldmgt sp!, {r9}
>  0x00 0x02 0xbd 0xc8
>
> -# CHECK: cdp2  p10, #0, c6, c12, c0, #7
> -0xe0 0x6a 0x0c 0xfe
> -
> Index: test/MC/Disassembler/ARM/invalid-CDP2-arm.txt
> ===================================================================
> --- /dev/null
> +++ test/MC/Disassembler/ARM/invalid-CDP2-arm.txt
> @@ -0,0 +1,4 @@
> +# RUN: llvm-mc --disassemble %s -triple=arm 2>&1 | FileCheck %s
> +
> +# CHECK: invalid instruction encoding
> +0xe0 0x6a 0x0c 0xfe
>
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