[PATCH] Small correction to unordered memory code generation of ARM LDRD

[JF Bastien]

Committed as r184253.

On Tue, Jun 18, 2013 at 1:19 PM, Eli Friedman <eli.friedman at gmail.com> wrote:
> On Tue, Jun 18, 2013 at 10:46 AM, JF Bastien <jfb at google.com> wrote:
>>
>> I assume that this was written before ARM got LPAE, and isn't true
>> anymore. My correction is a bit of a mouthful, but is technically
>> correct.
>
>
> Not sure if it was before ARM got LPAE, but it was definitely before I knew
> LPAE has an effect here, i.e. before today. :)
>
>> diff --git a/docs/Atomics.rst b/docs/Atomics.rst
>> index 705d73f..1243f34 100644
>> --- a/docs/Atomics.rst
>> +++ b/docs/Atomics.rst
>> @@ -211,7 +211,7 @@ Notes for code generation
>>    never stored.  A normal load or store instruction is usually
>> sufficient, but
>>    note that an unordered load or store cannot be split into multiple
>>    instructions (or an instruction which does multiple memory operations,
>> like
>> -  ``LDRD`` on ARM).
>> +  ``LDRD`` on ARM without LPAE, or not naturally-aligned ``LDRD`` on LPAE
>> ARM).
>>
>
>  Looks fine.
>
> -Eli
>