[llvm] r184253 - Small correction to unordered memory code generation of ARM LDRD
JF Bastien
jfb at google.com
Tue Jun 18 16:07:16 PDT 2013
Author: jfb
Date: Tue Jun 18 18:07:16 2013
New Revision: 184253
URL: http://llvm.org/viewvc/llvm-project?rev=184253&view=rev
Log:
Small correction to unordered memory code generation of ARM LDRD
The information was correct pre-LPAE.
Modified:
llvm/trunk/docs/Atomics.rst
Modified: llvm/trunk/docs/Atomics.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/Atomics.rst?rev=184253&r1=184252&r2=184253&view=diff
==============================================================================
--- llvm/trunk/docs/Atomics.rst (original)
+++ llvm/trunk/docs/Atomics.rst Tue Jun 18 18:07:16 2013
@@ -211,7 +211,7 @@ Notes for code generation
never stored. A normal load or store instruction is usually sufficient, but
note that an unordered load or store cannot be split into multiple
instructions (or an instruction which does multiple memory operations, like
- ``LDRD`` on ARM).
+ ``LDRD`` on ARM without LPAE, or not naturally-aligned ``LDRD`` on LPAE ARM).
Monotonic
---------
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