[llvm] r183829 - [PowerPC] Use assembler source in MC tests
Rafael Espíndola
rafael.espindola at gmail.com
Wed Jun 12 08:02:50 PDT 2013
thanks!
On 12 June 2013 10:14, Ulrich Weigand <ulrich.weigand at de.ibm.com> wrote:
> Author: uweigand
> Date: Wed Jun 12 09:14:18 2013
> New Revision: 183829
>
> URL: http://llvm.org/viewvc/llvm-project?rev=183829&view=rev
> Log:
>
> [PowerPC] Use assembler source in MC tests
>
> A couple of old test cases in test/MC/PowerPC were still using
> LLVM IR. Now that we have a working assembler, we can move
> them to assembler tests instead:
> ppc64-initial-cfa.ll
> ppc64-relocs-01.ll
> ppc64-tls-relocs-01.ll
>
>
>
> Added:
> llvm/trunk/test/MC/PowerPC/ppc64-initial-cfa.s
> - copied, changed from r183528, llvm/trunk/test/MC/PowerPC/ppc64-initial-cfa.ll
> llvm/trunk/test/MC/PowerPC/ppc64-relocs-01.s
> - copied, changed from r183528, llvm/trunk/test/MC/PowerPC/ppc64-relocs-01.ll
> llvm/trunk/test/MC/PowerPC/ppc64-tls-relocs-01.s
> - copied, changed from r183528, llvm/trunk/test/MC/PowerPC/ppc64-tls-relocs-01.ll
> Removed:
> llvm/trunk/test/MC/PowerPC/ppc64-initial-cfa.ll
> llvm/trunk/test/MC/PowerPC/ppc64-relocs-01.ll
> llvm/trunk/test/MC/PowerPC/ppc64-tls-relocs-01.ll
>
> Removed: llvm/trunk/test/MC/PowerPC/ppc64-initial-cfa.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/ppc64-initial-cfa.ll?rev=183828&view=auto
> ==============================================================================
> --- llvm/trunk/test/MC/PowerPC/ppc64-initial-cfa.ll (original)
> +++ llvm/trunk/test/MC/PowerPC/ppc64-initial-cfa.ll (removed)
> @@ -1,87 +0,0 @@
> -; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -filetype=obj -relocation-model=static %s -o - | \
> -; RUN: llvm-readobj -s -sr -sd | FileCheck %s -check-prefix=STATIC
> -; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -filetype=obj -relocation-model=pic %s -o - | \
> -; RUN: llvm-readobj -s -sr -sd | FileCheck %s -check-prefix=PIC
> -
> -; FIXME: this file should be in .s form, change when asm parser is available.
> -
> -define void @f() {
> -entry:
> - ret void
> -}
> -
> -; STATIC: Section {
> -; STATIC: Name: .eh_frame
> -; STATIC-NEXT: Type: SHT_PROGBITS
> -; STATIC-NEXT: Flags [ (0x2)
> -; STATIC-NEXT: SHF_ALLOC
> -; STATIC-NEXT: ]
> -; STATIC-NEXT: Address:
> -; STATIC-NEXT: Offset:
> -; STATIC-NEXT: Size: 40
> -; STATIC-NEXT: Link: 0
> -; STATIC-NEXT: Info: 0
> -; STATIC-NEXT: AddressAlignment: 8
> -; STATIC-NEXT: EntrySize:
> -; STATIC-NEXT: Relocations [
> -; STATIC-NEXT: ]
> -; STATIC-NEXT: SectionData (
> -; STATIC-NEXT: 0000: 00000010 00000000 017A5200 01784101
> -; STATIC-NEXT: 0010: 1B0C0100 00000010 00000018 00000000
> -; STATIC-NEXT: 0020: 00000010 00000000
> -; STATIC-NEXT: )
> -; STATIC-NEXT: }
> -
> -; STATIC: Section {
> -; STATIC: Name: .rela.eh_frame
> -; STATIC-NEXT: Type: SHT_RELA
> -; STATIC-NEXT: Flags [ (0x0)
> -; STATIC-NEXT: ]
> -; STATIC-NEXT: Address:
> -; STATIC-NEXT: Offset:
> -; STATIC-NEXT: Size: 24
> -; STATIC-NEXT: Link:
> -; STATIC-NEXT: Info:
> -; STATIC-NEXT: AddressAlignment: 8
> -; STATIC-NEXT: EntrySize: 24
> -; STATIC-NEXT: Relocations [
> -; STATIC-NEXT: 0x1C R_PPC64_REL32 .text 0x0
> -; STATIC-NEXT: ]
> -
> -; PIC: Section {
> -; PIC: Name: .eh_frame
> -; PIC-NEXT: Type: SHT_PROGBITS
> -; PIC-NEXT: Flags [ (0x2)
> -; PIC-NEXT: SHF_ALLOC
> -; PIC-NEXT: ]
> -; PIC-NEXT: Address:
> -; PIC-NEXT: Offset:
> -; PIC-NEXT: Size: 40
> -; PIC-NEXT: Link: 0
> -; PIC-NEXT: Info: 0
> -; PIC-NEXT: AddressAlignment: 8
> -; PIC-NEXT: EntrySize: 0
> -; PIC-NEXT: Relocations [
> -; PIC-NEXT: ]
> -; PIC-NEXT: SectionData (
> -; PIC-NEXT: 0000: 00000010 00000000 017A5200 01784101
> -; PIC-NEXT: 0010: 1B0C0100 00000010 00000018 00000000
> -; PIC-NEXT: 0020: 00000010 00000000
> -; PIC-NEXT: )
> -; PIC-NEXT: }
> -
> -; PIC: Section {
> -; PIC: Name: .rela.eh_frame
> -; PIC-NEXT: Type: SHT_RELA
> -; PIC-NEXT: Flags [ (0x0)
> -; PIC-NEXT: ]
> -; PIC-NEXT: Address:
> -; PIC-NEXT: Offset:
> -; PIC-NEXT: Size: 24
> -; PIC-NEXT: Link:
> -; PIC-NEXT: Info:
> -; PIC-NEXT: AddressAlignment: 8
> -; PIC-NEXT: EntrySize: 24
> -; PIC-NEXT: Relocations [
> -; PIC-NEXT: 0x1C R_PPC64_REL32 .text 0x0
> -; PIC-NEXT: ]
>
> Copied: llvm/trunk/test/MC/PowerPC/ppc64-initial-cfa.s (from r183528, llvm/trunk/test/MC/PowerPC/ppc64-initial-cfa.ll)
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/ppc64-initial-cfa.s?p2=llvm/trunk/test/MC/PowerPC/ppc64-initial-cfa.s&p1=llvm/trunk/test/MC/PowerPC/ppc64-initial-cfa.ll&r1=183528&r2=183829&rev=183829&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/PowerPC/ppc64-initial-cfa.ll (original)
> +++ llvm/trunk/test/MC/PowerPC/ppc64-initial-cfa.s Wed Jun 12 09:14:18 2013
> @@ -1,87 +1,84 @@
> -; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -filetype=obj -relocation-model=static %s -o - | \
> -; RUN: llvm-readobj -s -sr -sd | FileCheck %s -check-prefix=STATIC
> -; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -filetype=obj -relocation-model=pic %s -o - | \
> -; RUN: llvm-readobj -s -sr -sd | FileCheck %s -check-prefix=PIC
> -
> -; FIXME: this file should be in .s form, change when asm parser is available.
> -
> -define void @f() {
> -entry:
> - ret void
> -}
> -
> -; STATIC: Section {
> -; STATIC: Name: .eh_frame
> -; STATIC-NEXT: Type: SHT_PROGBITS
> -; STATIC-NEXT: Flags [ (0x2)
> -; STATIC-NEXT: SHF_ALLOC
> -; STATIC-NEXT: ]
> -; STATIC-NEXT: Address:
> -; STATIC-NEXT: Offset:
> -; STATIC-NEXT: Size: 40
> -; STATIC-NEXT: Link: 0
> -; STATIC-NEXT: Info: 0
> -; STATIC-NEXT: AddressAlignment: 8
> -; STATIC-NEXT: EntrySize:
> -; STATIC-NEXT: Relocations [
> -; STATIC-NEXT: ]
> -; STATIC-NEXT: SectionData (
> -; STATIC-NEXT: 0000: 00000010 00000000 017A5200 01784101
> -; STATIC-NEXT: 0010: 1B0C0100 00000010 00000018 00000000
> -; STATIC-NEXT: 0020: 00000010 00000000
> -; STATIC-NEXT: )
> -; STATIC-NEXT: }
> -
> -; STATIC: Section {
> -; STATIC: Name: .rela.eh_frame
> -; STATIC-NEXT: Type: SHT_RELA
> -; STATIC-NEXT: Flags [ (0x0)
> -; STATIC-NEXT: ]
> -; STATIC-NEXT: Address:
> -; STATIC-NEXT: Offset:
> -; STATIC-NEXT: Size: 24
> -; STATIC-NEXT: Link:
> -; STATIC-NEXT: Info:
> -; STATIC-NEXT: AddressAlignment: 8
> -; STATIC-NEXT: EntrySize: 24
> -; STATIC-NEXT: Relocations [
> -; STATIC-NEXT: 0x1C R_PPC64_REL32 .text 0x0
> -; STATIC-NEXT: ]
> -
> -; PIC: Section {
> -; PIC: Name: .eh_frame
> -; PIC-NEXT: Type: SHT_PROGBITS
> -; PIC-NEXT: Flags [ (0x2)
> -; PIC-NEXT: SHF_ALLOC
> -; PIC-NEXT: ]
> -; PIC-NEXT: Address:
> -; PIC-NEXT: Offset:
> -; PIC-NEXT: Size: 40
> -; PIC-NEXT: Link: 0
> -; PIC-NEXT: Info: 0
> -; PIC-NEXT: AddressAlignment: 8
> -; PIC-NEXT: EntrySize: 0
> -; PIC-NEXT: Relocations [
> -; PIC-NEXT: ]
> -; PIC-NEXT: SectionData (
> -; PIC-NEXT: 0000: 00000010 00000000 017A5200 01784101
> -; PIC-NEXT: 0010: 1B0C0100 00000010 00000018 00000000
> -; PIC-NEXT: 0020: 00000010 00000000
> -; PIC-NEXT: )
> -; PIC-NEXT: }
> -
> -; PIC: Section {
> -; PIC: Name: .rela.eh_frame
> -; PIC-NEXT: Type: SHT_RELA
> -; PIC-NEXT: Flags [ (0x0)
> -; PIC-NEXT: ]
> -; PIC-NEXT: Address:
> -; PIC-NEXT: Offset:
> -; PIC-NEXT: Size: 24
> -; PIC-NEXT: Link:
> -; PIC-NEXT: Info:
> -; PIC-NEXT: AddressAlignment: 8
> -; PIC-NEXT: EntrySize: 24
> -; PIC-NEXT: Relocations [
> -; PIC-NEXT: 0x1C R_PPC64_REL32 .text 0x0
> -; PIC-NEXT: ]
> +# RUN: llvm-mc -triple=powerpc64-unknown-linux-gnu -filetype=obj -relocation-model=static %s | \
> +# RUN: llvm-readobj -s -sr -sd | FileCheck %s -check-prefix=STATIC
> +# RUN: llvm-mc -triple=powerpc64-unknown-linux-gnu -filetype=obj -relocation-model=pic %s | \
> +# RUN: llvm-readobj -s -sr -sd | FileCheck %s -check-prefix=PIC
> +
> + .cfi_startproc
> + nop
> + .cfi_endproc
> +
> +# STATIC: Section {
> +# STATIC: Name: .eh_frame
> +# STATIC-NEXT: Type: SHT_PROGBITS
> +# STATIC-NEXT: Flags [ (0x2)
> +# STATIC-NEXT: SHF_ALLOC
> +# STATIC-NEXT: ]
> +# STATIC-NEXT: Address:
> +# STATIC-NEXT: Offset:
> +# STATIC-NEXT: Size: 40
> +# STATIC-NEXT: Link: 0
> +# STATIC-NEXT: Info: 0
> +# STATIC-NEXT: AddressAlignment: 8
> +# STATIC-NEXT: EntrySize:
> +# STATIC-NEXT: Relocations [
> +# STATIC-NEXT: ]
> +# STATIC-NEXT: SectionData (
> +# STATIC-NEXT: 0000: 00000010 00000000 017A5200 01784101
> +# STATIC-NEXT: 0010: 1B0C0100 00000010 00000018 00000000
> +# STATIC-NEXT: 0020: 00000004 00000000
> +# STATIC-NEXT: )
> +# STATIC-NEXT: }
> +
> +# STATIC: Section {
> +# STATIC: Name: .rela.eh_frame
> +# STATIC-NEXT: Type: SHT_RELA
> +# STATIC-NEXT: Flags [ (0x0)
> +# STATIC-NEXT: ]
> +# STATIC-NEXT: Address:
> +# STATIC-NEXT: Offset:
> +# STATIC-NEXT: Size: 24
> +# STATIC-NEXT: Link:
> +# STATIC-NEXT: Info:
> +# STATIC-NEXT: AddressAlignment: 8
> +# STATIC-NEXT: EntrySize: 24
> +# STATIC-NEXT: Relocations [
> +# STATIC-NEXT: 0x1C R_PPC64_REL32 .text 0x0
> +# STATIC-NEXT: ]
> +
> +# PIC: Section {
> +# PIC: Name: .eh_frame
> +# PIC-NEXT: Type: SHT_PROGBITS
> +# PIC-NEXT: Flags [ (0x2)
> +# PIC-NEXT: SHF_ALLOC
> +# PIC-NEXT: ]
> +# PIC-NEXT: Address:
> +# PIC-NEXT: Offset:
> +# PIC-NEXT: Size: 40
> +# PIC-NEXT: Link: 0
> +# PIC-NEXT: Info: 0
> +# PIC-NEXT: AddressAlignment: 8
> +# PIC-NEXT: EntrySize: 0
> +# PIC-NEXT: Relocations [
> +# PIC-NEXT: ]
> +# PIC-NEXT: SectionData (
> +# PIC-NEXT: 0000: 00000010 00000000 017A5200 01784101
> +# PIC-NEXT: 0010: 1B0C0100 00000010 00000018 00000000
> +# PIC-NEXT: 0020: 00000004 00000000
> +# PIC-NEXT: )
> +# PIC-NEXT: }
> +
> +# PIC: Section {
> +# PIC: Name: .rela.eh_frame
> +# PIC-NEXT: Type: SHT_RELA
> +# PIC-NEXT: Flags [ (0x0)
> +# PIC-NEXT: ]
> +# PIC-NEXT: Address:
> +# PIC-NEXT: Offset:
> +# PIC-NEXT: Size: 24
> +# PIC-NEXT: Link:
> +# PIC-NEXT: Info:
> +# PIC-NEXT: AddressAlignment: 8
> +# PIC-NEXT: EntrySize: 24
> +# PIC-NEXT: Relocations [
> +# PIC-NEXT: 0x1C R_PPC64_REL32 .text 0x0
> +# PIC-NEXT: ]
>
> Removed: llvm/trunk/test/MC/PowerPC/ppc64-relocs-01.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/ppc64-relocs-01.ll?rev=183828&view=auto
> ==============================================================================
> --- llvm/trunk/test/MC/PowerPC/ppc64-relocs-01.ll (original)
> +++ llvm/trunk/test/MC/PowerPC/ppc64-relocs-01.ll (removed)
> @@ -1,49 +0,0 @@
> -;; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -O3 -code-model=small \
> -;; RUN: -filetype=obj %s -o - | \
> -;; RUN: llvm-readobj -r | FileCheck %s
> -
> -;; FIXME: this file need to be in .s form, change when asm parse is done.
> -
> - at number64 = global i64 10, align 8
> -
> -define i64 @access_int64(i64 %a) nounwind readonly {
> -entry:
> - %0 = load i64* @number64, align 8
> - %cmp = icmp eq i64 %0, %a
> - %conv1 = zext i1 %cmp to i64
> - ret i64 %conv1
> -}
> -
> -declare double @sin(double) nounwind
> -
> -define double @test_branch24 (double %x) nounwind readonly {
> -entry:
> - %add = call double @sin(double %x) nounwind
> - ret double %add
> -}
> -
> -;; CHECK: Relocations [
> -
> -;; The relocations in .rela.text are the 'number64' load using a
> -;; R_PPC64_TOC16_DS against the .toc and the 'sin' external function
> -;; address using a R_PPC64_REL24
> -;; CHECK: Section ({{[0-9]+}}) .rela.text {
> -;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_DS .toc
> -;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_REL24 sin
> -;; CHECK-NEXT: }
> -
> -;; The .opd entry for the 'access_int64' function creates 2 relocations:
> -;; 1. A R_PPC64_ADDR64 against the .text segment plus addend (the function
> -; address itself);
> -;; 2. And a R_PPC64_TOC against no symbol (the linker will replace for the
> -;; module's TOC base).
> -;; CHECK: Section ({{[0-9]+}}) .rela.opd {
> -;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_ADDR64 .text 0x0
> -;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC - 0x0
> -
> -;; Finally the TOC creates the relocation for the 'number64'.
> -;; CHECK: Section ({{[0-9]+}}) .rela.toc {
> -;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_ADDR64 number64 0x0
> -;; CHECK-NEXT: }
> -
> -;; CHECK-NEXT: ]
>
> Copied: llvm/trunk/test/MC/PowerPC/ppc64-relocs-01.s (from r183528, llvm/trunk/test/MC/PowerPC/ppc64-relocs-01.ll)
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/ppc64-relocs-01.s?p2=llvm/trunk/test/MC/PowerPC/ppc64-relocs-01.s&p1=llvm/trunk/test/MC/PowerPC/ppc64-relocs-01.ll&r1=183528&r2=183829&rev=183829&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/PowerPC/ppc64-relocs-01.ll (original)
> +++ llvm/trunk/test/MC/PowerPC/ppc64-relocs-01.s Wed Jun 12 09:14:18 2013
> @@ -1,49 +1,46 @@
> -;; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -O3 -code-model=small \
> -;; RUN: -filetype=obj %s -o - | \
> -;; RUN: llvm-readobj -r | FileCheck %s
> -
> -;; FIXME: this file need to be in .s form, change when asm parse is done.
> -
> - at number64 = global i64 10, align 8
> -
> -define i64 @access_int64(i64 %a) nounwind readonly {
> -entry:
> - %0 = load i64* @number64, align 8
> - %cmp = icmp eq i64 %0, %a
> - %conv1 = zext i1 %cmp to i64
> - ret i64 %conv1
> -}
> -
> -declare double @sin(double) nounwind
> -
> -define double @test_branch24 (double %x) nounwind readonly {
> -entry:
> - %add = call double @sin(double %x) nounwind
> - ret double %add
> -}
> -
> -;; CHECK: Relocations [
> -
> -;; The relocations in .rela.text are the 'number64' load using a
> -;; R_PPC64_TOC16_DS against the .toc and the 'sin' external function
> -;; address using a R_PPC64_REL24
> -;; CHECK: Section ({{[0-9]+}}) .rela.text {
> -;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_DS .toc
> -;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_REL24 sin
> -;; CHECK-NEXT: }
> -
> -;; The .opd entry for the 'access_int64' function creates 2 relocations:
> -;; 1. A R_PPC64_ADDR64 against the .text segment plus addend (the function
> -; address itself);
> -;; 2. And a R_PPC64_TOC against no symbol (the linker will replace for the
> -;; module's TOC base).
> -;; CHECK: Section ({{[0-9]+}}) .rela.opd {
> -;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_ADDR64 .text 0x0
> -;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC - 0x0
> -
> -;; Finally the TOC creates the relocation for the 'number64'.
> -;; CHECK: Section ({{[0-9]+}}) .rela.toc {
> -;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_ADDR64 number64 0x0
> -;; CHECK-NEXT: }
> +# RUN: llvm-mc -triple=powerpc64-unknown-linux-gnu -filetype=obj %s | \
> +# RUN: llvm-readobj -r | FileCheck %s
>
> -;; CHECK-NEXT: ]
> + .section .opd,"aw", at progbits
> +access_int64:
> + .quad .L.access_int64
> + .quad .TOC. at tocbase
> + .quad 0
> + .text
> +.L.access_int64:
> + ld 4, .LC1 at toc(2)
> + bl sin
> +
> + .section .toc,"aw", at progbits
> +.LC1:
> + .tc number64[TC],number64
> + .data
> + .globl number64
> +number64:
> + .quad 10
> +
> +# CHECK: Relocations [
> +
> +# The relocations in .rela.text are the 'number64' load using a
> +# R_PPC64_TOC16_DS against the .toc and the 'sin' external function
> +# address using a R_PPC64_REL24
> +# CHECK: Section ({{[0-9]+}}) .rela.text {
> +# CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_DS .toc
> +# CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_REL24 sin
> +# CHECK-NEXT: }
> +
> +# The .opd entry for the 'access_int64' function creates 2 relocations:
> +# 1. A R_PPC64_ADDR64 against the .text segment plus addend (the function
> +# address itself);
> +# 2. And a R_PPC64_TOC against no symbol (the linker will replace for the
> +# module's TOC base).
> +# CHECK: Section ({{[0-9]+}}) .rela.opd {
> +# CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_ADDR64 .text 0x0
> +# CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC - 0x0
> +
> +# Finally the TOC creates the relocation for the 'number64'.
> +# CHECK: Section ({{[0-9]+}}) .rela.toc {
> +# CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_ADDR64 number64 0x0
> +# CHECK-NEXT: }
> +
> +# CHECK-NEXT: ]
>
> Removed: llvm/trunk/test/MC/PowerPC/ppc64-tls-relocs-01.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/ppc64-tls-relocs-01.ll?rev=183828&view=auto
> ==============================================================================
> --- llvm/trunk/test/MC/PowerPC/ppc64-tls-relocs-01.ll (original)
> +++ llvm/trunk/test/MC/PowerPC/ppc64-tls-relocs-01.ll (removed)
> @@ -1,19 +0,0 @@
> -;; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -filetype=obj %s -o - | \
> -;; RUN: llvm-readobj -r | FileCheck %s
> -
> -;; FIXME: this file should be in .s form, change when asm parser is available.
> -
> - at t = thread_local global i32 0, align 4
> -
> -define i32* @f() nounwind {
> -entry:
> - ret i32* @t
> -}
> -
> -;; Check for a pair of R_PPC64_TPREL16_HA / R_PPC64_TPREL16_LO relocs
> -;; against the thread-local symbol 't'.
> -;; CHECK: Relocations [
> -;; CHECK: Section ({{[0-9]+}}) .rela.text {
> -;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TPREL16_HA t
> -;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TPREL16_LO t
> -;; CHECK-NEXT: }
>
> Copied: llvm/trunk/test/MC/PowerPC/ppc64-tls-relocs-01.s (from r183528, llvm/trunk/test/MC/PowerPC/ppc64-tls-relocs-01.ll)
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/ppc64-tls-relocs-01.s?p2=llvm/trunk/test/MC/PowerPC/ppc64-tls-relocs-01.s&p1=llvm/trunk/test/MC/PowerPC/ppc64-tls-relocs-01.ll&r1=183528&r2=183829&rev=183829&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/PowerPC/ppc64-tls-relocs-01.ll (original)
> +++ llvm/trunk/test/MC/PowerPC/ppc64-tls-relocs-01.s Wed Jun 12 09:14:18 2013
> @@ -1,19 +1,22 @@
> -;; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -filetype=obj %s -o - | \
> -;; RUN: llvm-readobj -r | FileCheck %s
> +# RUN: llvm-mc -triple=powerpc64-unknown-linux-gnu -filetype=obj %s | \
> +# RUN: llvm-readobj -r | FileCheck %s
>
> -;; FIXME: this file should be in .s form, change when asm parser is available.
> + .text
> + addis 3, 13, t at tprel@ha
> + addi 3, 3, t at tprel@l
>
> - at t = thread_local global i32 0, align 4
> + .type t, at object
> + .section .tbss,"awT", at nobits
> + .globl t
> + .align 2
> +t:
> + .long 0
> + .size t, 4
>
> -define i32* @f() nounwind {
> -entry:
> - ret i32* @t
> -}
> -
> -;; Check for a pair of R_PPC64_TPREL16_HA / R_PPC64_TPREL16_LO relocs
> -;; against the thread-local symbol 't'.
> -;; CHECK: Relocations [
> -;; CHECK: Section ({{[0-9]+}}) .rela.text {
> -;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TPREL16_HA t
> -;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TPREL16_LO t
> -;; CHECK-NEXT: }
> +# Check for a pair of R_PPC64_TPREL16_HA / R_PPC64_TPREL16_LO relocs
> +# against the thread-local symbol 't'.
> +# CHECK: Relocations [
> +# CHECK: Section ({{[0-9]+}}) .rela.text {
> +# CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TPREL16_HA t
> +# CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TPREL16_LO t
> +# CHECK-NEXT: }
>
>
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