[llvm] r183690 - tblgen: Assert that InstRWs doesn't grows when we don't expect it.

[Benjamin Kramer]

Author: d0k
Date: Mon Jun 10 15:19:35 2013
New Revision: 183690

URL: http://llvm.org/viewvc/llvm-project?rev=183690&view=rev
Log:
tblgen: Assert that InstRWs doesn't grows when we don't expect it.

Modified:
    llvm/trunk/utils/TableGen/CodeGenSchedule.cpp

Modified: llvm/trunk/utils/TableGen/CodeGenSchedule.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenSchedule.cpp?rev=183690&r1=183689&r2=183690&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/CodeGenSchedule.cpp (original)
+++ llvm/trunk/utils/TableGen/CodeGenSchedule.cpp Mon Jun 10 15:19:35 2013
@@ -891,6 +891,7 @@ void CodeGenSchedModels::inferFromItinCl
 /// Infer classes from per-processor InstReadWrite definitions.
 void CodeGenSchedModels::inferFromInstRWs(unsigned SCIdx) {
   for (unsigned I = 0, E = SchedClasses[SCIdx].InstRWs.size(); I != E; ++I) {
+    assert(SchedClasses[SCIdx].InstRWs.size() == E && "InstrRWs was mutated!");
     Record *Rec = SchedClasses[SCIdx].InstRWs[I];
     const RecVec *InstDefs = Sets.expand(Rec);
     RecIter II = InstDefs->begin(), IE = InstDefs->end();