[llvm] r182933 - Force fragile test to the atom scheduler model.

[Benjamin Kramer]

Author: d0k
Date: Thu May 30 10:22:28 2013
New Revision: 182933

URL: http://llvm.org/viewvc/llvm-project?rev=182933&view=rev
Log:
Force fragile test to the atom scheduler model.

The pattern the test originally checked for doesn't occur on other -mcpu
settings. On atom it's still there though slightly differently scheduled.

Modified:
    llvm/trunk/test/CodeGen/X86/zext-sext.ll

Modified: llvm/trunk/test/CodeGen/X86/zext-sext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/zext-sext.ll?rev=182933&r1=182932&r2=182933&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/zext-sext.ll (original)
+++ llvm/trunk/test/CodeGen/X86/zext-sext.ll Thu May 30 10:22:28 2013
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 | FileCheck %s
+; RUN: llc < %s -march=x86-64 -mcpu=atom | FileCheck %s
 ; <rdar://problem/8006248>
 
 ; This randomly started passing after an unrelated change, if it fails again it
@@ -34,9 +34,11 @@ entry:
   %tmp12 = add i64 %tmp11, 5089792279245435153
 
 ; CHECK:      addl	$2138875574, %e[[REGISTER_zext:[a-z0-9]+]]
+; CHECK-NEXT: cmpl	$-8608074, %e[[REGISTER_zext]]
 ; CHECK-NEXT: movslq	%e[[REGISTER_zext]], [[REGISTER_tmp:%r[a-z0-9]+]]
 ; CHECK:      movq	[[REGISTER_tmp]], [[REGISTER_sext:%r[a-z0-9]+]]
-; CHECK-NEXT: subq	%r[[REGISTER_zext]], [[REGISTER_sext]]
+; CHECK-NOT:  [[REGISTER_zext]]
+; CHECK:      subq	%r[[REGISTER_zext]], [[REGISTER_sext]]
 
   %tmp13 = sub i64 %tmp12, 2138875574
   %tmp14 = zext i32 %tmp4 to i64