[llvm] r182879 - Don't assume the registers will be enumerated sequentially.

[Chad Rosier]

Author: mcrosier
Date: Wed May 29 15:42:21 2013
New Revision: 182879

URL: http://llvm.org/viewvc/llvm-project?rev=182879&view=rev
Log:
Don't assume the registers will be enumerated sequentially.

Modified:
    llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp

Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp?rev=182879&r1=182878&r2=182879&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Wed May 29 15:42:21 2013
@@ -373,8 +373,11 @@ BitVector X86RegisterInfo::getReservedRe
         Reserved.set(*AI);
 
       // XMM8, XMM9, ...
-      assert(X86::XMM15 == X86::XMM8+7);
-      for (MCRegAliasIterator AI(X86::XMM8 + n, this, true); AI.isValid(); ++AI)
+      static const uint16_t XMMReg[] = {
+        X86::XMM8,  X86::XMM9, X86::XMM10, X86::XMM11,
+        X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15
+      };
+      for (MCRegAliasIterator AI(XMMReg[n], this, true); AI.isValid(); ++AI)
         Reserved.set(*AI);
     }
   }