[llvm] r182531 - Simplify logic now that r182490 is in place. No functional change intended.
Chad Rosier
mcrosier at apple.com
Wed May 22 16:17:37 PDT 2013
Author: mcrosier
Date: Wed May 22 18:17:36 2013
New Revision: 182531
URL: http://llvm.org/viewvc/llvm-project?rev=182531&view=rev
Log:
Simplify logic now that r182490 is in place. No functional change intended.
Modified:
llvm/trunk/lib/CodeGen/AggressiveAntiDepBreaker.cpp
llvm/trunk/lib/CodeGen/BranchFolding.cpp
llvm/trunk/lib/CodeGen/CriticalAntiDepBreaker.cpp
llvm/trunk/lib/CodeGen/DeadMachineInstructionElim.cpp
llvm/trunk/lib/CodeGen/IfConversion.cpp
llvm/trunk/lib/CodeGen/MachineCopyPropagation.cpp
llvm/trunk/lib/CodeGen/MachineVerifier.cpp
llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp
llvm/trunk/lib/CodeGen/RegisterScavenging.cpp
llvm/trunk/lib/Target/ARM/Thumb2ITBlockPass.cpp
llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp
Modified: llvm/trunk/lib/CodeGen/AggressiveAntiDepBreaker.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AggressiveAntiDepBreaker.cpp?rev=182531&r1=182530&r2=182531&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/AggressiveAntiDepBreaker.cpp (original)
+++ llvm/trunk/lib/CodeGen/AggressiveAntiDepBreaker.cpp Wed May 22 18:17:36 2013
@@ -247,8 +247,8 @@ void AggressiveAntiDepBreaker::GetPassth
if ((MO.isDef() && MI->isRegTiedToUseOperand(i)) ||
IsImplicitDefUse(MI, MO)) {
const unsigned Reg = MO.getReg();
- PassthruRegs.insert(Reg);
- for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
+ for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
+ SubRegs.isValid(); ++SubRegs)
PassthruRegs.insert(*SubRegs);
}
}
Modified: llvm/trunk/lib/CodeGen/BranchFolding.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/BranchFolding.cpp?rev=182531&r1=182530&r2=182531&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/BranchFolding.cpp (original)
+++ llvm/trunk/lib/CodeGen/BranchFolding.cpp Wed May 22 18:17:36 2013
@@ -135,8 +135,8 @@ bool BranchFolder::OptimizeImpDefsBlock(
if (!I->isImplicitDef())
break;
unsigned Reg = I->getOperand(0).getReg();
- ImpDefRegs.insert(Reg);
- for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
+ for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
+ SubRegs.isValid(); ++SubRegs)
ImpDefRegs.insert(*SubRegs);
++I;
}
Modified: llvm/trunk/lib/CodeGen/CriticalAntiDepBreaker.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/CriticalAntiDepBreaker.cpp?rev=182531&r1=182530&r2=182531&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/CriticalAntiDepBreaker.cpp (original)
+++ llvm/trunk/lib/CodeGen/CriticalAntiDepBreaker.cpp Wed May 22 18:17:36 2013
@@ -201,8 +201,8 @@ void CriticalAntiDepBreaker::PrescanInst
if (MO.isUse() && Special) {
if (!KeepRegs.test(Reg)) {
- KeepRegs.set(Reg);
- for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
+ for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
+ SubRegs.isValid(); ++SubRegs)
KeepRegs.set(*SubRegs);
}
}
Modified: llvm/trunk/lib/CodeGen/DeadMachineInstructionElim.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/DeadMachineInstructionElim.cpp?rev=182531&r1=182530&r2=182531&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/DeadMachineInstructionElim.cpp (original)
+++ llvm/trunk/lib/CodeGen/DeadMachineInstructionElim.cpp Wed May 22 18:17:36 2013
@@ -154,11 +154,11 @@ bool DeadMachineInstructionElim::runOnMa
if (MO.isReg() && MO.isDef()) {
unsigned Reg = MO.getReg();
if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
- LivePhysRegs.reset(Reg);
// Check the subreg set, not the alias set, because a def
// of a super-register may still be partially live after
// this def.
- for (MCSubRegIterator SR(Reg, TRI); SR.isValid(); ++SR)
+ for (MCSubRegIterator SR(Reg, TRI,/*IncludeSelf=*/true);
+ SR.isValid(); ++SR)
LivePhysRegs.reset(*SR);
}
} else if (MO.isRegMask()) {
Modified: llvm/trunk/lib/CodeGen/IfConversion.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/IfConversion.cpp?rev=182531&r1=182530&r2=182531&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/IfConversion.cpp (original)
+++ llvm/trunk/lib/CodeGen/IfConversion.cpp Wed May 22 18:17:36 2013
@@ -970,8 +970,8 @@ static void InitPredRedefs(MachineBasicB
for (MachineBasicBlock::livein_iterator I = BB->livein_begin(),
E = BB->livein_end(); I != E; ++I) {
unsigned Reg = *I;
- Redefs.insert(Reg);
- for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
+ for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
+ SubRegs.isValid(); ++SubRegs)
Redefs.insert(*SubRegs);
}
}
@@ -990,8 +990,8 @@ static void UpdatePredRedefs(MachineInst
if (MO.isDef())
Defs.push_back(Reg);
else if (MO.isKill()) {
- Redefs.erase(Reg);
- for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
+ for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
+ SubRegs.isValid(); ++SubRegs)
Redefs.erase(*SubRegs);
}
}
@@ -1362,8 +1362,8 @@ bool IfConverter::IfConvertDiamond(BBInf
} else if (!RedefsByFalse.count(Reg)) {
// These are defined before ctrl flow reach the 'false' instructions.
// They cannot be modified by the 'true' instructions.
- ExtUses.insert(Reg);
- for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
+ for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
+ SubRegs.isValid(); ++SubRegs)
ExtUses.insert(*SubRegs);
}
}
@@ -1371,8 +1371,8 @@ bool IfConverter::IfConvertDiamond(BBInf
for (unsigned i = 0, e = Defs.size(); i != e; ++i) {
unsigned Reg = Defs[i];
if (!ExtUses.count(Reg)) {
- RedefsByFalse.insert(Reg);
- for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
+ for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
+ SubRegs.isValid(); ++SubRegs)
RedefsByFalse.insert(*SubRegs);
}
}
Modified: llvm/trunk/lib/CodeGen/MachineCopyPropagation.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineCopyPropagation.cpp?rev=182531&r1=182530&r2=182531&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineCopyPropagation.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineCopyPropagation.cpp Wed May 22 18:17:36 2013
@@ -213,9 +213,8 @@ bool MachineCopyPropagation::CopyPropaga
CopyMap.erase(*AI);
AvailCopyMap.erase(*AI);
}
- CopyMap[Def] = MI;
- AvailCopyMap[Def] = MI;
- for (MCSubRegIterator SR(Def, TRI); SR.isValid(); ++SR) {
+ for (MCSubRegIterator SR(Def, TRI, /*IncludeSelf=*/true); SR.isValid();
+ ++SR) {
CopyMap[*SR] = MI;
AvailCopyMap[*SR] = MI;
}
Modified: llvm/trunk/lib/CodeGen/MachineVerifier.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineVerifier.cpp?rev=182531&r1=182530&r2=182531&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineVerifier.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineVerifier.cpp Wed May 22 18:17:36 2013
@@ -669,8 +669,8 @@ MachineVerifier::visitMachineBasicBlockB
report("MBB live-in list contains non-physical register", MBB);
continue;
}
- regsLive.insert(*I);
- for (MCSubRegIterator SubRegs(*I, TRI); SubRegs.isValid(); ++SubRegs)
+ for (MCSubRegIterator SubRegs(*I, TRI, /*IncludeSelf=*/true);
+ SubRegs.isValid(); ++SubRegs)
regsLive.insert(*SubRegs);
}
regsLiveInButUnused = regsLive;
@@ -679,8 +679,8 @@ MachineVerifier::visitMachineBasicBlockB
assert(MFI && "Function has no frame info");
BitVector PR = MFI->getPristineRegs(MBB);
for (int I = PR.find_first(); I>0; I = PR.find_next(I)) {
- regsLive.insert(I);
- for (MCSubRegIterator SubRegs(I, TRI); SubRegs.isValid(); ++SubRegs)
+ for (MCSubRegIterator SubRegs(I, TRI, /*IncludeSelf=*/true);
+ SubRegs.isValid(); ++SubRegs)
regsLive.insert(*SubRegs);
}
Modified: llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp?rev=182531&r1=182530&r2=182531&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp (original)
+++ llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp Wed May 22 18:17:36 2013
@@ -424,9 +424,9 @@ void SchedulePostRATDList::StartBlockFor
for (MachineBasicBlock::livein_iterator I = (*SI)->livein_begin(),
E = (*SI)->livein_end(); I != E; ++I) {
unsigned Reg = *I;
- LiveRegs.set(Reg);
- // Repeat, for all subregs.
- for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
+ // Repeat, for reg and all subregs.
+ for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
+ SubRegs.isValid(); ++SubRegs)
LiveRegs.set(*SubRegs);
}
}
@@ -496,10 +496,9 @@ void SchedulePostRATDList::FixupKills(Ma
// Ignore two-addr defs.
if (MI->isRegTiedToUseOperand(i)) continue;
- LiveRegs.reset(Reg);
-
- // Repeat for all subregs.
- for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
+ // Repeat for reg and all subregs.
+ for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
+ SubRegs.isValid(); ++SubRegs)
LiveRegs.reset(*SubRegs);
}
@@ -548,9 +547,8 @@ void SchedulePostRATDList::FixupKills(Ma
unsigned Reg = MO.getReg();
if ((Reg == 0) || MRI.isReserved(Reg)) continue;
- LiveRegs.set(Reg);
-
- for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
+ for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
+ SubRegs.isValid(); ++SubRegs)
LiveRegs.set(*SubRegs);
}
}
Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterScavenging.cpp?rev=182531&r1=182530&r2=182531&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegisterScavenging.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Wed May 22 18:17:36 2013
@@ -31,9 +31,8 @@ using namespace llvm;
/// setUsed - Set the register and its sub-registers as being used.
void RegScavenger::setUsed(unsigned Reg) {
- RegsAvailable.reset(Reg);
-
- for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
+ for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
+ SubRegs.isValid(); ++SubRegs)
RegsAvailable.reset(*SubRegs);
}
@@ -105,8 +104,8 @@ void RegScavenger::enterBasicBlock(Machi
}
void RegScavenger::addRegWithSubRegs(BitVector &BV, unsigned Reg) {
- BV.set(Reg);
- for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
+ for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
+ SubRegs.isValid(); ++SubRegs)
BV.set(*SubRegs);
}
Modified: llvm/trunk/lib/Target/ARM/Thumb2ITBlockPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Thumb2ITBlockPass.cpp?rev=182531&r1=182530&r2=182531&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Thumb2ITBlockPass.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Thumb2ITBlockPass.cpp Wed May 22 18:17:36 2013
@@ -73,15 +73,15 @@ static void TrackDefUses(MachineInstr *M
for (unsigned i = 0, e = LocalUses.size(); i != e; ++i) {
unsigned Reg = LocalUses[i];
- Uses.insert(Reg);
- for (MCSubRegIterator Subreg(Reg, TRI); Subreg.isValid(); ++Subreg)
+ for (MCSubRegIterator Subreg(Reg, TRI, /*IncludeSelf=*/true);
+ Subreg.isValid(); ++Subreg)
Uses.insert(*Subreg);
}
for (unsigned i = 0, e = LocalDefs.size(); i != e; ++i) {
unsigned Reg = LocalDefs[i];
- Defs.insert(Reg);
- for (MCSubRegIterator Subreg(Reg, TRI); Subreg.isValid(); ++Subreg)
+ for (MCSubRegIterator Subreg(Reg, TRI, /*IncludeSelf=*/true);
+ Subreg.isValid(); ++Subreg)
Defs.insert(*Subreg);
if (Reg == ARM::CPSR)
continue;
Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp?rev=182531&r1=182530&r2=182531&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Wed May 22 18:17:36 2013
@@ -306,19 +306,19 @@ BitVector X86RegisterInfo::getReservedRe
const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
// Set the stack-pointer register and its aliases as reserved.
- Reserved.set(X86::RSP);
- for (MCSubRegIterator I(X86::RSP, this); I.isValid(); ++I)
+ for (MCSubRegIterator I(X86::RSP, this, /*IncludeSelf=*/true); I.isValid();
+ ++I)
Reserved.set(*I);
// Set the instruction pointer register and its aliases as reserved.
- Reserved.set(X86::RIP);
- for (MCSubRegIterator I(X86::RIP, this); I.isValid(); ++I)
+ for (MCSubRegIterator I(X86::RIP, this, /*IncludeSelf=*/true); I.isValid();
+ ++I)
Reserved.set(*I);
// Set the frame-pointer register and its aliases as reserved if needed.
if (TFI->hasFP(MF)) {
- Reserved.set(X86::RBP);
- for (MCSubRegIterator I(X86::RBP, this); I.isValid(); ++I)
+ for (MCSubRegIterator I(X86::RBP, this, /*IncludeSelf=*/true); I.isValid();
+ ++I)
Reserved.set(*I);
}
@@ -331,8 +331,8 @@ BitVector X86RegisterInfo::getReservedRe
"Stack realignment in presence of dynamic allocas is not supported with"
"this calling convention.");
- Reserved.set(getBaseRegister());
- for (MCSubRegIterator I(getBaseRegister(), this); I.isValid(); ++I)
+ for (MCSubRegIterator I(getBaseRegister(), this, /*IncludeSelf=*/true);
+ I.isValid(); ++I)
Reserved.set(*I);
}
More information about the llvm-commits
mailing list