[llvm] r182442 - Make R600 non-experimental.
Alexey Samsonov
samsonov at google.com
Wed May 22 00:18:09 PDT 2013
Our bootstrap bot now reports ASan errrors in the following tests:
Failing Tests (5):
LLVM :: CodeGen/R600/fabs.ll
LLVM :: CodeGen/R600/literals.ll
LLVM :: CodeGen/R600/llvm.AMDGPU.tex.ll
LLVM :: CodeGen/R600/pv.ll
LLVM :: CodeGen/R600/schedule-if-2.ll
Can R600 devs take a look at this? I've filed
http://llvm.org/bugs/show_bug.cgi?id=16103
http://llvm.org/bugs/show_bug.cgi?id=16104
On Wed, May 22, 2013 at 4:35 AM, Rafael Espindola <
rafael.espindola at gmail.com> wrote:
> Author: rafael
> Date: Tue May 21 19:35:47 2013
> New Revision: 182442
>
> URL: http://llvm.org/viewvc/llvm-project?rev=182442&view=rev
> Log:
> Make R600 non-experimental.
>
> The r600 backend has been in tree for some time now. Marking it as
> non-experimental to avoid accidental breakage.
>
> Modified:
> llvm/trunk/CMakeLists.txt
> llvm/trunk/autoconf/configure.ac
> llvm/trunk/configure
> llvm/trunk/docs/ReleaseNotes_34.rst
>
> Modified: llvm/trunk/CMakeLists.txt
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/CMakeLists.txt?rev=182442&r1=182441&r2=182442&view=diff
>
> ==============================================================================
> --- llvm/trunk/CMakeLists.txt (original)
> +++ llvm/trunk/CMakeLists.txt Tue May 21 19:35:47 2013
> @@ -83,6 +83,7 @@ set(LLVM_ALL_TARGETS
> MSP430
> NVPTX
> PowerPC
> + R600
> Sparc
> SystemZ
> X86
>
> Modified: llvm/trunk/autoconf/configure.ac
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/autoconf/configure.ac?rev=182442&r1=182441&r2=182442&view=diff
>
> ==============================================================================
> --- llvm/trunk/autoconf/configure.ac (original)
> +++ llvm/trunk/autoconf/configure.ac Tue May 21 19:35:47 2013
> @@ -798,13 +798,13 @@ TARGETS_TO_BUILD=""
> AC_ARG_ENABLE([targets],AS_HELP_STRING([--enable-targets],
> [Build specific host targets: all or target1,target2,... Valid
> targets are:
> host, x86, x86_64, sparc, powerpc, arm, aarch64, mips, hexagon,
> - xcore, msp430, nvptx, systemz, and cpp (default=all)]),,
> + xcore, msp430, nvptx, systemz, r600, and cpp (default=all)]),,
> enableval=all)
> if test "$enableval" = host-only ; then
> enableval=host
> fi
> case "$enableval" in
> - all) TARGETS_TO_BUILD="X86 Sparc PowerPC AArch64 ARM Mips XCore MSP430
> CppBackend MBlaze NVPTX Hexagon SystemZ" ;;
> + all) TARGETS_TO_BUILD="X86 Sparc PowerPC AArch64 ARM Mips XCore MSP430
> CppBackend MBlaze NVPTX Hexagon SystemZ R600" ;;
> *)for a_target in `echo $enableval|sed -e 's/,/ /g' ` ; do
> case "$a_target" in
> x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
> @@ -824,6 +824,7 @@ case "$enableval" in
> mblaze) TARGETS_TO_BUILD="MBlaze $TARGETS_TO_BUILD" ;;
> nvptx) TARGETS_TO_BUILD="NVPTX $TARGETS_TO_BUILD" ;;
> systemz) TARGETS_TO_BUILD="SystemZ $TARGETS_TO_BUILD" ;;
> + r600) TARGETS_TO_BUILD="R600 $TARGETS_TO_BUILD" ;;
> host) case "$llvm_cv_target_arch" in
> x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
> x86_64) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
>
> Modified: llvm/trunk/configure
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/configure?rev=182442&r1=182441&r2=182442&view=diff
>
> ==============================================================================
> --- llvm/trunk/configure (original)
> +++ llvm/trunk/configure Tue May 21 19:35:47 2013
> @@ -1445,7 +1445,8 @@ Optional Features:
> --enable-targets Build specific host targets: all or
> target1,target2,... Valid targets are: host,
> x86,
> x86_64, sparc, powerpc, arm, aarch64, mips,
> hexagon,
> - xcore, msp430, nvptx, systemz, and cpp
> (default=all)
> + xcore, msp430, nvptx, systemz, r600, and cpp
> + (default=all)
> --enable-experimental-targets
> Build experimental host targets: disable or
> target1,target2,... (default=disable)
> @@ -5636,7 +5637,7 @@ if test "$enableval" = host-only ; then
> enableval=host
> fi
> case "$enableval" in
> - all) TARGETS_TO_BUILD="X86 Sparc PowerPC AArch64 ARM Mips XCore MSP430
> CppBackend MBlaze NVPTX Hexagon SystemZ" ;;
> + all) TARGETS_TO_BUILD="X86 Sparc PowerPC AArch64 ARM Mips XCore MSP430
> CppBackend MBlaze NVPTX Hexagon SystemZ R600" ;;
> *)for a_target in `echo $enableval|sed -e 's/,/ /g' ` ; do
> case "$a_target" in
> x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
> @@ -5656,6 +5657,7 @@ case "$enableval" in
> mblaze) TARGETS_TO_BUILD="MBlaze $TARGETS_TO_BUILD" ;;
> nvptx) TARGETS_TO_BUILD="NVPTX $TARGETS_TO_BUILD" ;;
> systemz) TARGETS_TO_BUILD="SystemZ $TARGETS_TO_BUILD" ;;
> + r600) TARGETS_TO_BUILD="R600 $TARGETS_TO_BUILD" ;;
> host) case "$llvm_cv_target_arch" in
> x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
> x86_64) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
> @@ -10535,7 +10537,7 @@ else
> lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
> lt_status=$lt_dlunknown
> cat > conftest.$ac_ext <<EOF
> -#line 10538 "configure"
> +#line 10540 "configure"
> #include "confdefs.h"
>
> #if HAVE_DLFCN_H
>
> Modified: llvm/trunk/docs/ReleaseNotes_34.rst
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes_34.rst?rev=182442&r1=182441&r2=182442&view=diff
>
> ==============================================================================
> --- llvm/trunk/docs/ReleaseNotes_34.rst (original)
> +++ llvm/trunk/docs/ReleaseNotes_34.rst Tue May 21 19:35:47 2013
> @@ -44,6 +44,8 @@ Non-comprehensive list of changes in thi
> * Support for exception handling has been removed from the old JIT. Use
> MCJIT
> if you need EH support.
>
> +* The R600 backend is not marked experimental anymore and is built by
> default.
> +
> * ... next change ...
>
> .. NOTE
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
--
Alexey Samsonov, MSK
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