[llvm] r182357 - DAGCombine: Avoid an edge case where it tried to create an i0 type for (x & 0) == 0.
Benjamin Kramer
benny.kra at googlemail.com
Tue May 21 01:51:09 PDT 2013
Author: d0k
Date: Tue May 21 03:51:09 2013
New Revision: 182357
URL: http://llvm.org/viewvc/llvm-project?rev=182357&view=rev
Log:
DAGCombine: Avoid an edge case where it tried to create an i0 type for (x & 0) == 0.
Fixes PR16083.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/trunk/test/CodeGen/X86/shrink-compare.ll
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=182357&r1=182356&r2=182357&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Tue May 21 03:51:09 2013
@@ -1162,7 +1162,8 @@ TargetLowering::SimplifySetCC(EVT VT, SD
}
// Make sure we're not losing bits from the constant.
- if (MinBits < C1.getBitWidth() && MinBits >= C1.getActiveBits()) {
+ if (MinBits > 0 &&
+ MinBits < C1.getBitWidth() && MinBits >= C1.getActiveBits()) {
EVT MinVT = EVT::getIntegerVT(*DAG.getContext(), MinBits);
if (isTypeDesirableForOp(ISD::SETCC, MinVT)) {
// Will get folded away.
Modified: llvm/trunk/test/CodeGen/X86/shrink-compare.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shrink-compare.ll?rev=182357&r1=182356&r2=182357&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/shrink-compare.ll (original)
+++ llvm/trunk/test/CodeGen/X86/shrink-compare.ll Tue May 21 03:51:09 2013
@@ -50,3 +50,19 @@ if.end:
; CHECK: test3:
; CHECK: cmpb $-1, %{{dil|cl}}
}
+
+; PR16083
+define i1 @test4(i64 %a, i32 %b) {
+entry:
+ %tobool = icmp ne i32 %b, 0
+ br i1 %tobool, label %lor.end, label %lor.rhs
+
+lor.rhs: ; preds = %entry
+ %and = and i64 0, %a
+ %tobool1 = icmp ne i64 %and, 0
+ br label %lor.end
+
+lor.end: ; preds = %lor.rhs, %entry
+ %p = phi i1 [ true, %entry ], [ %tobool1, %lor.rhs ]
+ ret i1 %p
+}
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