[llvm] r182112 - R600: Pass MCSubtargetInfo reference to R600CodeEmitter
Rafael EspĂndola
rafael.espindola at gmail.com
Fri May 17 20:13:25 PDT 2013
why?
On 17 May 2013 11:23, Tom Stellard <thomas.stellard at amd.com> wrote:
> Author: tstellar
> Date: Fri May 17 10:23:12 2013
> New Revision: 182112
>
> URL: http://llvm.org/viewvc/llvm-project?rev=182112&view=rev
> Log:
> R600: Pass MCSubtargetInfo reference to R600CodeEmitter
>
> Modified:
> llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp
> llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h
> llvm/trunk/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
>
> Modified: llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp?rev=182112&r1=182111&r2=182112&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp (original)
> +++ llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp Fri May 17 10:23:12 2013
> @@ -78,7 +78,7 @@ static MCCodeEmitter *createAMDGPUMCCode
> if (STI.getFeatureBits() & AMDGPU::Feature64BitPtr) {
> return createSIMCCodeEmitter(MCII, MRI, STI, Ctx);
> } else {
> - return createR600MCCodeEmitter(MCII, MRI);
> + return createR600MCCodeEmitter(MCII, MRI, STI);
> }
> }
>
>
> Modified: llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h?rev=182112&r1=182111&r2=182112&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h (original)
> +++ llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.h Fri May 17 10:23:12 2013
> @@ -32,7 +32,8 @@ class raw_ostream;
> extern Target TheAMDGPUTarget;
>
> MCCodeEmitter *createR600MCCodeEmitter(const MCInstrInfo &MCII,
> - const MCRegisterInfo &MRI);
> + const MCRegisterInfo &MRI,
> + const MCSubtargetInfo &STI);
>
> MCCodeEmitter *createSIMCCodeEmitter(const MCInstrInfo &MCII,
> const MCRegisterInfo &MRI,
>
> Modified: llvm/trunk/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp?rev=182112&r1=182111&r2=182112&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp (original)
> +++ llvm/trunk/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp Fri May 17 10:23:12 2013
> @@ -35,11 +35,13 @@ class R600MCCodeEmitter : public AMDGPUM
> void operator=(const R600MCCodeEmitter &) LLVM_DELETED_FUNCTION;
> const MCInstrInfo &MCII;
> const MCRegisterInfo &MRI;
> + const MCSubtargetInfo &STI;
>
> public:
>
> - R600MCCodeEmitter(const MCInstrInfo &mcii, const MCRegisterInfo &mri)
> - : MCII(mcii), MRI(mri) { }
> + R600MCCodeEmitter(const MCInstrInfo &mcii, const MCRegisterInfo &mri,
> + const MCSubtargetInfo &sti)
> + : MCII(mcii), MRI(mri), STI(sti) { }
>
> /// \brief Encode the instruction and write it to the OS.
> virtual void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
> @@ -95,8 +97,9 @@ enum TextureTypes {
> };
>
> MCCodeEmitter *llvm::createR600MCCodeEmitter(const MCInstrInfo &MCII,
> - const MCRegisterInfo &MRI) {
> - return new R600MCCodeEmitter(MCII, MRI);
> + const MCRegisterInfo &MRI,
> + const MCSubtargetInfo &STI) {
> + return new R600MCCodeEmitter(MCII, MRI, STI);
> }
>
> void R600MCCodeEmitter::EncodeInstruction(const MCInst &MI, raw_ostream &OS,
>
>
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