[llvm] r182101 - FileCheckize test.
Benjamin Kramer
benny.kra at googlemail.com
Fri May 17 07:48:25 PDT 2013
Author: d0k
Date: Fri May 17 09:48:25 2013
New Revision: 182101
URL: http://llvm.org/viewvc/llvm-project?rev=182101&view=rev
Log:
FileCheckize test.
Modified:
llvm/trunk/test/CodeGen/X86/vec_insert-5.ll
Modified: llvm/trunk/test/CodeGen/X86/vec_insert-5.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_insert-5.ll?rev=182101&r1=182100&r2=182101&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_insert-5.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_insert-5.ll Fri May 17 09:48:25 2013
@@ -1,8 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 > %t
-; RUN: grep shll %t | grep 12
-; RUN: grep pslldq %t | grep 12
-; RUN: grep psrldq %t | grep 8
-; RUN: grep psrldq %t | grep 12
+; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s
; There are no MMX operations in @t1
define void @t1(i32 %a, x86_mmx* %P) nounwind {
@@ -12,22 +8,36 @@ define void @t1(i32 %a, x86_mmx* %P) no
%tmp23 = bitcast <2 x i32> %tmp22 to x86_mmx
store x86_mmx %tmp23, x86_mmx* %P
ret void
+
+; CHECK: t1:
+; CHECK-NOT: %mm
+; CHECK: shll $12
+; CHECK-NOT: %mm
}
define <4 x float> @t2(<4 x float>* %P) nounwind {
%tmp1 = load <4 x float>* %P
%tmp2 = shufflevector <4 x float> %tmp1, <4 x float> zeroinitializer, <4 x i32> < i32 4, i32 4, i32 4, i32 0 >
ret <4 x float> %tmp2
+
+; CHECK: t2:
+; CHECK: pslldq $12
}
define <4 x float> @t3(<4 x float>* %P) nounwind {
%tmp1 = load <4 x float>* %P
%tmp2 = shufflevector <4 x float> %tmp1, <4 x float> zeroinitializer, <4 x i32> < i32 2, i32 3, i32 4, i32 4 >
ret <4 x float> %tmp2
+
+; CHECK: t3:
+; CHECK: psrldq $8
}
define <4 x float> @t4(<4 x float>* %P) nounwind {
%tmp1 = load <4 x float>* %P
%tmp2 = shufflevector <4 x float> zeroinitializer, <4 x float> %tmp1, <4 x i32> < i32 7, i32 0, i32 0, i32 0 >
ret <4 x float> %tmp2
+
+; CHECK: t4:
+; CHECK: psrldq $12
}
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