[llvm] r182007 - [SystemZ] Tweak register array comment

[Richard Sandiford]

Author: rsandifo
Date: Thu May 16 08:39:02 2013
New Revision: 182007

URL: http://llvm.org/viewvc/llvm-project?rev=182007&view=rev
Log:
[SystemZ] Tweak register array comment

Modified:
    llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h

Modified: llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h?rev=182007&r1=182006&r2=182007&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h (original)
+++ llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h Thu May 16 08:39:02 2013
@@ -36,8 +36,11 @@ namespace SystemZMC {
   const int64_t CFAOffsetFromInitialSP = CallFrameSize;
 
   // Maps of asm register numbers to LLVM register numbers, with 0 indicating
-  // an invalid register.  We don't use the register classes directly because
-  // they specify the allocation order.
+  // an invalid register.  In principle we could use 32-bit and 64-bit register
+  // classes directly, provided that we relegated the GPR allocation order
+  // in SystemZRegisterInfo.td to an AltOrder and left the default order
+  // as %r0-%r15.  It seems better to provide the same interface for
+  // all classes though.
   extern const unsigned GR32Regs[16];
   extern const unsigned GR64Regs[16];
   extern const unsigned GR128Regs[16];