[llvm] r181976 - Extend test for better coverage.
Rafael Espindola
rafael.espindola at gmail.com
Wed May 15 20:48:50 PDT 2013
Author: rafael
Date: Wed May 15 22:48:50 2013
New Revision: 181976
URL: http://llvm.org/viewvc/llvm-project?rev=181976&view=rev
Log:
Extend test for better coverage.
Without this change nothing was covering this addFrameMove:
// For 64-bit SVR4 when we have spilled CRs, the spill location
// is SP+8, not a frame-relative slot.
if (Subtarget.isSVR4ABI()
&& Subtarget.isPPC64()
&& (PPC::CR2 <= Reg && Reg <= PPC::CR4)) {
MachineLocation CSDst(PPC::X1, 8);
MachineLocation CSSrc(PPC::CR2);
MMI.addFrameMove(Label, CSDst, CSSrc);
continue;
}
Modified:
llvm/trunk/test/CodeGen/PowerPC/crsave.ll
Modified: llvm/trunk/test/CodeGen/PowerPC/crsave.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/crsave.ll?rev=181976&r1=181975&r2=181976&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/crsave.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/crsave.ll Wed May 15 22:48:50 2013
@@ -3,7 +3,7 @@
declare void @foo()
-define i32 @test_cr2() nounwind {
+define i32 @test_cr2() nounwind uwtable {
entry:
%ret = alloca i32, align 4
%0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmp 2,$2,$1\0A\09mfcr $0", "=r,r,r,r,r,~{cr2}"(i32 1, i32 2, i32 3, i32 0) nounwind
@@ -20,12 +20,17 @@ entry:
; PPC32: lwz 12, 24(31)
; PPC32-NEXT: mtcrf 32, 12
+; PPC64: .cfi_startproc
; PPC64: mfcr 12
; PPC64: stw 12, 8(1)
; PPC64: stdu 1, -[[AMT:[0-9]+]](1)
+; PPC64: .cfi_def_cfa_offset 128
+; PPC64: .cfi_offset lr, 16
+; PPC64: .cfi_offset cr2, 8
; PPC64: addi 1, 1, [[AMT]]
; PPC64: lwz 12, 8(1)
; PPC64: mtcrf 32, 12
+; PPC64: .cfi_endproc
define i32 @test_cr234() nounwind {
entry:
More information about the llvm-commits
mailing list