[llvm] r181897 - Support unaligned load/store on more ARM targets

[Anton Korobeynikov]

Derek,

Please revert. The patch is still under review / discussion.

On Wed, May 15, 2013 at 8:08 PM, Derek Schuff <dschuff at google.com> wrote:
> Author: dschuff
> Date: Wed May 15 11:08:30 2013
> New Revision: 181897
>
> URL: http://llvm.org/viewvc/llvm-project?rev=181897&view=rev
> Log:
> Support unaligned load/store on more ARM targets
>
> This patch matches GCC behavior: the code used to only allow unaligned
> load/store on ARM for v6+ Darwin, it will now allow unaligned load/store for
> v6+ Darwin as well as for v7+ on other targets.
>
> The distinction is made because v6 doesn't guarantee support (but LLVM assumes
> that Apple controls hardware+kernel and therefore have conformant v6 CPUs),
> whereas v7 does provide this guarantee (and Linux behaves sanely).
>
> Overall this should slightly improve performance in most cases because of
> reduced I$ pressure.
>
> Patch by JF Bastien
>
> Modified:
>     llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp
>
> Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp?rev=181897&r1=181896&r2=181897&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp Wed May 15 11:08:30 2013
> @@ -162,10 +162,23 @@ void ARMSubtarget::resetSubtargetFeature
>    if (!isThumb() || hasThumb2())
>      PostRAScheduler = true;
>
> -  // v6+ may or may not support unaligned mem access depending on the system
> -  // configuration.
> -  if (!StrictAlign && hasV6Ops() && isTargetDarwin())
> -    AllowsUnalignedMem = true;
> +  if (!StrictAlign) {
> +    // Assume pre-ARMv6 doesn't support unaligned accesses.
> +    //
> +    // ARMv6 may or may not support unaligned accesses depending on the
> +    // SCTLR.U bit, which is architecture-specific. We assume ARMv6
> +    // Darwin targets support unaligned accesses, and others don't.
> +    //
> +    // ARMv7 always has SCTLR.U set to 1, but it has a new SCTLR.A bit
> +    // which raises an alignment fault on unaligned accesses. Linux
> +    // defaults this bit to 0 and handles it as a system-wide (not
> +    // per-process) setting. It is therefore safe to assume that ARMv7+
> +    // targets support unaligned accesses.
> +    //
> +    // The above behavior is consistent with GCC.
> +    if (hasV7Ops() || (hasV6Ops() && isTargetDarwin()))
> +      AllowsUnalignedMem = true;
> +  }
>
>    // NEON f32 ops are non-IEEE 754 compliant. Darwin is ok with it by default.
>    uint64_t Bits = getFeatureBits();
>
>
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-- 
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University