[PATCH] ARM ISel: Don't create illegal types during LowerMUL

[Arnold Schwaighofer]

The transformation happening here is that we want to turn a
"mul(ext(X), ext(X))" into a "vmull(X, X)", stripping off the extension. We have
to make sure that X still has a valid vector type - possibly recreate an
extension to a smaller type. In case of a extload of a memory type smaller than
64 bit we used create a ext(load()). The problem with doing this - instead of
recreating an extload - is that an illegal type is exposed.

This patch fixes this by creating extloads instead of ext(load()) sequences.

Fixes PR15970.

radar://13871383

>From the bug report:

Initially we had a

  mul (v4i32 zextload(from v4i8), v4i32 zextload(from v4i8))

the transform should create

  vmull(v4i16 zextload(from v4i8), ...)

out of this. But instead it creates a

  vmull(v4i16 zext( v4i8 load()), ...

where an illegal type is exposed.

(This would only be exposed if this transform would run during normal legalization because vector legalization is allowed to create illegal types.)

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