[llvm] r181800 - PPC32: Fix stack collision between FP and CR save areas.
Hal Finkel
hfinkel at anl.gov
Tue May 14 09:37:06 PDT 2013
Bill,
Please pull this bug fix into the release branch if possible.
-Hal
----- Original Message -----
> Author: wschmidt
> Date: Tue May 14 11:08:32 2013
> New Revision: 181800
>
> URL: http://llvm.org/viewvc/llvm-project?rev=181800&view=rev
> Log:
> PPC32: Fix stack collision between FP and CR save areas.
>
> The changes to CR spill handling missed a case for 32-bit PowerPC.
> The code in PPCFrameLowering::processFunctionBeforeFrameFinalized()
> checks whether CR spill has occurred using a flag in the function
> info. This flag is only set by storeRegToStackSlot and
> loadRegFromStackSlot. spillCalleeSavedRegisters does not call
> storeRegToStackSlot, but instead produces MI directly. Thus we don't
> see the CR is spilled when assigning frame offsets, and the CR spill
> ends up colliding with some other location (generally the FP slot).
>
> This patch sets the flag in spillCalleeSavedRegisters for PPC32 so
> that the CR spill is properly detected and gets its own slot in the
> stack frame.
>
> Modified:
> llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp
> llvm/trunk/test/CodeGen/PowerPC/crsave.ll
>
> Modified: llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp?rev=181800&r1=181799&r2=181800&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp (original)
> +++ llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp Tue May 14
> 11:08:32 2013
> @@ -1168,6 +1168,7 @@ PPCFrameLowering::spillCalleeSavedRegist
> FuncInfo->addMustSaveCR(Reg);
> } else {
> CRSpilled = true;
> + FuncInfo->setSpillsCR();
>
> // 32-bit: FP-relative. Note that we made sure CR2-CR4 all have
> // the same frame index in PPCRegisterInfo::hasReservedSpillSlot.
>
> Modified: llvm/trunk/test/CodeGen/PowerPC/crsave.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/crsave.ll?rev=181800&r1=181799&r2=181800&view=diff
> ==============================================================================
> --- llvm/trunk/test/CodeGen/PowerPC/crsave.ll (original)
> +++ llvm/trunk/test/CodeGen/PowerPC/crsave.ll Tue May 14 11:08:32
> 2013
> @@ -13,9 +13,11 @@ entry:
> ret i32 %1
> }
>
> +; PPC32: stw 31, -4(1)
> +; PPC32: stwu 1, -32(1)
> ; PPC32: mfcr 12
> -; PPC32-NEXT: stw 12, {{[0-9]+}}(31)
> -; PPC32: lwz 12, {{[0-9]+}}(31)
> +; PPC32-NEXT: stw 12, 24(31)
> +; PPC32: lwz 12, 24(31)
> ; PPC32-NEXT: mtcrf 32, 12
>
> ; PPC64: mfcr 12
> @@ -35,9 +37,11 @@ entry:
> ret i32 %1
> }
>
> +; PPC32: stw 31, -4(1)
> +; PPC32: stwu 1, -32(1)
> ; PPC32: mfcr 12
> -; PPC32-NEXT: stw 12, {{[0-9]+}}(31)
> -; PPC32: lwz 12, {{[0-9]+}}(31)
> +; PPC32-NEXT: stw 12, 24(31)
> +; PPC32: lwz 12, 24(31)
> ; PPC32-NEXT: mtcrf 32, 12
> ; PPC32-NEXT: mtcrf 16, 12
> ; PPC32-NEXT: mtcrf 8, 12
>
>
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