[PATCH] Fix ARM FastISel tests, as a first step to enabling ARM FastISel

[Eric Christopher]

Actually, wait, reserved register differences? Shouldn't be different
with the same triple, etc or is this just setting up for adding more
triples? :)

-eric

On Mon, May 13, 2013 at 3:26 PM, Eric Christopher <echristo at gmail.com> wrote:
> LGTM.
>
> -eric
>
> On Mon, May 13, 2013 at 3:23 PM, JF Bastien <jfb at google.com> wrote:
>> ARM FastISel is currently only enabled for iOS non-Thumb1, and I'm working
>> on enabling it for other targets. As a first step I've fixed some of the
>> tests.
>>
>> Changes to ARM FastISel tests:
>> - Different triples don't generate the same relocations (especially
>> movw/movt versus constant pool loads). Use a regex to allow either.
>> - Mangling is different. Use a regex to allow either.
>> - The reserved registers are sometimes different, so registers get allocated
>> in a different order. Capture the names only where this occurs.
>> - Add -verify-machineinstrs to some tests where it works. It doesn't work
>> everywhere it should yet.
>> - Add -fast-isel-abort to many tests that didn't have it before.
>> - Split out the VarArg test from fast-isel-call.ll into its own test. This
>> simplifies test setup because of --check-prefix.
>>
>> I'm mostly done with code changes to enable ARM FastISel and will upload
>> separate patches for this. I still have an issue outstanding with lencod,
>> which I'm lead to understand might be tricky.