[llvm] r181579 - R600: Expand SUB for v2i32/v4i32

Tom Stellard thomas.stellard at amd.com
Thu May 9 19:09:39 PDT 2013


Author: tstellar
Date: Thu May  9 21:09:39 2013
New Revision: 181579

URL: http://llvm.org/viewvc/llvm-project?rev=181579&view=rev
Log:
R600: Expand SUB for v2i32/v4i32

Patch by: Aaron Watry

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
Signed-off-by: Aaron Watry <awatry at gmail.com>

NOTE: This is a candidate for the 3.3 branch.

Added:
    llvm/trunk/test/CodeGen/R600/sub.ll
Modified:
    llvm/trunk/lib/Target/R600/R600ISelLowering.cpp

Modified: llvm/trunk/lib/Target/R600/R600ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/R600ISelLowering.cpp?rev=181579&r1=181578&r2=181579&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/R600ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/R600/R600ISelLowering.cpp Thu May  9 21:09:39 2013
@@ -54,6 +54,8 @@ R600TargetLowering::R600TargetLowering(T
   setOperationAction(ISD::SRL, MVT::v2i32, Expand);
   setOperationAction(ISD::SRA, MVT::v4i32, Expand);
   setOperationAction(ISD::SRA, MVT::v2i32, Expand);
+  setOperationAction(ISD::SUB, MVT::v4i32, Expand);
+  setOperationAction(ISD::SUB, MVT::v2i32, Expand);
   setOperationAction(ISD::UINT_TO_FP, MVT::v4i32, Expand);
   setOperationAction(ISD::UDIV, MVT::v4i32, Expand);
   setOperationAction(ISD::UREM, MVT::v4i32, Expand);

Added: llvm/trunk/test/CodeGen/R600/sub.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/sub.ll?rev=181579&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/R600/sub.ll (added)
+++ llvm/trunk/test/CodeGen/R600/sub.ll Thu May  9 21:09:39 2013
@@ -0,0 +1,15 @@
+;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
+
+;CHECK: SUB_INT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
+;CHECK: SUB_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
+;CHECK: SUB_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
+;CHECK: SUB_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
+
+define void @test(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
+  %b_ptr = getelementptr <4 x i32> addrspace(1)* %in, i32 1
+  %a = load <4 x i32> addrspace(1) * %in
+  %b = load <4 x i32> addrspace(1) * %b_ptr
+  %result = sub <4 x i32> %a, %b
+  store <4 x i32> %result, <4 x i32> addrspace(1)* %out
+  ret void
+}





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