[llvm] r181459 - [mips] Add instruction selection pattern for (seteq $LHS, 0).

[Akira Hatanaka]

Author: ahatanak
Date: Wed May  8 14:38:04 2013
New Revision: 181459

URL: http://llvm.org/viewvc/llvm-project?rev=181459&view=rev
Log:
[mips] Add instruction selection pattern for (seteq $LHS, 0).


Added:
    llvm/trunk/test/CodeGen/Mips/setcc-se.ll
Modified:
    llvm/trunk/lib/Target/Mips/MipsInstrInfo.td

Modified: llvm/trunk/lib/Target/Mips/MipsInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrInfo.td?rev=181459&r1=181458&r2=181459&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsInstrInfo.td Wed May  8 14:38:04 2013
@@ -1263,6 +1263,8 @@ defm : BrcondPats<CPURegs, BEQ, BNE, SLT
 // setcc patterns
 multiclass SeteqPats<RegisterClass RC, Instruction SLTiuOp, Instruction XOROp,
                      Instruction SLTuOp, Register ZEROReg> {
+  def : MipsPat<(seteq RC:$lhs, 0),
+                (SLTiuOp RC:$lhs, 1)>;
   def : MipsPat<(seteq RC:$lhs, RC:$rhs),
                 (SLTiuOp (XOROp RC:$lhs, RC:$rhs), 1)>;
   def : MipsPat<(setne RC:$lhs, RC:$rhs),

Added: llvm/trunk/test/CodeGen/Mips/setcc-se.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/setcc-se.ll?rev=181459&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/setcc-se.ll (added)
+++ llvm/trunk/test/CodeGen/Mips/setcc-se.ll Wed May  8 14:38:04 2013
@@ -0,0 +1,11 @@
+; RUN: llc -march=mipsel < %s | FileCheck %s
+
+; CHECK: seteq0:
+; CHECK: sltiu ${{[0-9]+}}, $4, 1
+
+define i32 @seteq0(i32 %a) {
+entry:
+  %cmp = icmp eq i32 %a, 0
+  %conv = zext i1 %cmp to i32
+  ret i32 %conv
+}