[llvm] r181132 - AArch64: implement relocations for global access
Tim Northover
Tim.Northover at arm.com
Sat May 4 13:14:04 PDT 2013
Author: tnorthover
Date: Sat May 4 15:14:04 2013
New Revision: 181132
URL: http://llvm.org/viewvc/llvm-project?rev=181132&view=rev
Log:
AArch64: implement relocations for global access
The large memory model (default and main viable for JIT) emits
addresses in need of relocation as
movz x0, #:abs_g3:somewhere
movk x0, #:abs_g2_nc:somewhere
movk x0, #:abs_g1_nc:somewhere
movk x0, #:abs_g0_nc:somewhere
To support this we must implement those four relocations in the
dynamic loader.
This allows (for example) the test-global.ll MCJIT test to pass on
AArch64.
Modified:
llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
Modified: llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp?rev=181132&r1=181131&r2=181132&view=diff
==============================================================================
--- llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp Sat May 4 15:14:04 2013
@@ -296,6 +296,37 @@ void RuntimeDyldELF::resolveAArch64Reloc
*TargetPtr = static_cast<uint32_t>(Result & 0xffffffffU);
break;
}
+ case ELF::R_AARCH64_MOVW_UABS_G3: {
+ uint64_t Result = Value + Addend;
+ // Immediate goes in bits 20:5 of MOVZ/MOVK instruction
+ *TargetPtr |= Result >> (48 - 5);
+ // Shift is "lsl #48", in bits 22:21
+ *TargetPtr |= 3 << 21;
+ break;
+ }
+ case ELF::R_AARCH64_MOVW_UABS_G2_NC: {
+ uint64_t Result = Value + Addend;
+ // Immediate goes in bits 20:5 of MOVZ/MOVK instruction
+ *TargetPtr |= ((Result & 0xffff00000000ULL) >> (32 - 5));
+ // Shift is "lsl #32", in bits 22:21
+ *TargetPtr |= 2 << 21;
+ break;
+ }
+ case ELF::R_AARCH64_MOVW_UABS_G1_NC: {
+ uint64_t Result = Value + Addend;
+ // Immediate goes in bits 20:5 of MOVZ/MOVK instruction
+ *TargetPtr |= ((Result & 0xffff0000U) >> (16 - 5));
+ // Shift is "lsl #16", in bits 22:21
+ *TargetPtr |= 1 << 21;
+ break;
+ }
+ case ELF::R_AARCH64_MOVW_UABS_G0_NC: {
+ uint64_t Result = Value + Addend;
+ // Immediate goes in bits 20:5 of MOVZ/MOVK instruction
+ *TargetPtr |= ((Result & 0xffffU) << 5);
+ // Shift is "lsl #0", in bits 22:21. No action needed.
+ break;
+ }
}
}
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