[llvm] r181052 - [PowerPC] Add some Book II instructions to AsmParser

[Ulrich Weigand]

Author: uweigand
Date: Fri May  3 14:51:09 2013
New Revision: 181052

URL: http://llvm.org/viewvc/llvm-project?rev=181052&view=rev
Log:

[PowerPC] Add some Book II instructions to AsmParser

This patch adds a couple of Book II instructions (isync, icbi) to the
PowerPC assembler parser.  These are needed when bootstrapping clang
with the integrated assembler forced on, because they are used in
inline asm statements in the code base.

The test case adds the full list of Book II storage control instructions,
including associated extended mnemonics.  Again, those that are not yet
supported as marked as FIXME.


Added:
    llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookII.s
Modified:
    llvm/trunk/lib/Target/PowerPC/PPCInstrFormats.td
    llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td

Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrFormats.td?rev=181052&r1=181051&r2=181052&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrFormats.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrFormats.td Fri May  3 14:51:09 2013
@@ -365,6 +365,12 @@ class XForm_1<bits<6> opcode, bits<10> x
               InstrItinClass itin, list<dag> pattern> 
   : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern>;
 
+class XForm_1a<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
+              InstrItinClass itin, list<dag> pattern>
+  : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
+  let RST = 0;
+}
+
 class XForm_6<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
               InstrItinClass itin, list<dag> pattern> 
   : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> {

Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?rev=181052&r1=181051&r2=181052&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Fri May  3 14:51:09 2013
@@ -2112,6 +2112,17 @@ def : Pat<(fma f32:$A, (fneg f32:$C), f3
 include "PPCInstrAltivec.td"
 include "PPCInstr64Bit.td"
 
+
+//===----------------------------------------------------------------------===//
+// PowerPC Instructions used for assembler/disassembler only
+//
+
+def ISYNC : XLForm_2_ext<19, 150, 0, 0, 0, (outs), (ins),
+                         "isync", SprISYNC, []>;
+
+def ICBI : XForm_1a<31, 982, (outs), (ins memrr:$src),
+                    "icbi $src", LdStICBI, []>;
+
 //===----------------------------------------------------------------------===//
 // PowerPC Assembler Instruction Aliases
 //

Added: llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookII.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookII.s?rev=181052&view=auto
==============================================================================
--- llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookII.s (added)
+++ llvm/trunk/test/MC/PowerPC/ppc64-encoding-bookII.s Fri May  3 14:51:09 2013
@@ -0,0 +1,58 @@
+
+# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck %s
+
+# Cache management instruction
+
+# FIXME: icbi 2, 3
+# FIXME: icbt 1, 2, 3
+
+# FIXME: dcbt 2, 3, 10
+# FIXME: dcbtst 2, 3, 10
+# CHECK: dcbz 2, 3                       # encoding: [0x7c,0x02,0x1f,0xec]
+         dcbz 2, 3
+# CHECK: dcbst 2, 3                      # encoding: [0x7c,0x02,0x18,0x6c]
+         dcbst 2, 3
+# FIXME: dcbf 2, 3, 1
+
+# Synchronization instructions
+
+# FIXME: isync
+
+# FIXME: lbarx 2, 3, 4, 1
+# FIXME: lharx 2, 3, 4, 1
+# FIXME: lwarx 2, 3, 4, 1
+# FIXME: ldarx 2, 3, 4, 1
+
+# FIXME: stbcx. 2, 3, 4
+# FIXME: sthcx. 2, 3, 4
+# CHECK: stwcx. 2, 3, 4                  # encoding: [0x7c,0x43,0x21,0x2d]
+         stwcx. 2, 3, 4
+# CHECK: stdcx. 2, 3, 4                  # encoding: [0x7c,0x43,0x21,0xad]
+         stdcx. 2, 3, 4
+
+# FIXME: sync 2
+# FIXME: eieio
+# FIXME: wait 2
+
+# Extended mnemonics
+
+# CHECK: dcbf 2, 3                       # encoding: [0x7c,0x02,0x18,0xac]
+         dcbf 2, 3
+# FIXME: dcbfl 2, 3
+
+# FIXME: lbarx 2, 3, 4
+# FIXME: lharx 2, 3, 4
+# CHECK: lwarx 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x28]
+         lwarx 2, 3, 4
+# CHECK: ldarx 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0xa8]
+         ldarx 2, 3, 4
+
+# CHECK: sync                            # encoding: [0x7c,0x00,0x04,0xac]
+         sync
+# FIXME: lwsync
+# FIXME: ptesync
+
+# FIXME: wait
+# FIXME: waitrsv
+# FIXME: waitimpl
+