[llvm] r180742 - Rewrite some tests with FileCHeck in X86 codegen
Michael Liao
michael.liao at intel.com
Mon Apr 29 15:41:30 PDT 2013
Author: hliao
Date: Mon Apr 29 17:41:29 2013
New Revision: 180742
URL: http://llvm.org/viewvc/llvm-project?rev=180742&view=rev
Log:
Rewrite some tests with FileCHeck in X86 codegen
- Revise previous patches of the same purpose by fixing
*) grep <PA> | not grep <PB> semantically is not the same as
CHECK: <PA>{{^<PB>.*$}} as the former will check all occurrences of <PA>
while the later only check the first match. As the result, CHECK needs
putting in all place where <PA> occurs.
*) grep <PA> | count <N> needs a final CHECK-NOT of the same pattern.
(As 'CHECK-<N>' is proposed for discussion, converting 'grep | count <N>'
where N > 1 is postponed.)
Modified:
llvm/trunk/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll
llvm/trunk/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll
llvm/trunk/test/CodeGen/X86/2008-11-06-testb.ll
llvm/trunk/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll
llvm/trunk/test/CodeGen/X86/fastcc-byval.ll
llvm/trunk/test/CodeGen/X86/fastcc-sret.ll
llvm/trunk/test/CodeGen/X86/fastcc3struct.ll
llvm/trunk/test/CodeGen/X86/fp_load_cast_fold.ll
llvm/trunk/test/CodeGen/X86/mmx-pinsrw.ll
llvm/trunk/test/CodeGen/X86/peep-test-2.ll
llvm/trunk/test/CodeGen/X86/private-2.ll
llvm/trunk/test/CodeGen/X86/store-fp-constant.ll
llvm/trunk/test/CodeGen/X86/subreg-to-reg-1.ll
llvm/trunk/test/CodeGen/X86/subreg-to-reg-3.ll
llvm/trunk/test/CodeGen/X86/switch-crit-edge-constant.ll
llvm/trunk/test/CodeGen/X86/v4f32-immediate.ll
llvm/trunk/test/CodeGen/X86/vec_set-B.ll
llvm/trunk/test/CodeGen/X86/vec_zero_cse.ll
llvm/trunk/test/CodeGen/X86/x86-64-frameaddr.ll
llvm/trunk/test/CodeGen/X86/x86-64-pic-3.ll
Modified: llvm/trunk/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll?rev=180742&r1=180741&r2=180742&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll Mon Apr 29 17:41:29 2013
@@ -1,4 +1,8 @@
-; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | grep inc | not grep PTR
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | FileCheck %s
+
+; CHECK: inc
+; CHECK-NOT: PTR
+; CHECK: {{$}}
define signext i16 @t(i32* %bitptr, i32* %source, i8** %byteptr, i32 %scale, i32 %round) {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll?rev=180742&r1=180741&r2=180742&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll Mon Apr 29 17:41:29 2013
@@ -1,5 +1,4 @@
-; RUN: llc < %s | grep "a:" | not grep ax
-; RUN: llc < %s | grep "b:" | not grep ax
+; RUN: llc < %s | FileCheck %s
; PR2078
; The clobber list says that "ax" is clobbered. Make sure that eax isn't
; allocated to the input/output register.
@@ -15,6 +14,10 @@ entry:
ret void
}
+; CHECK: a:
+; CHECK-NOT: ax
+; CHECK: {{$}}
+
define void @test2(i16* %block, i8* %pixels, i32 %line_size) nounwind {
entry:
%tmp1 = getelementptr i16* %block, i32 64 ; <i16*> [#uses=1]
@@ -22,3 +25,6 @@ entry:
ret void
}
+; CHECK: b:
+; CHECK-NOT: ax
+; CHECK: {{$}}
Modified: llvm/trunk/test/CodeGen/X86/2008-11-06-testb.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-11-06-testb.ll?rev=180742&r1=180741&r2=180742&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-11-06-testb.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-11-06-testb.ll Mon Apr 29 17:41:29 2013
@@ -1,4 +1,6 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin | grep testb
+; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s
+
+; CHECK: testb
; ModuleID = '<stdin>'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
Modified: llvm/trunk/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll?rev=180742&r1=180741&r2=180742&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll Mon Apr 29 17:41:29 2013
@@ -1,8 +1,9 @@
-; RUN: llc < %s -relocation-model=static > %t
-; RUN: grep "1: ._pv_cpu_ops+8" %t
-; RUN: grep "2: ._G" %t
+; RUN: llc < %s -relocation-model=static | FileCheck %s
; PR4152
+; CHECK: {{1: ._pv_cpu_ops[+]8}}
+; CHECK: {{2: ._G}}
+
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9.6"
%struct.pv_cpu_ops = type { i32, [2 x i32] }
Modified: llvm/trunk/test/CodeGen/X86/fastcc-byval.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fastcc-byval.ll?rev=180742&r1=180741&r2=180742&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fastcc-byval.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fastcc-byval.ll Mon Apr 29 17:41:29 2013
@@ -1,6 +1,7 @@
; RUN: llc < %s -tailcallopt=false | FileCheck %s
; CHECK: movl 8(%esp), %eax
; CHECK: movl 8(%esp), %eax
+; CHECK-NOT: movl 8(%esp), %eax
; PR3122
; rdar://6400815
Modified: llvm/trunk/test/CodeGen/X86/fastcc-sret.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fastcc-sret.ll?rev=180742&r1=180741&r2=180742&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fastcc-sret.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fastcc-sret.ll Mon Apr 29 17:41:29 2013
@@ -1,5 +1,4 @@
; RUN: llc < %s -march=x86 -tailcallopt=false | FileCheck %s
-; CHECK: ret{{[^4]*$}}
%struct.foo = type { [4 x i32] }
@@ -10,6 +9,8 @@ entry:
store i32 1, i32* %tmp3, align 8
ret void
}
+; CHECK: bar
+; CHECK: ret{{[^4]*$}}
@dst = external global i32
@@ -22,3 +23,5 @@ define void @foo() nounwind {
store i32 %tmp6, i32* @dst
ret void
}
+; CHECK: foo
+; CHECK: ret{{[^4]*$}}
Modified: llvm/trunk/test/CodeGen/X86/fastcc3struct.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fastcc3struct.ll?rev=180742&r1=180741&r2=180742&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fastcc3struct.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fastcc3struct.ll Mon Apr 29 17:41:29 2013
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 -o %t
-; RUN: FileCheck %s -input-file %t
+; RUN: llc < %s -march=x86 | FileCheck %s
+
; CHECK: movl {{.}}12, %eax
; CHECK: movl {{.}}24, %edx
; CHECK: movl {{.}}48, %ecx
Modified: llvm/trunk/test/CodeGen/X86/fp_load_cast_fold.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fp_load_cast_fold.ll?rev=180742&r1=180741&r2=180742&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fp_load_cast_fold.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fp_load_cast_fold.ll Mon Apr 29 17:41:29 2013
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep fild | not grep ESP
+; RUN: llc < %s -march=x86 | FileCheck %s
define double @short(i16* %P) {
%V = load i16* %P ; <i16> [#uses=1]
@@ -18,3 +18,9 @@ define double @long(i64* %P) {
ret double %V2
}
+; CHECK: long
+; CHECK: fild
+; CHECK-NOT: ESP
+; CHECK-NOT: esp
+; CHECK: {{$}}
+; CHECK: ret
Modified: llvm/trunk/test/CodeGen/X86/mmx-pinsrw.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mmx-pinsrw.ll?rev=180742&r1=180741&r2=180742&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mmx-pinsrw.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mmx-pinsrw.ll Mon Apr 29 17:41:29 2013
@@ -1,6 +1,8 @@
-; RUN: llc < %s -mtriple=x86_64-linux -mcpu=corei7 | grep pinsr
+; RUN: llc < %s -mtriple=x86_64-linux -mcpu=corei7 | FileCheck %s
; PR2562
+; CHECK: pinsr
+
external global i16 ; <i16*>:0 [#uses=1]
external global <4 x i16> ; <<4 x i16>*>:1 [#uses=2]
Modified: llvm/trunk/test/CodeGen/X86/peep-test-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/peep-test-2.ll?rev=180742&r1=180741&r2=180742&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/peep-test-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/peep-test-2.ll Mon Apr 29 17:41:29 2013
@@ -1,4 +1,6 @@
-; RUN: llc < %s -march=x86 | grep testl
+; RUN: llc < %s -march=x86 | FileCheck %s
+
+; CHECK: testl
; It's tempting to eliminate the testl instruction here and just use the
; EFLAGS value from the incl, however it can't be known whether the add
Modified: llvm/trunk/test/CodeGen/X86/private-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/private-2.ll?rev=180742&r1=180741&r2=180742&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/private-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/private-2.ll Mon Apr 29 17:41:29 2013
@@ -1,7 +1,9 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | grep L__ZZ20
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s
; Quote should be outside of private prefix.
; rdar://6855766x
+; CHECK: L__ZZ20
+
%struct.A = type { i32*, i32 }
@"_ZZ20-[Example1 whatever]E4C.91" = private constant %struct.A { i32* null, i32 1 } ; <%struct.A*> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/store-fp-constant.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/store-fp-constant.ll?rev=180742&r1=180741&r2=180742&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/store-fp-constant.ll (original)
+++ llvm/trunk/test/CodeGen/X86/store-fp-constant.ll Mon Apr 29 17:41:29 2013
@@ -1,5 +1,8 @@
-; RUN: llc < %s -march=x86 | not grep rodata
-; RUN: llc < %s -march=x86 | not grep literal
+; RUN: llc < %s -march=x86 | FileCheck %s
+
+; CHECK-NOT: rodata
+; CHECK-NOT: literal
+
;
; Check that no FP constants in this testcase ends up in the
; constant pool.
Modified: llvm/trunk/test/CodeGen/X86/subreg-to-reg-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/subreg-to-reg-1.ll?rev=180742&r1=180741&r2=180742&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/subreg-to-reg-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/subreg-to-reg-1.ll Mon Apr 29 17:41:29 2013
@@ -1,4 +1,7 @@
-; RUN: llc < %s -march=x86-64 | grep "leal .*), %e.*" | count 1
+; RUN: llc < %s -march=x86-64 | FileCheck %s
+
+; CHECK: {{leal .*[)], %e.*}}
+; CHECK-NOT: {{leal .*[)], %e.*}}
; Don't eliminate or coalesce away the explicit zero-extension!
; This is currently using an leal because of a 3-addressification detail,
Modified: llvm/trunk/test/CodeGen/X86/subreg-to-reg-3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/subreg-to-reg-3.ll?rev=180742&r1=180741&r2=180742&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/subreg-to-reg-3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/subreg-to-reg-3.ll Mon Apr 29 17:41:29 2013
@@ -1,4 +1,6 @@
-; RUN: llc < %s -march=x86-64 | grep imull
+; RUN: llc < %s -march=x86-64 | FileCheck %s
+
+; CHECK: imull
; Don't eliminate or coalesce away the explicit zero-extension!
Modified: llvm/trunk/test/CodeGen/X86/switch-crit-edge-constant.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/switch-crit-edge-constant.ll?rev=180742&r1=180741&r2=180742&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/switch-crit-edge-constant.ll (original)
+++ llvm/trunk/test/CodeGen/X86/switch-crit-edge-constant.ll Mon Apr 29 17:41:29 2013
@@ -1,6 +1,8 @@
; PR925
-; RUN: llc < %s -march=x86 | \
-; RUN: grep mov.*str1 | count 1
+; RUN: llc < %s -march=x86 | FileCheck %s
+
+; CHECK: {{mov.*str1}}
+; CHECK-NOT: {{mov.*str1}}
target datalayout = "e-p:32:32"
target triple = "i686-apple-darwin8.7.2"
Modified: llvm/trunk/test/CodeGen/X86/v4f32-immediate.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/v4f32-immediate.ll?rev=180742&r1=180741&r2=180742&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/v4f32-immediate.ll (original)
+++ llvm/trunk/test/CodeGen/X86/v4f32-immediate.ll Mon Apr 29 17:41:29 2013
@@ -1,4 +1,6 @@
-; RUN: llc < %s -march=x86 -mattr=+sse | grep movaps
+; RUN: llc < %s -march=x86 -mattr=+sse | FileCheck %s
+
+; CHECK: movaps
define <4 x float> @foo() {
ret <4 x float> <float 0x4009C9D0A0000000, float 0x4002666660000000, float 0x3FF3333340000000, float 0x3FB99999A0000000>
Modified: llvm/trunk/test/CodeGen/X86/vec_set-B.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_set-B.ll?rev=180742&r1=180741&r2=180742&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_set-B.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_set-B.ll Mon Apr 29 17:41:29 2013
@@ -1,6 +1,8 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep movaps
+; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s
; RUN: llc < %s -march=x86 -mattr=+sse2 | grep esp | count 2
+; CHECK-NOT: movaps
+
; These should both generate something like this:
;_test3:
; movl $1234567, %eax
Modified: llvm/trunk/test/CodeGen/X86/vec_zero_cse.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_zero_cse.ll?rev=180742&r1=180741&r2=180742&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_zero_cse.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_zero_cse.ll Mon Apr 29 17:41:29 2013
@@ -1,7 +1,13 @@
-; RUN: llc < %s -relocation-model=static -march=x86 -mcpu=yonah | grep xorps | count 1
-; RUN: llc < %s -relocation-model=static -march=x86 -mcpu=yonah | grep pcmpeqd | count 1
+; RUN: llc < %s -relocation-model=static -march=x86 -mcpu=yonah | FileCheck %s
+; RUN: llc < %s -relocation-model=static -march=x86 -mcpu=yonah | FileCheck -check-prefix CHECK2 %s
; 64-bit stores here do not use MMX.
+; CHECK: xorps
+; CHECK-NOT: xorps
+
+; CHECK2: pcmpeqd
+; CHECK2-NOT: pcmpeqd
+
@M1 = external global <1 x i64>
@M2 = external global <2 x i32>
Modified: llvm/trunk/test/CodeGen/X86/x86-64-frameaddr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-64-frameaddr.ll?rev=180742&r1=180741&r2=180742&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x86-64-frameaddr.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x86-64-frameaddr.ll Mon Apr 29 17:41:29 2013
@@ -1,4 +1,9 @@
-; RUN: llc < %s -march=x86-64 | grep movq | grep rbp
+; RUN: llc < %s -march=x86-64 | FileCheck %s
+
+; CHECK: stack_end_address
+; CHECK: {{movq.+rbp.*$}}
+; CHECK: {{movq.+rbp.*$}}
+; CHECK: ret
define i64* @stack_end_address() nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/x86-64-pic-3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-64-pic-3.ll?rev=180742&r1=180741&r2=180742&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x86-64-pic-3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x86-64-pic-3.ll Mon Apr 29 17:41:29 2013
@@ -1,6 +1,9 @@
-; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1
-; RUN: grep "callq f" %t1
-; RUN: not grep "callq f at PLT" %t1
+; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic | FileCheck %s
+
+
+; CHECK-NOT: {{callq f at PLT}}
+; CHECK: {{callq f}}
+; CHECK-NOT: {{callq f at PLT}}
define void @g() {
entry:
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