[llvm] r180129 - DAGCombine should not aggressively fold SEXT(VSETCC(...)) into a wider VSETCC without first checking the target's vector boolean contents.
Tom Stellard
tom at stellard.net
Wed Apr 24 08:49:01 PDT 2013
Hi Owen,
This change breaks the R600 setcc.ll test. It looks like the problem is
R600 never sets setBooleanVectorContents(). I will try to fix this today.
-Tom
On Tue, Apr 23, 2013 at 06:09:28PM -0000, Owen Anderson wrote:
> Author: resistor
> Date: Tue Apr 23 13:09:28 2013
> New Revision: 180129
>
> URL: http://llvm.org/viewvc/llvm-project?rev=180129&view=rev
> Log:
> DAGCombine should not aggressively fold SEXT(VSETCC(...)) into a wider VSETCC without first checking the target's vector boolean contents.
> This exposed an issue with PowerPC AltiVec where it appears it was setting the wrong vector boolean contents. The included change
> fixes the PowerPC tests, and was OK'd by Hal.
>
> Modified:
> llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
> llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=180129&r1=180128&r2=180129&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Tue Apr 23 13:09:28 2013
> @@ -4451,7 +4451,9 @@ SDValue DAGCombiner::visitSIGN_EXTEND(SD
> if (N0.getOpcode() == ISD::SETCC) {
> // sext(setcc) -> sext_in_reg(vsetcc) for vectors.
> // Only do this before legalize for now.
> - if (VT.isVector() && !LegalOperations) {
> + if (VT.isVector() && !LegalOperations &&
> + TLI.getBooleanContents(true) ==
> + TargetLowering::ZeroOrNegativeOneBooleanContent) {
> EVT N0VT = N0.getOperand(0).getValueType();
> // On some architectures (such as SSE/NEON/etc) the SETCC result type is
> // of the same size as the compared operands. Only optimize sext(setcc())
>
> Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=180129&r1=180128&r2=180129&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Tue Apr 23 13:09:28 2013
> @@ -514,7 +514,7 @@ PPCTargetLowering::PPCTargetLowering(PPC
> setOperationAction(ISD::ATOMIC_STORE, MVT::i64, Expand);
>
> setBooleanContents(ZeroOrOneBooleanContent);
> - setBooleanVectorContents(ZeroOrOneBooleanContent); // FIXME: Is this correct?
> + setBooleanVectorContents(ZeroOrNegativeOneBooleanContent); // FIXME: Is this correct?
>
> if (isPPC64) {
> setStackPointerRegisterToSaveRestore(PPC::X1);
>
>
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