[llvm] r180124 - R600: Use .AMDGPU.config section to emit stacksize
Tom Stellard
tom at stellard.net
Tue Apr 23 20:53:27 PDT 2013
On Tue, Apr 23, 2013 at 05:34:12PM -0000, Vincent Lejeune wrote:
> Author: vljn
> Date: Tue Apr 23 12:34:12 2013
> New Revision: 180124
>
> URL: http://llvm.org/viewvc/llvm-project?rev=180124&view=rev
> Log:
> R600: Use .AMDGPU.config section to emit stacksize
>
> Added:
> llvm/trunk/test/CodeGen/R600/elf.r600.ll
> Modified:
> llvm/trunk/lib/Target/R600/AMDGPUAsmPrinter.cpp
> llvm/trunk/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
> llvm/trunk/lib/Target/R600/R600ControlFlowFinalizer.cpp
> llvm/trunk/lib/Target/R600/R600Instructions.td
> llvm/trunk/lib/Target/R600/R600MachineFunctionInfo.h
>
Hi Vincent,
In the Mesa commit that goes with this LLVM commit, you forgot to update
the compute shader path.
-Tom
> Modified: llvm/trunk/lib/Target/R600/AMDGPUAsmPrinter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUAsmPrinter.cpp?rev=180124&r1=180123&r2=180124&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/R600/AMDGPUAsmPrinter.cpp (original)
> +++ llvm/trunk/lib/Target/R600/AMDGPUAsmPrinter.cpp Tue Apr 23 12:34:12 2013
> @@ -22,6 +22,7 @@
> #include "SIDefines.h"
> #include "SIMachineFunctionInfo.h"
> #include "SIRegisterInfo.h"
> +#include "R600MachineFunctionInfo.h"
> #include "R600RegisterInfo.h"
> #include "llvm/MC/MCContext.h"
> #include "llvm/MC/MCSectionELF.h"
> @@ -75,6 +76,7 @@ void AMDGPUAsmPrinter::EmitProgramInfoR6
> unsigned MaxGPR = 0;
> const R600RegisterInfo * RI =
> static_cast<const R600RegisterInfo*>(TM.getRegisterInfo());
> + R600MachineFunctionInfo *MFI = MF.getInfo<R600MachineFunctionInfo>();
>
> for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end();
> BB != BB_E; ++BB) {
> @@ -97,6 +99,7 @@ void AMDGPUAsmPrinter::EmitProgramInfoR6
> }
> }
> OutStreamer.EmitIntValue(MaxGPR + 1, 4);
> + OutStreamer.EmitIntValue(MFI->StackSize, 4);
> }
>
> void AMDGPUAsmPrinter::EmitProgramInfoSI(MachineFunction &MF) {
>
> Modified: llvm/trunk/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp?rev=180124&r1=180123&r2=180124&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp (original)
> +++ llvm/trunk/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp Tue Apr 23 12:34:12 2013
> @@ -147,10 +147,6 @@ void R600MCCodeEmitter::EncodeInstructio
> return;
> } else {
> switch(MI.getOpcode()) {
> - case AMDGPU::STACK_SIZE: {
> - EmitByte(MI.getOperand(0).getImm(), OS);
> - break;
> - }
> case AMDGPU::RAT_WRITE_CACHELESS_32_eg:
> case AMDGPU::RAT_WRITE_CACHELESS_128_eg: {
> uint64_t inst = getBinaryCodeForInstr(MI, Fixups);
>
> Modified: llvm/trunk/lib/Target/R600/R600ControlFlowFinalizer.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/R600ControlFlowFinalizer.cpp?rev=180124&r1=180123&r2=180124&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/R600/R600ControlFlowFinalizer.cpp (original)
> +++ llvm/trunk/lib/Target/R600/R600ControlFlowFinalizer.cpp Tue Apr 23 12:34:12 2013
> @@ -166,6 +166,22 @@ private:
> }
> }
>
> + unsigned getHWStackSize(unsigned StackSubEntry, bool hasPush) const {
> + switch (ST.device()->getGeneration()) {
> + case AMDGPUDeviceInfo::HD4XXX:
> + if (hasPush)
> + StackSubEntry += 2;
> + break;
> + case AMDGPUDeviceInfo::HD5XXX:
> + if (hasPush)
> + StackSubEntry ++;
> + case AMDGPUDeviceInfo::HD6XXX:
> + StackSubEntry += 2;
> + break;
> + }
> + return (StackSubEntry + 3)/4; // Need ceil value of StackSubEntry/4
> + }
> +
> public:
> R600ControlFlowFinalizer(TargetMachine &tm) : MachineFunctionPass(ID),
> TII (static_cast<const R600InstrInfo *>(tm.getInstrInfo())),
> @@ -180,6 +196,7 @@ public:
> virtual bool runOnMachineFunction(MachineFunction &MF) {
> unsigned MaxStack = 0;
> unsigned CurrentStack = 0;
> + bool hasPush;
> for (MachineFunction::iterator MB = MF.begin(), ME = MF.end(); MB != ME;
> ++MB) {
> MachineBasicBlock &MBB = *MB;
> @@ -207,6 +224,7 @@ public:
> case AMDGPU::CF_ALU_PUSH_BEFORE:
> CurrentStack++;
> MaxStack = std::max(MaxStack, CurrentStack);
> + hasPush = true;
> case AMDGPU::CF_ALU:
> case AMDGPU::EG_ExportBuf:
> case AMDGPU::EG_ExportSwz:
> @@ -218,7 +236,7 @@ public:
> CfCount++;
> break;
> case AMDGPU::WHILELOOP: {
> - CurrentStack++;
> + CurrentStack+=4;
> MaxStack = std::max(MaxStack, CurrentStack);
> MachineInstr *MIb = BuildMI(MBB, MI, MBB.findDebugLoc(MI),
> getHWInstrDesc(CF_WHILE_LOOP))
> @@ -232,7 +250,7 @@ public:
> break;
> }
> case AMDGPU::ENDLOOP: {
> - CurrentStack--;
> + CurrentStack-=4;
> std::pair<unsigned, std::set<MachineInstr *> > Pair =
> LoopStack.back();
> LoopStack.pop_back();
> @@ -321,9 +339,7 @@ public:
> break;
> }
> }
> - BuildMI(MBB, MBB.begin(), MBB.findDebugLoc(MBB.begin()),
> - TII->get(AMDGPU::STACK_SIZE))
> - .addImm(MaxStack);
> + MFI->StackSize = getHWStackSize(MaxStack, hasPush);
> }
>
> return false;
>
> Modified: llvm/trunk/lib/Target/R600/R600Instructions.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/R600Instructions.td?rev=180124&r1=180123&r2=180124&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/R600/R600Instructions.td (original)
> +++ llvm/trunk/lib/Target/R600/R600Instructions.td Tue Apr 23 12:34:12 2013
> @@ -929,13 +929,6 @@ ins, AsmPrint, [] >, CF_WORD0_EG, CF_WOR
> def CF_ALU : ALU_CLAUSE<8, "ALU">;
> def CF_ALU_PUSH_BEFORE : ALU_CLAUSE<9, "ALU_PUSH_BEFORE">;
>
> -def STACK_SIZE : AMDGPUInst <(outs),
> -(ins i32imm:$num), "nstack $num", [] > {
> - field bits<8> Inst;
> - bits<8> num;
> - let Inst = num;
> -}
> -
> def PAD : AMDGPUInst <(outs), (ins), "PAD", [] > {
> field bits<64> Inst;
> }
>
> Modified: llvm/trunk/lib/Target/R600/R600MachineFunctionInfo.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/R600MachineFunctionInfo.h?rev=180124&r1=180123&r2=180124&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/R600/R600MachineFunctionInfo.h (original)
> +++ llvm/trunk/lib/Target/R600/R600MachineFunctionInfo.h Tue Apr 23 12:34:12 2013
> @@ -25,6 +25,7 @@ public:
> R600MachineFunctionInfo(const MachineFunction &MF);
> SmallVector<unsigned, 4> LiveOuts;
> std::vector<unsigned> IndirectRegs;
> + unsigned StackSize;
> };
>
> } // End llvm namespace
>
> Added: llvm/trunk/test/CodeGen/R600/elf.r600.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/elf.r600.ll?rev=180124&view=auto
> ==============================================================================
> --- llvm/trunk/test/CodeGen/R600/elf.r600.ll (added)
> +++ llvm/trunk/test/CodeGen/R600/elf.r600.ll Tue Apr 23 12:34:12 2013
> @@ -0,0 +1,15 @@
> +; RUN: llc < %s -march=r600 -mcpu=redwood -filetype=obj | llvm-readobj -s - | FileCheck --check-prefix=ELF-CHECK %s
> +; RUN: llc < %s -march=r600 -mcpu=redwood -o - | FileCheck --check-prefix=CONFIG-CHECK %s
> +
> +; ELF-CHECK: Format: ELF32
> +; ELF-CHECK: Name: .AMDGPU.config
> +
> +; CONFIG-CHECK: .section .AMDGPU.config
> +; CONFIG-CHECK-NEXT: .long 2
> +; CONFIG-CHECK-NEXT: .long 1
> +define void @test(float addrspace(1)* %out, i32 %p) {
> + %i = add i32 %p, 2
> + %r = bitcast i32 %i to float
> + store float %r, float addrspace(1)* %out
> + ret void
> +}
>
>
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